1. Off-detector electronics for a high-rate CSC detector
- Author
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Drego, N., Hawkins, D., Lankford, A.J., Li, Y., Medve, M., Pier, S., Schernau, M., and Stoker, D.
- Subjects
Data entry -- Research ,Digital signal processors ,Digital signal processor ,Business ,Electronics ,Electronics and electrical industries - Abstract
Data acquisition (DAQ) electronics are described for a system of high-rate cathode strip chambers (CSC) in the forward region of A Toroidal LHC ApparatuS (ATLAS) muon spectrometer. The system provides serial streams of control signals for switched capacitor array analog memories on the chambers and accepts a total of nearly 294 Gbit/s in serial raw data streams from 64 chambers in the design configuration. Processing of the data is done in two stages, leading to an output bandwidth of 2.56 Gbit/s. The architecture of the system is described, as are some important signal processing algorithms and hardware implementation details. Although designed for a specific application, the architecture is sufficiently general to be used in other contexts. Index Terms--Digital signal processors, particle tracking, real-time systems. more...
- Published
- 2004