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In this paper, a novel parallel-coupled quadrature LC oscillator (PC-QO) is presented that can automatically eliminate imbalances of output phase and amplitude resulting from mismatches in the LC tanks. The method of using unequal coupling factors in a parallel-coupled quadrature oscillator is the base of this design; canceling the phase and amplitude errors takes place by tuning the imbalanced coupling factor using tuneable tail currents. First, the proposed circuit senses the amplitude error and then adjusts the coupling factors according to the situation. We show that using the inversely proportional coupling factors can eliminate the phase and amplitude error simultaneously. In other words, this design uses the amplitude control loop to cancel the phase and amplitude error. The circuit has been simulated using TSMC 0.18 CMOS practical model to confirm the high accuracy of the analysis and capability of the canceling I / Q mismatch technique. The simulation results show that the phase noise of the proposed quadrature voltage controlled oscillator (QVCO) is −123.9 dBc/Hz at 1 MHz offset from 4.4 GHz operation frequency. The total power consumption of the QVCO is 3.4 mW. [ABSTRACT FROM AUTHOR]

Summary: In this article, an injection‐locked frequency divider (ILFD) is presented. By assuming the maximum phase of the tank current, we obtain a relation for the lock range. Besides, the effects of parasitic capacitors on the lock range have been probed. The analysis shows that the greater the phase difference between the tail current and injected signal, the phase of the tank current increases and, consequently, the lock range also increases. The accomplished simulations confirm the correct performance of the proposed design and the extracted relationships. The simulations have been CMOS technology and with a 0.9‐V supply voltage. The results show that the current consumption equals 3.7 mA and the power consumption equals 3.33 mW. The proposed ILFD lock range with phase shift technique with power input signal 0 dBm is equal to 5.1 GHz (3.6–8.7 GHz), and the relative percentage of the lock range is also 83%. [ABSTRACT FROM AUTHOR]

Summary: This study developed a local oscillator (LO) with low phase noise and low power consumption. The proposed oscillator core comprises a pair of cross‐coupled transistors, which are fed by another pair of transistors that injects current at moments close to the peak of output voltage. The position of the current injection transistors, which are inserted in series with the cross‐coupled transistors, affects the waveform of current injected into an inductive–capacitive (LC) tank. Installing a capacitor on the source node of the cross‐coupled transistors increases the current injected into the LC tank and thereby augments the output voltage amplitude and power efficiency of the LO. The resonator phase shift and Q can be corrected by adjusting the source capacitance, which filters noise. These changes reduce the phase noise to −123.4 dBc/Hz at a frequency offset of 1 MHz and improve oscillator performance with a figure of merit equal to −193.5 dBc/Hz. To evaluate the LC tank, a 5 GHz LO was simulated at 1.8 V power supply and 2.5 mW power consumption. The simulation was conducted using a practical 0.18 complementary metal–oxide–semiconductor model manufactured by the Taiwan Semiconductor Manufacturing Company. The simulation results confirmed the analytical findings. [ABSTRACT FROM AUTHOR]

This study presents the new locking range enhancement technique in divide‐by‐two injection locked frequency divider using a phase shifter circuit. The proposed divide‐by‐two phase shifter injection locking frequency divider (ILFD) is based on complementary metal–oxide–semiconductor (CMOS) cross‐coupled oscillator with dual‐resonance fourth‐order LC‐tank that is designed and simulated in 0.18 μm Taiwan Semiconductor Manufacturing Company (TSMC) CMOS technology. Using a phase shifter branch, an extra current with a new phase angle towards oscillator current will inject into the LC tank and moves the locking angle to a new and wider angle that leads to a wide locking range. In an analysis, the effect of the phase shifter circuit on the proposed ILFD has been explained. Simulation results show that at a supply voltage of 0.95 V, the phase shift ILFD consumes 7.32 mW power and at the incident signal power of 0 dBm the locking range is 5.25 GHz, from 4.3 to 9.55 GHz and the relative locking range is 75.81%. [ABSTRACT FROM AUTHOR]

In this paper, an analytic approach for the estimation of the phase and amplitude error in series coupled LC quadrature oscillator (SC-QO) is proposed. The analysis results show that imbalances in source voltage of coupling transistor because of mismatches between LC tanks are the main source of the phase and amplitude error in this oscillator. For compensation of the phase and amplitude error, a phase and amplitude-tunable series coupled quadrature oscillator is designed in this paper. A phase shift generation circuit, designed using an added coupling transistor, can control the coupling transistor source voltage. The phase and amplitude error can simply be controlled and removed by tuning the phase shifter, while this correction does not have undesirable impact on phase noise. In fact, the proposed SC-QO generates a phase shift in the output current, which reduces the resonator phase shift (RPS) and improves phase noise. The phase and amplitude tunable SC-QO is able to correct the phase error up to ±12°, while amplitude imbalances are reduced as well. To evaluate the proposed analysis, a 4.5-GHz CMOS SC-QO is simulated using the practical 0.18-μm TSMC CMOS technology with a current consumption of 2 mA at 1.8-V supply voltage. Copyright © 2016 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]

This paper presents a novel approach to study the phase error in source injection coupled quadrature oscillators (QOs). Like other LC QOs, the mismatches between LC tanks are the main source of phase error in this oscillator. The QO is analyzed where the phase error and oscillation frequency are derived in terms of circuit parameters. The proposed analysis shows that the output phase error is a function of injection current and the current of source equivalent capacitor. As a result, it is shown that increasing of tail current and LC tank quality factor decreases the phase error. Derived equations show that the phase error can be cancelled and even controlled by adjusting bias currents. To evaluate the proposed analysis and consequent designed QO, a 5.5 GHz CMOS QO is designed and simulated using the practical 0.18 µm TSMC CMOS technology. The experiments show good agreement between analytical equations and simulation results. Copyright © 2013 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]