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This paper presents a bonding-less 5 GHz radio frequency identification (RFID) tag module using an 85% downsized RFID tag chip and a 97% downsized antenna. Inductive (or magnetic) coupling between the antenna and the chip realizes low cost bonding-less implementation. Compared with a conventional module operating in the UHF band, the proposed module operating in the 5 GHz range is downsized in terms of both the chip and the antenna sizes. The experimental results confirmed that the proposed RFID tag module successfully works at 20 cm away from a reader whose output power is 15 dBm, achieving the same figure of merit as a conventionally bonded module. Moreover, this paper confirmed that the misalignment tolerance of the inductive coupling can be up to 50 μ m. [ABSTRACT FROM AUTHOR]

A 6 Gb/s 9.8 pJ/b rotatable non-contact connector applicable to industrial robot arms is developed. The proposed non-contact connector enables a high-speed and highly reliable wireless data connection between three-dimensional (3-D) cameras and an edge computer in an autonomously controlled robot. A rotatable transmission line coupler (RTLC) is proposed to accommodate the rotational operation of the robot arm. Since the proposed doughnut-shaped RTLC has a constant overlapped area at any rotation angle, the RTLC has a constant coupling gain at all rotation angles. To remove inter-symbol interference (ISI) occurring at a specific rotation angle, a pulse-equalizing receiver is also developed. An interface bridge IC is proposed to transfer a wide range of interface signals from a slow-control signal such as the control area network (CAN) to a high-speed video interface signal. A signal protocol conversion technique applying on-off keying (OOK) modulation is also developed in order to transfer slow legacy interfaces used in the robot arms that include a dc component. Experiments with a test chip fabricated in a 40 nm CMOS process confirmed that bit error rate (BER) was lower than 10 $^{-12}$ at any rotation angle in a communication distance of 3 mm. The proposed system improves energy efficiency by a factor of 3.7, area efficiency by a factor of 1.8. [ABSTRACT FROM AUTHOR]

A non-contact interface for modular smartphones that can provide a data connection at a maximum MIPI rate of 6 Gb/s has been developed. A two-fold transmission line coupler, which is a small-size coupler that has a wide bandwidth, is proposed for modular smartphones, where the layout area is strictly limited. The coupler size is 6 mm2 for a 5 mm communication distance, which is 1/24 smaller than the conventional coupler. Since many wireless communication components, such as LTE, WiFi, and GPS transceivers, are assembled in a small module, the interference between the non-contact interface and the wireless transceivers should be suppressed. To improve noise immunity and reduce unwanted radiation from the coupler, an electromagnetic-compatibility robust pulse transceiver is proposed. A synchronous receiver using an edge counting clock recovery circuit improves noise immunity, and a bi-phase pulse transmitter reduces noise radiation in the GPS band. There is no EMS by LTE or WiFi signals on the data connection at BER < 10^-12 when the coupler is separated by a distance of 2 mm and no EMI on GPS signals at a separation of 10 mm. Compared with the state-of-the-art result, the highest energy efficiency (6 pJ/b) and space efficiency (1.2 \textmm^2/1 \textmm distance) is achieved. [ABSTRACT FROM PUBLISHER]

A highly reliable wireless solid-state drive (SSD) system for future applications of large volume storage is presented. The wireless interface in the system consists of an inductively coupled power link with fast transmission power control and high-speed data links using transmission line couplers (TLCs). The wireless power link can deliver 1 W from the host to the SSD. The full duplex wireless data interface achieves raw data rate of 1.6 Gb/s. The reliability of the wireless interface is studied though simulation analysis and experiments. The error correction block for the NAND flash memory system can also correct errors in the wireless data links, allowing the requirements for the PHY layer to be relaxed. The error correction code is discussed, including optimization by analyzing the error bits on the wireless data links. The experimental results confirmed strong tolerance to the interference from the power link on the wireless data link, and the water proof property of both the data and power links. [ABSTRACT FROM PUBLISHER]

A noncontact and housing-less thin–thick connecting method was developed for mobile industry processor interface (MIPI) applications. This paper describes the world's first 0.15-mm-thick connector using a vertical directional coupler (VDC) which enables simultaneous two-link communication with one coupler without fatal performance degradation. We have analyzed the conditions for isolating two links in a coupler, and the design method is discussed. A fully balanced pulse transmitter implemented in 90-nm CMOS technology significantly suppressed electromagnetic interference (EMI), which agrees well with MIPI requirements. An experimental liquid crystal display interface system reached a maximum data rate of 2.3 Gb/s/link at a bit error rate of less than 10^-12 and a power consumption of 1.47~pJ/b. The timing margin of single link was 320 ps (=64% U.I.) and of two links was 305 ps (=61% U.I.) at 2.0 Gb/s. [ABSTRACT FROM AUTHOR]

A non-contact inter-module link technique which consists of transmission line couplers (TLCs) and an equalizing receiver is proposed. The non-contact interface allows eliminating metal terminals and eases electro-static discharge (ESD) protection constraints, leading to higher channel bandwidth. Signals pass through two TLCs via a transmission line so that they are differentiated twice (d2v/dt2) and turn into double-peak pulses. To retrieve original waveforms, we developed a low-frequency compensation continuous time linear equalizer (LFC-CTLE) to emphasize the low frequency part converting the double-peak pulses to the first order differentiated shapes, resulting in improving the data rate. To verify this technique, we designed and fabricated a test chip in 0.18 µm CMOS technology and we achieved 3 Gbps data rate at the bit error rate of (BER) less than 10-11 with a 10-in. long FR4 micro strip line and two 11 mm length TLCs. [ABSTRACT FROM AUTHOR]