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Summary In this paper, a new coupled inductor Z‐source inverter is proposed. The proposed topology can increase the boost factor value by increasing the number of turns ratio values. The proposed inverter is completely analyzed, and the related equations to the voltage and current of the used elements and boost factor are obtained. In addition, the values of the capacitors and inductors are designed to have a better performance based on the considered boost factor and input voltage level. Following, the proposed inverter is compared with several related topologies to determine the advantages and disadvantages of the proposed inverter. Finally, the accuracy performance of the proposed inverter is verified through results on experimental prototype. [ABSTRACT FROM AUTHOR]

This research proposes a novel multilevel inverter based on a new capacitor basic unit. Four capacitors are deployed in this unit to provide both even and odd voltage levels. Two‐cell proposed cascaded multilevel inverters and developed cascaded multilevel inverters are evaluated in order to improve the number of output levels generated. Calculations are made for all associated equations after determining the value of the necessary DC voltage source. Additionally, both inverters' switching tables and capacitor charge and discharge modes are fully explained. The merits and disadvantages of the proposed topology are then assessed by contrasting the cascaded multilevel inverter under consideration with a number of widely used multilevel inverters. The key benefit of the suggested architecture is the increase in the number of output levels produced while using fewer power electronic devices and DC voltage sources overall. The proposed one‐cell cascaded inverter is then utilized to evaluate the performance of the proposed topology using the relevant equations, simulations, and experimental data. The simulation is carried out using the EMTDC/PSCAD software, and a lab prototype yields the experimental data. [ABSTRACT FROM AUTHOR]

Summary: This paper proposes a new half‐bridge‐based impedance source inverter with coupled T‐shaped inductors. The proposed inverter has a continuous input current and a high boost factor. The proposed topology is thoroughly investigated, along with its operating modes and control system, and the boost factor equation is derived. Additionally, the operating modes' results are incorporated into the design of used components, such as capacitors and inductors. To determine the suggested topology's advantages and disadvantages, a comparison with similar topologies is made based on the number of power electronic devices employed, the boost factor, and the voltage stresses experienced by the components. On the base of these comparisons, it is concluded that the proposed half‐bridge‐based Z‐source inverter has a high boost factor, fewer power electronic components, and reduced voltage stresses. Following that, a power loss study is performed to ascertain the system's power losses and overall efficiency. The prototype's experimental results are considered to evaluate the proposed topology's correct performance. [ABSTRACT FROM AUTHOR]

This paper proposes two newly developed quasi Z-source inverters (QZSI) based on two new diode-cells. The proposed inverters are called continuous diode assisted quasi Z-source inverter (CDQAZSI) and discontinuous diode assisted quasi Zsource inverter (DDQAZSI). These inverters are thoroughly examined in three modes: two-cell QZSI, three-cell QZSI, and n-cell QZSI that is called developed QZSI. Additionally, the equations of the diodes' voltage and current, capacitors' voltage stress, boost factor, inductor currents, and dc-link current are computed. All equations are given for the proposed generalized topologies. The major advantage of these inverters is the potential of deriving desired boost factor value devoid of extra elements. Furthermore, increasing the number of the diode-cells used in the proposed QZSI reduces the values of dc-link current, inductor current, and diode current. Lastly, to verify the performance of the proposed topologies, the practicality of the proposed QZSI is authenticated by experimental results through a laboratory prototype. [ABSTRACT FROM AUTHOR]

In this paper, a new basic 15-level inverter is proposed. By developing the proposed basic unit, a 71-level inverter and generally an -level inverter are proposed. Then, the proposed multilevel inverter is compared with several conventional multilevel inverters in design of minimum 15 levels and 71 levels at the output. By comparing these inverters, it is obtained that the proposed inverter is able to generate higher number of output levels by using lower number of DC voltage sources and power electronic devices that lead to decreased complexity, installation space and total cost of the inverter. Finally, the correct performance of the proposed inverter is reconfirmed through the simulation and experimental results of a 15-level inverter. [ABSTRACT FROM AUTHOR]

In this study, a new topology for switched Z-source inverter is proposed. This inverter in comparison with the conventional Z-source inverter needs higher number of active elements, lower number of capacitors and inductors. Reduction of weight, size and cost are the main advantages of the proposed topology. In addition, this inverter is able to solve the problem of short circuit across the inverter leg and consists of higher value of voltage gain when compared with the conventional switched boost inverter. Moreover, the developed topology of the proposed inverter based on switched-inductor cells is introduced. The performance of the proposed inverter in different operating modes is investigated. The proposed topologies are also compared with the conventional Z-source inverters from different points of view such as number of elements, the voltage gain and capability of tolerate the inverter short circuit. Finally, the accuracy performance of the proposed inverter is reconfirmed by using the simulation results in EMTDC/PSCAD software and also experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a new boost dc-dc converter based on voltage lift (VL) technique is proposed. There is any need for transformer, coupled inductances and sequential connections in the proposed boost converter topology. In this paper, the operating of proposed boost dc-dc converter in continuous conduction mode (CCM) and discontinuous conduction mode (DCM) was discussed, and the current and voltage equations of the inductors and capacitors were obtained with details. So, the value of critical inductance and the operating of the proposed dc-dc converter between CCM and DCM were presented. The switching currents of each switch were analyzed. The switches, diodes, inductors and capacitors root-mean-square (RMS) current stresses were discussed. Finally, the correct performance of the proposed converter based on presented theoretical issues is verified by using simulation results on EMTDC/PSCAD software program and experimental results by using laboratory prototype. Copyright © 2015 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]

In this article, a new basic unit for cascaded multi-level inverter is proposed. This inverter is able to increase the number of output voltage levels and reduces the number of power electronic devices. To generate all voltage levels at the output, five different algorithms to determine the magnitude of DC voltage sources are suggested. This inverter is compared with conventional cascaded multi-level inverters. The comparisons show that the proposed topology needs fewer DC voltage sources and power switches, less variety of the magnitude of DC voltage sources, and smaller amounts of blocked voltage by switches. As a result, the installation space and total cost of the inverter decrease. As it is impossible to use charge balance control methods for the asymmetric cascaded multi-level inverters, the developed topology based on the proposed cascaded inverter–the sub-symmetric topology with the usability of charge balance control methods–is proposed. A new algorithm is proposed to determine the magnitude of DC voltage sources. In addition, full-wave and half-wave charge balance control methods are applied in the proposed developed topology. The accurate performance of the proposed topology by applying charge balance control methods is verified through the simulation and experimental results of an 81-level sub-symmetric inverter. [ABSTRACT FROM AUTHOR]

In this paper, a new cascaded multilevel inverter is proposed. For the proposed inverter, two different algorithms to determine the magnitude of the dc voltage sources are proposed. Then, in order to generate maximum numbers of output voltage levels by using a constant number of power switches and/or dc voltage sources, several optimum structures of the proposed inverter are obtained. In comparison with the conventional cascaded multilevel inverters, the proposed inverter is able to generate a high number of output voltage levels by using a lower number of power electronic devices such as power switches, driver circuits, power diodes, and dc voltage sources. In addition, the low amount of blocked voltage by switches is another advantage of the proposed inverter. The accuracy performance of the proposed inverter in generating the positive and negative voltage levels is verified through the experimental results on a 61-level inverter. [ABSTRACT FROM PUBLISHER]

In this paper, a new single-phase cascaded multilevel inverter is proposed. This inverter is comprised of a series connection of the proposed basic unit and is able to only generate positive levels at the output. Therefore, an H-bridge is added to the proposed inverter. This inverter is called the developed cascaded multilevel inverter. In order to generate all voltage levels (even and odd) at the output, four different algorithms are proposed to determine the magnitude of dc voltage sources. Reduction in the number of power switches, driver circuits, and dc voltage sources is the advantage of the developed single-phase cascaded multilevel inverter. As a result, the installation space and cost of the inverter are reduced. These features are obtained by the comparison of the conventional cascaded multilevel inverters with the proposed cascaded topology. The ability of the proposed inverter to generate all voltage levels (even and odd) is reconfirmed by using the experimental results of a 15-level inverter. [ABSTRACT FROM PUBLISHER]

In this paper, a new single-phase cascaded multilevel inverter based on novel H-bridge units is proposed. In order to generate all voltage levels (even and odd) at the output, nine different algorithms are proposed to determine the magnitudes of dc voltage sources. Then, the proposed algorithms are compared to investigate their advantages and disadvantages. This topology is able to increase the number of output voltage levels by using a lower number of power electronic devices such as switches, power diodes, driver circuits, and dc voltage sources that lead to reduction in installation space and cost of the inverter. In addition, in the proposed cascaded multilevel inverter, not only the number of required power electronic devices is reduced, but also the amount of the blocked voltage by switches, and the number of different voltage amplitudes of the used sources is decreased. These features are some of the most important advantages of the proposed topology. These features are obtained via the comparison of the proposed topology and its proposed algorithms with the conventional cascaded multilevel inverters that have been presented in the literatures. The operation and performances of the proposed topology with its presented algorithms in generating all voltage levels have been verified by using the experimental results of a 49-level single-phase inverter. [ABSTRACT FROM PUBLISHER]

In this paper, a new general cascaded multilevel inverter using developed H-bridges is proposed. The proposed topology requires a lesser number of dc voltage sources and power switches and consists of lower blocking voltage on switches, which results in decreased complexity and total cost of the inverter. These abilities obtained within comparing the proposed topology with the conventional topologies from aforementioned points of view. Moreover, a new algorithm to determine the magnitude of dc voltage sources is proposed. The performance and functional accuracy of the proposed topology using the new algorithm in generating all voltage levels for a 31-level inverter are confirmed by simulation and experimental results. [ABSTRACT FROM PUBLISHER]

In this paper, a new basic unit is proposed. Then, a cascaded multilevel inverter basded on the series connection of n number of these new basic units is proposed. In order to generate all of the voltage levels (even and odd) at the output, three different algorithms to determine the magnitude of the dc voltage source are proposed. Reductions in the number of power switches, driver circuits and dc voltage sources in addition to increases in the numbr of output voltage levels are some of the advantages of the proposed cascaded multilevel inverter. These results are obtained through a comparison of the proposed inverter and its algorithms with an H-bridge cascaded multilevel inverter from the point of view of the number of power electronic devices. Finally, the capability of the proposed topology with its proposed algorithms in generating all of the voltage levels is verified through experimental results on a laboratorary prototype of a 49-level inverter. [ABSTRACT FROM AUTHOR]

In this paper, a new algorithm is proposed to determine the magnitudes of dc voltage sources in asymmetric cascaded multilevel inverters. Using this algorithm, it is possible to generate the maximum number of output voltage levels and maximum output voltage amplitude with minimum number of dc voltage sources. Using this algorithm, it is possible to use charge balance control methods to all dc sources except the minimum amplitude dc voltage source (first H-bridge). Therefore, the lifetime of dc voltage sources used in different H-bridges of cascaded asymmetric multilevel inverter except the first H-bridge are the same. As a result, the system's maintenance cost will be low. The simulation and experimental results confirm the abilities of the proposed method. [ABSTRACT FROM AUTHOR]