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Silicon tracking detectors operated at high luminosity collider experiments pose a challenge for current and future readout systems regarding bandwidth, radiation, space and power constraints. With the latest developments in wireless communications, wireless readout systems might be an attractive alternative to commonly used wired optical and copper based readout architectures. The WADAPT group (Wireless Allowing Data and Power Transmission) has been formed to study the feasibility of wireless data transmission for future tracking detectors. These proceedings cover current developments focused on communication in the 60 GHz band. This frequency band offers a high bandwidth, a small form factor and an already mature technology. Motivation for wireless data transmission for high energy physics application and the developments towards a demonstrator prototype are summarized. Feasibility studies concerning the construction and operation of a wireless transceiver system have been performed. Data transmission tests with a transceiver prototype operating at even higher frequencies in the 240 GHz band are described. Data transmission at rates up to 10 Gb/s have been obtained successfully using binary phase shift keying.

A high-data-rate $D$ -band transmitter (TX) module cointegrating a dual-channel TX integrated circuit (IC) in 45-nm CMOS partially deplated silicon-on-insulator (PDSOI) technology and an antenna is presented. The proposed system-in-package is based on an innovative channel-bonding technique and is fabricated using a low-cost printed circuit board process. The IC consists of two upconversion chains, including on-chip millimeter-wave local oscillator generators. The emitted signal is composed of eight channels, each one having 2.16-GHz bandwidth, organized in two sets of four channels at the intermediate frequency (IF) band (around 61.56 GHz) that are upconverted to two adjacent subbands centered at 148 GHz. Then, the two subband signals are combined off-chip using a substrate integrated waveguide diplexer and radiated by a patch antenna array realized on the same package. The output spans from 139.3 to 156.6 GHz. The total equivalent isotropic radiated power is 8.3 dBm. An 84.48-Gb/s data rate is achieved with 64-QAM. The module consumes 600 mW from a 1-V supply and occupies a compact area of 12 $\times $ 6 mm2. [ABSTRACT FROM AUTHOR]

The high-frequency properties of very deep sub-micron MOSFETs are investigated at liquid nitrogen temperature and at room temperature. The improvement of the noise performances shown by the device at 78 K is explained by the decrease of the operating temperature, extrinsic resistance values and an improvement of the dynamic performances at 78 K.

The proposal of a new method for modeling the kink effect in partially depleted (PD) silicon-on-insulator (SOI) MOSFETs is discussed. When the load impedance is high and the frequency spacing is within the kink frequency domain, the kink effect degrades the intermodulation.

This paper presents the design of a wideband and high-linearity $E$ -band transmitter integrated in a 55-nm SiGe BiCMOS technology. It consists of a double-balanced bipolar ring mixer which upconverts a 16–21-GHz IF signal to the 71–76- and 81–86-GHz bands by the use of a 55/65-GHz local oscillator signal, followed by a broadband power amplifier which employs 2-way output power combining using an integrated low-loss balun transformer. The transmitter exhibits an average conversion gain of 24 dB and 22 dB at the 71–76- and 81–86-GHz bands, respectively, with an output 1-dB compression point greater than 14 and 11.5 dBm at each band. A maximum output power of 16.8 dBm is measured at 71 GHz. The dc power consumption is 575 mW. The presented transmitter is used to demonstrate the transmission of a 10.12-Gb/s 64 quadrature amplitude modulated signal with a spectral efficiency of 5.06 bit/s/Hz, which makes it suitable for use in future high-capacity backhaul and fronthaul point-to-point links. [ABSTRACT FROM PUBLISHER]

This paper presents an original mmW frequency multiplier that provides the channel center frequencies of the IEEE 802.15.3c standard from a much lower and fixed frequency of 2.16 GHz. It is composed of a voltage-controlled oscillator (VCO) whose supply is periodically switched on-and-off by the input signal, providing Periodically Repeated Oscillations Train (PROT). This multi-harmonic signal is injected into an oscillator (ILO) that locks onto the harmonic of interest, providing a continuous wave sinusoidal signal in the 60 GHz band. The CMOS 40 nm circuit consumes 32 mW and occupies only 0.07 mm^2. A theoretical approach on the synchronization of the PROT signal generator and the ILO is proposed, based on custom approximated solutions of the Van der Pol oscillator and highlighting new synchronization phenomena. Based on this theory, this novel programmable multiplication technique requires a unique fixed low frequency reference to perform multi-channel mmW LO generation. The phase noise of the output LO signal is only limited by the input low frequency reference phase noise and the frequency ratio between the output and the input signals. Thus, a 60 GHz signal has been generated with this technique with a record phase noise of -104 dBc/Hz@1 MHz offset. [ABSTRACT FROM AUTHOR]

A hybrid on-chip/in-package integrated antenna is designed and demonstrated for the first time in a QFN (quad flat no lead)-packaged 60-GHz ultra-wide-band (UWB) low-power transceiver. The on-chip radiating element is a folded dipole antenna realized on the transceiver high-resistivity silicon chip (CMOS-SOI technology). It is coupled electromagnetically to a patch antenna embedded under the package lid. The design was performed with a full 3D EM model of the packaged transceiver. The experimental radiation patterns and gain values are in agreement with the simulations, they show an antenna gain up to 4.6–8 dBi at 60 GHz and a 3-dB beamwidth 43^\circ \times 72^\circ, suitable for short-range low-power Gbps communications. [ABSTRACT FROM PUBLISHER]

High-performance integrated slow-wave coplanar waveguides (S-CPW) are compared with conventional coplanar waveguides (CPW) fabricated in a 65-nm High-Resistivity-SOI (HR-SOI) CMOS technology. As expected, S-CPW demonstrates better performance at millimeter-wave frequencies in term of higher effective dielectric permittivity, which is due to the patterned floating shield inserted between the transmission line and the substrate. In addition, S-CPW shows a lower attenuation constant despite of the added metallic patterned floating shield on HR substrate. For demonstration purpose, both low- and high- characteristic impedance S-CPW and CPW are characterized. For 28- \Omega S-CPW and 65-\Omega S-CPW, the effective dielectric permittivity is improved by a factor of 6 and 2, respectively. Meanwhile, attenuation constants of slow-wave structures are lower than 0.9 dB/mm and 0.57 dB/mm at 60 GHz, compared to CPW ones which are as high as 1.5 dB/mm and 0.95 dB/mm, respectively. Furthermore, the loss distribution for the S-CPW structure is detailed by varying the patterned floating shield length for both standard Bulk and HR-SOI substrates. [ABSTRACT FROM PUBLISHER]

A fully integrated WirelessHD compatible 60-GHz transceiver module in 65-nm CMOS process is presented, covering the four standard channels. The silicon die is flip-chipped on top of a low-cost HTCC module which also includes an external 65-nm CMOS PA and large beamwidth antennas targeting industrial manufacturability. The module achieves a 16QAM OFDM modulation wireless link with 3.8 Gbps over 1 m. The transceiver consumption is 454 mW in RX mode (including PLL) and 1090 mW in TX mode (including PLL and external PA). [ABSTRACT FROM AUTHOR]

A 60 GHz wideband power amplifier (PA) is fabricated in a standard CMOS SOI 65 nm process. The PA is based on two cascode stages. Input, output and inter-stage matching use coplanar wave guide (CPW) transmission lines that have low losses thanks to the high-resistivity SOI substrate (3 kΩ ⋅ cm). The PA measurements are carried out for supply voltagesDD going from 1.2 V to 2.6 V and achieve a saturation power of 10 dBm to 16.5 dBm respectively. The peak power-added efficiency (PAE) is higher than 20% for all applied VDD values. [ABSTRACT FROM AUTHOR]

This letter describes a sub-mmW oscillator with more than 10% tuning range oscillation frequency. In particular, the circuit includes a high sensitivity sub-harmonic injection technique that forces the 270-to-300 GHz output signal to multiply by 6 a 45-to-50 GHz injection signal. Thus, the output spectral and phase noise properties depend only on the injected lower frequency signal. The circuit is fabricated in a BiCMOS 55 nm technology and it is measured using probes. It achieves a 30 GHz tuning range and locks all over it. The measured phase noise is-105 dBc/Hz at 1 MHz offset at 297 GHz and the power consumption is 52 mW. [ABSTRACT FROM PUBLISHER]