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Ru thin films were deposited by plasma enhanced atomic layer deposition using MethylCyclopentadienylPyrrolylRuthenium (MeCpPy)Ru and N2/NH3 plasma. The growth characteristics have been studied on titanium nitride or tantalum nitride substrates of various thicknesses. On SiO2, a large incubation period has been observed, which can be resolved by the use of a metal nitride layer of ∼ 0.8 nm. The growth characteristics of Ru layers deposited on ultra-thin metal nitride layers are similar to those on thick metal nitride substrates despite the fact that the metal nitride layers are not fully closed. Scaled Ru/metal nitride stacks were deposited in narrow lines down to 25 nm width. Thinning of the metal nitride does not impact the conformality of the Ru layer in the narrow lines. For the thinnest lines the Ru deposited on the side wall showed a more granular structure when compared to the bottom of the trench, which is attributed to the plasma directionality during the deposition process. [ABSTRACT FROM AUTHOR]

Thin film reactions and interface formation in advanced high-κ-metal-gate stacks containing rare-earth oxides have been studied. In particular, interfacial reactions of Dy2O3 and HfSiO4 with TiN- or TaCN-based metals were studied. It is shown that Dy diffusion is considerably stronger than Hf diffusion. It is further demonstrated that for TaCN-based materials, the material density and the microstructure are of much larger influence than the chemical composition. [ABSTRACT FROM AUTHOR]

It was found that applying a capping layer has an important impact on the work function (WF) of Mo gated metal-oxide semiconductor stacks. Before any postmanufacturing thermal treatment, uncapped Mo has a similar WF as one capped with a TaC layer. However, after forming gas anneal (FGA), the uncapped Mo gate exhibits a significantly higher WF than the TaC capped one does. This is understood as O incorporation during deposition, storage or FGA, and its subsequent piling up at the Mo/dielectric interface during FGA in the former case, which is an effect prevented by TaC capping. [ABSTRACT FROM AUTHOR]

Ternary oxides, GdScO3, DyScO3, and LaScO3, deposited by pulsed laser deposition using ceramics targets of stoichiometric composition, were studied as alternative high-k gate dielectrics on (100) Si. Their physical characterization was done using Rutherford backscattering, spectroscopic ellipsometry, x-ray diffraction, and transmission electron microscopy on blanket layers deposited on (100) Si, and electrical characterization on capacitors. It is found that DyScO3 and GdScO3 preserve their amorphous phases up to 1000 °C. Other encouraging properties for high k applications were demonstrated, including k-value ∼22, almost no hysteresis or frequency dispersion in C–V curves, and leakage current reduction comparable to that of HfO2 of the same equivalent oxide thickness. [ABSTRACT FROM AUTHOR]

This study is focused on Conductive Bridging Random Access Memory (CBRAM) devices based on chalcogenide electrolyte and Cu-supply materials, and aims at identifying the key material parameters controlling memory properties. The CBRAM devices investigated are integrated on CMOS select transistors, and are constituted by either Ge-Se or Ge-Te electrolyte layers of various compositions combined with a Cu2GeTe3 active chalcogenide electrode. By means of extensive physical and electrical characterization, we show for a given electrolyte system that slower write is obtained for a denser electrolyte layer, which is directly correlated with a lower atomic percentage of the chalcogen element in the layer. We also evidence that the use of Ge-Se electrolyte results in larger write energy (voltage and time), however with improved state retention properties than for Ge-Te electrolyte materials. We associate these results with the stronger chemical bonding of Cu with Se, resulting both in a stabilized Cu filament and a slower Cu cation motion. More robust processing thermal stability is also observed for Ge-Se compared to Ge-Te compounds, allowing more flexibility in the integration flow design.