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Advancements in stem cell technology together with an improved understanding of in vitro organogenesis have enabled new routes that exploit cell-autonomous self-organization responses of adult stem cells (ASCs) and homogenous pluripotent stem cells (PSCs) to grow complex, three-dimensional (3D), mini-organ like structures on demand, the so-called organoids. Conventional optical and electrical neurophysiological techniques to acquire functional data from brain organoids, however, are not adequate for chronic recordings of neural activity from these model systems, and are not ideal approaches for throughput screenings applied to drug discovery. To overcome these issues, new emerging approaches aim at fusing sensing mechanisms and/or actuating artificial devices within organoids. Here we introduce and develop the concept of the Lab-in-Organoid (LIO) technology for in-tissue sensing and actuation within 3D cell aggregates. This challenging technology grounds on the self-aggregation of brain cells and on integrated bioelectronic micro-scale devices to provide an advanced tool for generating 3D biological brain models with in-tissue artificial functionalities adapted for routine, label-free functional measurements and for assay's development. We complete previously reported results on the implementation of the integrated self-standing wireless silicon micro-devices with experiments aiming at investigating the impact on neuronal spheroids of sinusoidal electro-magnetic fields as those required for wireless power and data transmission. Finally, we discuss the technology headway and future perspectives. [ABSTRACT FROM AUTHOR]

This letter describes a single-transistor oscillator implemented on a paper substrate at the operating frequency of 24 GHz, based on a design procedure that makes it possible to overcome the limitations caused by thin high-loss substrates and package parasitics of commercial components. The commercial transistor adopted in the oscillator is led to instability by exploiting its parasitic gate inductance. The drain network compensates for the parasitic inductance of the transistor package and connects the oscillator circuit to a 50- $\Omega $ load resistance. Finally, an external inductor at the source terminal is used to resonate out the capacitive contribution of the circuit at the oscillation frequency. Overall, the active device appears in a quasi-common-drain stage. Experimental results on prototype show that the oscillator exhibits an output power of +6.2 dBm at 24 GHz, with a dc power consumption of 72.5 mW. [ABSTRACT FROM AUTHOR]

River discharge is an important variable to measure in order to predict droughts and flood occurrences. Once the cross-sectional geometry of the river is known, discharge can be inferred from water level and surface flow velocity measurements. Since river discharges are of particular interest during extreme weather events, when river sites cannot be safely accessed, noncontact sensing technologies are particularly appealing. To this purpose, this work proposes a prototype of a low-cost continuous wave (CW) Doppler radar sensor, which is able to monitor the surface flow velocity of rivers. The prototype is tested at two gauged sites in central Italy, along the Tiber River. The surface flow velocity distribution across the river is monitored by means of the analysis of received Doppler signal. The surface velocity statistics are then extracted using a novel algorithm that is optimized to run on a microprocessor platform with minimal computing power (ArduinoUNO). In particular, the radar measurements are used to initialize a 2-D entropy-based velocity model (EVM) that is able to estimate river discharges in any flow condition. Finally, the results concerning the observed discharge provided by the EVM prove to be comparable with those obtained with more expensive commercial solutions. The results are important since the described methodology can be extended to small-size Doppler radar sensors onboard unmanned aerial vehicles (UAVs), the latter providing a method for mapping surface velocity of rivers. [ABSTRACT FROM AUTHOR]

This paper reports a novel oscillator circuit topology based on a transformer-coupled p-network. As a case study, the proposed oscillator topology has been designed and studied for 60 GHz applications in the frame of the emerging fifth generation wireless communications. The analytical expression of the oscillation frequency is derived and validated through circuit simulations. The root-locus analysis shows that oscillations occur only at that resonant frequency of the LC tank. Moreover, a closed-form expression for the quality factor (Q) of the LC tank is derived which shows the enhancement of the equivalent quality factor of the LC tank due to the transformer-coupling. Last, a phase noise analysis is reported and the analytical expressions of phase noise due to flicker and thermal noise sources are derived and validated by the results obtained through SpectreRF simulations in the Cadence design environment with a 28 nm CMOS process design kit commercially available. [ABSTRACT FROM AUTHOR]

This paper presents two 4-bit (16-phase) mm-wave vector modulator phase shifters exploiting a novel in-phase and quadrature signal generator that consists of a single-input double-output cascode amplifier incorporating a lumped-element coupled-line quadrature coupler. The two circuit implementations have been designed and fabricated in a 28 nm fully depleted silicon-on-insulator CMOS. The first (PS1) achieves a higher gain and the second (PS2) has a more compact area (reduced to about 50%). Each consumes 18 mA from a 1.2 V supply. PS1 exhibits an average gain of 2.3 dB at 87.4 GHz and B3\text {dB} from 78.8 to 92.8 GHz; rms gain error of 1.68 dB at 87.4 GHz and <2 dB in the B3\text {dB} ; rms phase error of 9.4° at 87.4 GHz and <11.9° in B3\text {dB} ; S11 <-10.5 dB in B3\text {dB} ; average P1\text {dB} of −7 dBm; and average noise figure (NF) equal to 10.8 dB at 87 GHz. PS2 exhibits an average gain of 0.83 dB at 89.2 GHz and B3\text {dB} from 80.2 to 96.8 GHz; rms gain error of 1.46 dB at 89.2 GHz and <2 dB in B3\text {dB} ; rms phase error of 11.2° at 89.2 GHz and <11.9° in B3\text {dB} ; S11 <-11.5 dB in B3\text {dB} ; average P1\text {dB} of −6 dBm; and average NF of 11.9 dB at 89 GHz. [ABSTRACT FROM AUTHOR]

This paper presents a 67GHz LC oscillator exploiting a three-spiral transformer and implemented in 65nm bulk complementary metal-oxide-semiconductor technology by STMicroelectronics. The three-spiral transformer allows operating with a lower voltage supply, still obtaining good phase noise performance, and achieving a compact design. Measured performances when supplied with 1.2 V are: oscillation frequency of 67 GHz, phase noise ( PN) equal to −96 dBc/Hz at 1 MHz frequency offset from the carrier, power consumption ( PC) equal to 19.2 mW and figure of merit ( FOM) equal to −179.7 dB/Hz. Measured performances when supplied with 0.6 V are: oscillation frequency of 67 GHz; PN equal to −88.7 dBc/Hz at a 1 MHz frequency offset from the carrier; PC equal to 3.6 mW and FOM equal to −179.7 dB/Hz. Copyright © 2016 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]