Search

Cryptography plays consistently an essential role in securing any sort of communications or data broadcast over the network. Since the security of any designed block cipher algorithm is related to its Substitution box (S-box), several efforts have been made by researchers to design a vigorous S-box that maintains flawlessly the cost, performance, and security trade-off. From the literature, we can find a variety of input–output sizes of S-boxes, each of which has its benefits and drawbacks. Therefore, this work introduces a new S-box pattern generation based on the chaotic enhanced logistic map where its chaotic behavior offers good randomness ability, a fact that enhances its unpredictability. In our realization, the intention was the generation of a 5-bit Sbox due to its suitability and cost-effectiveness to be integrated into lightweight cryptosystems. Moreover, the S-box security strength is proved by testing it through numerous cryptanalysis measurements. We can mention non-linearity, bijectivity, linearity, differential cryptanalysis, boomerang attacks resilience, Avalanche effect, and algebraic attacks resilience. The results show that our proposition provides good resistance to the aforementioned attacks and even shows superiority over its 5-bit competitors in terms of non-linearity, differential, Boomerang, and algebraic attack resistance. [ABSTRACT FROM AUTHOR]

Ransomware has emerged as a critical cybersecurity threat, characterized by its ability to encrypt user data or lock devices, demanding ransom for their release. Traditional ransomware detection methods face limitations due to their assumption of similar data distributions between training and testing phases, rendering them less effective against evolving ransomware families. This paper introduces TLERAD (Transfer Learning for Enhanced Ransomware Attack Detection), a novel approach that leverages unsupervised transfer learning and co-clustering techniques to bridge the gap between source and target domains, enabling robust detection of both known and unknown ransomware variants. The proposed method achieves high detection accuracy, with an AUC of 0.98 for known ransomware and 0.93 for unknown ransomware, significantly outperforming baseline methods. Comprehensive experiments demonstrate TLERAD's effectiveness in real-world scenarios, highlighting its adaptability to the rapidly evolving ransomware landscape. The paper also discusses future directions for enhancing TLERAD, including real-time adaptation, integration with lightweight and post-quantum cryptography, and the incorporation of explainable AI techniques. [ABSTRACT FROM AUTHOR]

The rapid rise of emerging technologies, our daily lives are increasingly shaped by a variety of smart devices. These technologies bring convenience and efficiency, transforming how we live and work. However, they also introduce new challenges, particularly concerning privacy and cybersecurity. As more devices become interconnected through the Internet of Things (IoT), the risk of cyber threats grows, making it essential to address these vulnerabilities. This paper explores the various applications of IoT and examines the potential security risks and privacy concerns that accompany these innovations. [ABSTRACT FROM AUTHOR]

Modern technologies of computing cloud are showing great promise, but at the same time create new security challenges that hinder full acceptance. Given that most of these services often use cloud networks as channels for communication, securing data transmission is crucial. This paper introduce a new hybrid encryption algorithm, the proposed two‐layered PRC6 cipher, tailored address security concerns in cloud computing environments with minimal resource constraints. The PRC6 cipher incorporates enhancements from Cha‐cha into an extension of the RC6 cipher. PRC6 implements double encryption. At the first level, the plain text is divided into four equal parts, each encrypted by processes derived from RC6, which include shifting, summation, modulo arithmetic, and XOR with a generated key. The second level incorporates a Quarter round function, among others, to further obscure the encoded message. PRC6 is implemented in a parallel computing model to significantly reduce overall computation time, especially important for lightweight applications. Experimental results show that the algorithm can achieve a high level of security for cloud workloads. It activates parallel mode in just seven encryption rounds, cutting calculation time to 50% in a matter of seconds. Performance evaluations against popular encryption standards also indicate that PRC6 offers promising security benefits when computational resources are limited. This hybrid approach presents a viable solution for strengthening data protection in modern cloud systems and it stand against the most popular attacks like brute force. [ABSTRACT FROM AUTHOR]

With the outstanding growth of Internet of Things (IoT) devices, security and power efficiency of integrated circuits can no longer be overlooked. Current approved standards for cryptographic algorithms are not suitable for constrained environments. In this context, the National Institute of Standards and Technology (NIST) started a lightweight cryptography (LWC) competition to develop new algorithm standards that can be fit into small devices. In 2023, NIST has decided to standardize the Ascon family for LWC. This algorithm has been designed to be more resilient to side-channel and fault-based analysis. Nonetheless, hardware implementations of Ascon have been broken by multiple statistical fault analysis and power analysis. These attacks have underlined the necessity to develop adapted countermeasures to side-channel and perturbation-based attacks. However, existing countermeasures are power and area consuming. In this article, we propose a new countermeasure for the Ascon cipher that does not significantly increase the area and power consumption. Our architecture relies on the nonvolatile feature of the Magnetic Tunnel Junction (MTJ) that is the single element of the emerging Magnetic Random Access Memories (MRAM). The proposed circuit removes the bias exploited by statistical attacks. In addition, we have duplicated and complemented the permutation of Ascon to enhance the power analysis robustness of the circuit. Besides the security aspect, our circuit can save current manipulated data, ensuring energy saving from 11% to 32.5% in case of power failure. The area overhead, compared to an unprotected circuit, is × 2.43 . [ABSTRACT FROM AUTHOR]

Abstract Cryptography plays consistently an essential role in securing any sort of communications or data broadcast over the network. Since the security of any designed block cipher algorithm is related to its Substitution box (S-box), several efforts have been made by researchers to design a vigorous S-box that maintains flawlessly the cost, performance, and security trade-off. From the literature, we can find a variety of input–output sizes of S-boxes, each of which has its benefits and drawbacks. Therefore, this work introduces a new S-box pattern generation based on the chaotic enhanced logistic map where its chaotic behavior offers good randomness ability, a fact that enhances its unpredictability. In our realization, the intention was the generation of a 5-bit Sbox due to its suitability and cost-effectiveness to be integrated into lightweight cryptosystems. Moreover, the S-box security strength is proved by testing it through numerous cryptanalysis measurements. We can mention non-linearity, bijectivity, linearity, differential cryptanalysis, boomerang attacks resilience, Avalanche effect, and algebraic attacks resilience. The results show that our proposition provides good resistance to the aforementioned attacks and even shows superiority over its 5-bit competitors in terms of non-linearity, differential, Boomerang, and algebraic attack resistance.

Some traditional cryptographic techniques, like the Secure Hash Algorithm (SHA-256 for hashing), Rivest-Shamir-Adleman (RSA/Elliptic Curve for signing) and Advanced Encryption Standard (AES for encryption), perform well on systems with good hardware memory and processing capabilities. However, these techniques engage in conflict to keep up with the world of sensor networks and embedded systems. Lightweight cryptography plays a major role in security constraints, especially in resource-limited devices such as RFID tags, smart cards, sensor nodes and IoT. This paper proposes a flexible hardware architecture of lightweight m-Crypton block cipher for high-speed resource-constrained applications. The proposed architecture enables a single architecture appropriate for the many encryptions' key sizes. Therefore, the proposed architecture changes the security level in resource-constrained applications by integrating several key sizes into a single design. Furthermore, this architecture outperformed the conventional block ciphers in terms of throughput-to-area ratio achieving a 10.37 throughput-to-area ratio better than other lightweight block ciphers. The proposed design can be used in high bandwidth applications, high-end RFID and IoT smart devices. Hence, the proposed design demonstrates that increasing the speed of cipher implementation results in more plaintext transformations into ciphertext. All results have been verified and simulated for several Xilinx design suite families.

The Internet of Things (IoT) nodes consist of sensors that collect environmental data and then perform data exchange with surrounding nodes and gateways. Cybersecurity attacks pose a threat to the data security that is being transmitted in any IoT network. Cryptographic primitives are widely adopted to address these threats; however, the substantial computation demands limit their applicability in the IoT ecosystem. In addition, each IoT node varies with respect to the area and throughput (TP) requirements, thus demanding flexible implementation for encryption/decryption processes. To solve these issues, this work implements the NIST lightweight cryptography standard, Ascon, on a SAED 32 nm process design kit (PDK) library by employing loop folded, loop unrolled and fully unrolled architectures. The fully unrolled architecture can achieve the highest TP but at the cost of higher area utilisation. Unrolling by a lower factor results in lower area implementations, enabling the exploration of design space to tackle the trade-off between area and TP performance of the design. The implementation results show that, for loop folded architecture, Ascon-128 and Ascon-128a require 36.7k μ m 2 and 38.5k μ m 2 chip area, respectively compared to 277.1k μ m 2 and 306.6k μ m 2 required by their fully unrolled implementations. The proposed implementation strategies can adjust the number of rounds to accommodate the varied requirements of IoT ecosystems. An implementation with an open-source 45 nm PDK library is also undertaken for enhanced generalization and reproducibility of the results. [ABSTRACT FROM AUTHOR]

The internet of things (IoT) has revolutionized various fields by enabling seamless connectivity and data exchange among numerous devices. However, this interconnectivity introduces significant security challenges, particularly in ensuring data confidentiality, integrity, and authenticity. This study proposes a novel secure open standard framework for IoT applications, addressing these challenges through the integration of elliptic curve cryptography (ECC) and fog computing. The framework consists of three core components: secure device registration, data encryption within the fog gateway, and a robust mechanism for detecting man-in-the-middle (MITM) attacks. The unique aspect of the proposed method lies in its comprehensive approach to IoT security. Utilizing ECC, the framework ensures secure communication among resource constrained IoT devices, balancing encryption strength and efficiency. The integration of fog computing reduces latency and enhances processing efficiency by offloading intensive tasks from IoT devices to the fog layer. The MITM attack detection mechanism continuously monitors cryptographic keys and communication patterns, providing an additional layer of security against advanced cyber threats. The system was implemented and evaluated using the NS-3.26 network simulator and Python for data visualization. The experimental setup included 100 IoT devices, 25 users, a fog gateway, a datacenter, and a cloud server. Results demonstrate the framework's scalability and efficiency, with consistent throughput increases and balanced power consumption across varying IoT device numbers. [ABSTRACT FROM AUTHOR]

Accelerated growth in networking and semiconductor devices led to the increase of Internet-connected devices over recent years. The applications of IoT provide pervasive admittance, scalability, and distribution of data using the cloud for the storage and processing of data. All the actors involved in the grid affect the trust. Managing security and deploying it throughout the IoT environment is required to audit and protect sensitive data. Security management involves authentication to avoid unauthorized entry and encryption at transmission. Though there are standard methodologies employed in data protection in the cloud and network layers, there is a requirement for solutions with low foot-prints suitable for constrained IoT devices. While there are existing lightweight cipher designs performing well with less memory footprint, the performance in the cloud is less compared to traditional cipher techniques. So, a balanced solution with less memory footprint and resistance against various attacks in the cloud environment is required. A lightweight cipher design is proposed to enable secure communication among devices through the cloud, which is combined with Elliptic Light (ELLI) and an Authentication Function (AF) is proposed using RC4 to ensure integrity and authentication and exchange secret key. The cipher design proposed provides increased efficiency and fixes the weakness in standard lightweight algorithms. This algorithm is simple and efficient, with 60% less memory utilization and 53% less execution time than other lightweight solutions. The stability is high in linear and differential cryptanalysis and resistive against DDoS attacks. [ABSTRACT FROM AUTHOR]

With the exponential growth of the Internet of Things (IoT), ensuring robust end-to-end encryption is paramount. Current cryptographic accelerators often struggle with balancing security, area efficiency, and power consumption, which are critical for compact IoT devices and system-on-chips (SoCs). This work presents a novel approach to designing substitution boxes (S-boxes) for Advanced Encryption Standard (AES) encryption, leveraging dual quad-bit structures to enhance cryptographic security and hardware efficiency. By utilizing Algebraic Normal Forms (ANFs) and Walsh–Hadamard Transforms, the proposed Register Transfer Level (RTL) circuitry ensures optimal non-linearity, low differential uniformity, and bijectiveness, making it a robust and efficient solution for ASIC implementations. Implemented on 65 nm CMOS technology, our design undergoes rigorous statistical analysis to validate its security strength, followed by hardware implementation and functional verification on a ZedBoard. Leveraging Cadence EDA tools, the ASIC implementation achieves a central circuit area of approximately 199 μm2. The design incurs a hardware cost of roughly 80 gate equivalents and exhibits a maximum path delay of 0.38 ns. Power dissipation is measured at approximately 28.622 μW with a supply voltage of 0.72 V. According to the ASIC implementation on the TSMC 65 nm process, the proposed design achieves the best area efficiency, approximately 66.46% better than state-of-the-art designs. [ABSTRACT FROM AUTHOR]

As communication capabilities of mobile devices continue to advance, ensuring reliability and security has become increasingly crucial. The aerial tracking system presented in this paper provides a useful solution for tracking and tracing objects in various scenarios. To ensure reliability and security, the system incorporates appropriate mechanisms, including Lightweight Cryptography, to prioritize confidentiality and integrity. The Android component of the system has two modes of operation: Tracker Mode, running on a smartphone mounted on a drone (RPA), and Client Mode, running on mobile devices on the ground. In Client Mode, users transmit their positioning and trajectory information via Bluetooth Low Energy beacon mode, which is then relayed to the server backend via the 4G/5G network once the RPA enters an area with coverage. The system provides a reliable and secure solution for situations where tracking and tracing are essential, such as the supervision and control of public areas with capacity control or tracking and localizing people in isolated environments. [ABSTRACT FROM AUTHOR]

In resource-intensive Internet of Things applications, Lightweight Stream Ciphers (LWSCs) play a vital role in influencing both the security and performance of the system. Numerous LWSCs have been proposed, each offering certain properties and trade-offs that carefully balance security and performance requirements. This paper presents a comprehensive evaluation of prominent LWSCs, with a focus on their performance and resource consumption, providing insights into efficiency, efficacy, and suitability in the real-world application of resource-intensive live video feed encryption on an ARM processor. The study involves the development of a benchmarking tool designed to evaluate key metrics, including encryption frame rate, throughput, processing cycles, memory footprint, ROM utilization, and energy consumption. In addition, we apply the E−Rank metric, which combines key performance and resource metrics to derive a unified comparative measure for overall software performance. [ABSTRACT FROM AUTHOR]

Emerging technology like Internet of Things (IoT) seeks to facilitate the linking of numerous smart devices and diverse networks. IoT enabled platform architecture heavily relies on ad hoc networks because of their efficient, adaptable, low-cost, and dynamic infrastructures. To keep Quality of Service (QoS) intact in a multi-hop transmission, these networks make good use of the resources that are available. Secure and trustworthy data transmission is crucial because malevolent relay nodes can occur in multi-hop communication. Quality of service is considered in the suggested secure communication approach for networks based on the IoT that uses a trusted route model. Routing and security are the two most important components of a wireless network. With massive networks like the Internet of Things, these instances become two times as important. The novel nature of the IoT makes its far-reaching repercussions on healthcare stand out, yet it has had an influence on many aspects of society. When coupled with mobile computing, the IoT becomes even more beneficial due to mobile computing's characteristics. The beneficial impacts of the Internet of Things on healthcare are mostly attributable to mobile health, which is enabled by mobile computing. Wearables flood Internet of Things devices with data from their many sensors, actuators, and transceivers. Data on the IoT is vulnerable to a plethora of threats, assaults, and vulnerabilities. Consequently, a strong security solution is required to resolve concerns regarding the privacy, security, and vulnerabilities of the Internet of Things. This research presents an efficient routing protocol-based architecture for the secure and scalable transfer of healthcare data in the IoT. The presence of malicious nodes makes this network vulnerable to numerous attacks. This research presents a brief comparative analysis on the proposed routing model, group key management model and malicious nodes detection model in which these models are compared with the traditional models. The comparative analysis showed that the proposed models are efficient and effective in providing Denial of Service (DoS). [ABSTRACT FROM AUTHOR]

The Internet of Vehicles (IoV) revolutionizes vehicle communication in dynamic networks. Message dissemination in IoV involves sharing critical information for the safety and convenience of the IoV network. It is very crucial to secure message dissemination due to potential cyber‐attacks, traffic disruptions, and privacy breaches. Data integrity, authentication, and privacy are vital to maintaining trust and safety in the IoV network. This network consists of resource‐constrained IoV devices with limited resources due to the availability of embedded components in vehicular systems. Therefore, optimizing algorithms and protocols is crucial for efficient vehicle‐to‐everything (V2X) communication, enhancing safety and transportation efficiency. Solutions often include lightweight protocols and secure message exchange. This paper proposes a machine learning (ML) based secure and lightweight message dissemination framework for resource‐constrained IoV. First, we present an ML‐based threat classification model capable of effectively categorizing adversarial and nonadversarial data streams and delivering an optimized model with superior accuracy. Furthermore, we also propose a secure message dissemination scheme using lightweight cryptographic primitives, which significantly reduces computational, communication, and energy overhead. To validate the robustness of our proposed ML‐based secure and lightweight message dissemination framework, we evaluate it using various security parameters and performance measures such as computation cost, communication cost, energy cost, accuracy, precision, recall, and F1‐score. Our contributions promise to significantly enhance the security and efficiency of message dissemination in IoV environments and advance lightweight, secure, and reliable transportation systems for the future. [ABSTRACT FROM AUTHOR]

Midori64 is a lightweight SPN block cipher introduced by Banik et al. at ASIACRYPT 2015 and it operates on 64-bit states through 16 rounds using a 128-bit key. In the last decade, Midori64 has been exposed to several attacks. In this paper, to the best of our knowledge, we provide the first boomerang attack on Midori64 in the literature. For this purpose, firstly, we present a practical single key 7-round boomerang attack on Midori64, improving the mixture idea of Biryukov by a new technique which we call “mixture pool”, and then extend our attack up to 9 rounds with time complexity 2122.3, and memory and data complexity 236. (The authors of Midori stated that they expect much smaller rounds than eight rounds of Midori64 are secure against boomerang-type attacks.) We also emphasize that the mixture pool idea provides a kind of data-memory tradeoff and presents more usefulness for boomerang-type attacks. [ABSTRACT FROM AUTHOR]

The escalating connectivity of devices in the Internet of Things (IoT) era necessitates robust security measures while accommodating resource constraints. Lightweight cryptography addresses this need, focusing on algorithm development for devices with limited resources. This research proposes the Lightweight Crypto System (LCS) as a hybrid cryptosystem, integrating the Lightweight Symmetric Algorithm (LSA) and the Lightweight Hash Algorithm (LHA). LSA is a modified AES-128 variant, enhancing data confidentiality, while LHA, derived from SHA-256, verifies data integrity. The study evaluates the proposed LCS on criteria such as execution time, memory usage, avalanche effect, collision resistance, and entropy, emphasizing the optimal balance between performance and security achieved by LSA and LHA. The findings position LCS as a compelling solution for securing IoT devices without compromising on stringent security requirements. [ABSTRACT FROM AUTHOR]

The increasing number of internet of things (IoT) devices, wearable technologies, and embedded systems has experienced a significant increase in recent years. This surge has brought attention to the necessity for cryptographic algorithms that are lightweight and capable of providing security in resource-constrained environments. The primary objective of lightweight block ciphers is to provide encryption capabilities with minimal computational overhead and decreased power consumption. As a result, they are particularly well-suited for use on devices that have limited resources. At the same time, machine learning methodologies have evolved into powerful mechanisms for the purposes of prediction, categorization, and system optimization. This study introduces a challenges and issues involved in integrating machine learning techniques with the development of lightweight block ciphers. [ABSTRACT FROM AUTHOR]

The Internet of Things (IoT) will soon penetrate every aspect of human life. Several threats and vulnerabilities are present due to the different devices and protocols used in an IoT system. Conventional cryptographic primitives or algorithms cannot run efficiently and are unsuitable for resource-constrained devices in IoT. Hence, a recently developed area of cryptography, known as lightweight cryptography, has been introduced, and over the years, numerous lightweight algorithms have been suggested. This paper gives a comprehensive overview of the lightweight cryptography field and considers various popular lightweight cryptographic algorithms proposed and evaluated over the past years for analysis. Different taxonomies of the algorithms and other associated concepts were also provided, which helps new researchers gain a quick overview of the field. Finally, a set of 11 selected ultra-lightweight algorithms are analyzed based on the software implementations, and their evaluation is carried out using different metrics.

Nowadays, the Internet of Things (IoT) enables the creation of a wide range of new services, including smart cities, agriculture, energy, technology, healthcare, and other security concerns. Safety concerns currently limit the development of this advanced technology. On the other hand, traditional security protocols and existing solutions cannot be used for IoT because most of them cannot guarantee good performance. Furthermore, they are often severely limited in terms of storage, computing power, and performance. The aim of the proposed research is to introduce a secure verification framework for user authentication, with a special focus on the communication between access points and node databases. The main goal is to increase the level of security within the proposed approach, ensuring the confidentiality, integrity, and availability of the image verification system during the authentication process. To achieve this goal, three phases were implemented. First, a new hybrid biometric pattern is proposed that merges image and password features to enhance the security of user authentication. Second, lightweight Encryption and Blockchain technologies are also utilized to ensure secure communication of patterns between the access point and the node database. Finally, in order to verify authenticity, a new proposed matching process involves comparing image and password features with the database records. The experimental analysis has been carried out in terms of accuracy, False Rejection Rate (FRR), False Acceptance Rate (FAR), and error rate. The proposed approach attained an accuracy of 98%, FAR of 0.1, FRR of 0.992, and an error rate of 0.017. [ABSTRACT FROM AUTHOR]

In this paper, we discuss the quantum circuit implementations of the lightweight authenticated encryption algorithm ASCON by using the NOT gates, CNOT gates, Toffoli gates, measurements, and the dynamic quantum circuits. Firstly, the quantum circuit of addition of constants is realized by adding the NOT gates according to the position of 1 in round constants. Secondly, the quantum circuit of S-box of the permutation is synthesized according to the classical circuit diagram of S-box. Then the linear layer functions are expressed in matrix form, and their quantum circuits are synthesized according to Gaussian elimination. Finally, we synthesize the whole quantum circuits according to the general diagrams of the authenticated encryption algorithm ASCON. The correctness of the quantum circuits of the S-box and the linear layer was verified by the Aer simulator of the IBM Quantum platform. As far as we know, this is the first implementation of the quantum circuits for the Authenticated Encryption with Associated Data (AEAD) of ASCON in-place. The maximum quantum resources for the three ASCON authenticated encryption algorithms were estimated. The quantum circuit of ASCON-128 uses a total of 320 qubits, 30,639 NOT gates, 128,814 CNOT gates, 8064 Toffoli gates, 10,752 measurements, and 5376 dynamic quantum circuits. The quantum circuit of ASCON-128a uses a total of 320 qubits, 23,558 NOT gates, 98,144 CNOT gates, 6144 Toffoli gates, 8192 measurements, and 4096 dynamic quantum circuits. The quantum circuit of ASCON-80pq uses a total of 320 qubits, 30,736 NOT gates, 128,814 CNOT gates, 8064 Toffoli gates, 10,752 measurements, and 5376 dynamic quantum circuits. [ABSTRACT FROM AUTHOR]

The HetIoT is a new emergent technology widely used to offer QoS to applications such as health monitoring systems, agriculture 4.0, traffic monitoring, industry 4.0, and civil defense, to name a few. These applications are in high demand as the world is heading towards 6G technology that facilitates a high data transfer rate and faster connectivity. However, technological leaps open the door to invaders, triggering security breaches. Therefore, the article aims to entail security challenges and issues from the HetIoT viewpoint. The conventional approaches need to be revised to handle new trends of security holes and demand advancement in them. As a result, the article systematically reviews the current state-of-the-art traditional techniques, including cryptography, privacy and trust, and access control mechanism. The article exhibits its challenges, open issues, and solution as lightweight protocols and lightweight cryptography concerning traditional approaches. In recent years, a lot of concentration is towards developing intelligent security (IS) mechanisms for HetIoT. Intelligent techniques are data-hungry, and HetIoT emits massive amounts of data, so the use of IS techniques to safeguard the HetIoT is an ideal solution. Therefore, the article also concentrates on IS techniques, including machine learning (ML), deep learning (DL), and deep reinforcement learning (DRL), along with their challenges and open issues. Further, the article details the available benchmarking security-based dataset and experimental tools, platforms, and simulators for the HetIoT. Finally, the review article discusses open research issues and future trends for achieving high security in the HetIoT context. [ABSTRACT FROM AUTHOR]

As the Internet of Things (IoT) continues to revolutionize value-added services, its conventional architecture exhibits persistent scalability and security vulnerabilities, jeopardizing the trustworthiness of IoT-based services. These architectural limitations hinder the IoT's Sensor-as-a-Service (SEaaS) model, which enables the commercial transmission of sensed data through cloud platforms. This study proposes an innovative computational framework that integrates decentralized blockchain technology into the IoT architectural design, specifically enhancing SEaaS efficiency. This research contributes to an optimized IoT architecture with decentralized blockchain operations and simplified public key encryption. Furthermore, this study introduces an advanced SEaaS model featuring innovative trading operations for sensed data among diverse stakeholders. At its core, this model presents a unique blockchain-based data-sharing mechanism that manages multiple aspects, from enrollment to validation. Evaluations conducted in a standard Python environment indicate that the proposed SEaaS model outperforms existing blockchain-based data-sharing models, demonstrating approximately 40% less energy consumption, 18% increased throughput, 16% reduced latency, and a 25% reduction in algorithm processing time. Ultimately, integrating a lightweight authentication mechanism using simplified public key cryptography within the blockchain establishes the model's potential for efficient and secure data-sharing in IoT. [ABSTRACT FROM AUTHOR]

Ensuring data security and integrity is crucial for achieving the highest level of protection and performance in modern cyber-physical systems (CPS). Authenticated encryption with associated data (AEAD) is an efficient and secure way to encrypt data that ensures confidentiality and authenticity. The proposed work focuses on image encryption using the TinyJAMBU cipher within the AEAD scheme. In this paper, image encryption using the TinyJAMBU cipher with software and hardware modeling has been proposed, and image encryption evaluation over standard matrices has been performed. The hardware architecture for TinyJAMBU has been implemented on the Xilinx Virtex-7 FPGA device. The implementation results are compared with the realization of other contemporary ciphers that make TinyJAMBU-128’s implementation better in terms of look-up tables (LUTs), slice utilization, and power consumption. In the experimentation phase, the results of TinyJAMBU-128/192/256 for image encryption have been compared with existing image encryption techniques. It has been observed that, compared to other implementations, the proposed image encryption application using TinyJAMBU provides better results for PSNR, MSE, RMSE, and UACI. [ABSTRACT FROM AUTHOR]

Cryptographic devices' complexity necessitates fast security simulation environments against fault attacks. SystemC, a promising candidate in Electronic System Levels (ESLs), can achieve higher simulation speeds while maintaining accuracy and reliability, and its modular and hierarchical design allows for efficient modeling of complex cryptographic algorithms and protocols. However, code modification is required for fault injection and detection. Aspect-Oriented Programming (AOP) can test cryptographic models' robustness without modifications, potentially replacing real cryptanalysis schemes and reducing the time and effort required for fault injection and detection. Through the utilization of a fault injection/detection environment, this paper presents a novel approach to simulating the security fault attacks of ASCON cryptographic systems at the ESL. The purpose of this methodology is to evaluate the resistance of ASCON SystemC models against fault attacks. The proposed methodology leverages the advantages of AOP to enhance the fault injection and detection process. By applying AOP techniques, we inject faults into the SystemC models without making any changes to the main codebase. This approach not only improves the efficiency of testing cryptographic systems but also ensures that the main functionality remains intact during the fault injection process. The methodology was validated using three scenarios and SystemC ASCON as a case study. The first simulation involved evaluating fault detection capabilities, the second focused on the impact of AOP on executable file size and simulation time, and the third focused on the ESL impact on the ASCON design process. Simulation results show that this methodology can perfectly evaluate the robustness of the ASCON design against fault injection attacks with no significant impact on simulation time and file executable size. Additionally, the simulation results prove that the ASCON development life cycle at the ESL reduces the amount of time devoted to the design procedure by 83.34%, and the ASCON security attack simulations at the ESL decrease the simulation time by 40% compared to the register transfer level (RTL). [ABSTRACT FROM AUTHOR]

Abstract The Internet of Things (IoT) security is a highly challenging research domain. The IoT user devices frequently function in vulnerable platforms that cause many security problems that can be considered. The model lightweight cryptographic (LWC) method stake place to reflect the importance of cryptographic systems which offer safety with the employ of an effectual count of resources. The purpose of the lightweight system's design is to strike a balance in many features like low resource demand, performance, and cryptographic algorithm stability and strength. Therefore, this study develops a new Improved Lightning Search Algorithm based End-to-End Lightweight Partially Homomorphic Encryption Approach (ILSA-LPHEA) for Securing the IoT Environment. For securing the data in the IoT environment, a lightweight partially homomorphic encryption (PHE) approach is used. Since key generation remains an important process to establish secure data transmission among IoT devices and servers, the ILSA is used. The hybridization of lightweight encryption with PHE strategy provides better security by enhancing privacy, confidentiality, and authentication, enabling end-to-end encryption. A detailed experimental result analysis highlighted the better solution of the ILSA-LPHEA algorithm with recent models.

The efficient execution of a Lightweight Cryptography (LWC) algorithm is essential for edge computing platforms. Dedicated Instruction Set Extensions (ISEs) are often included for this purpose. We propose the CrISA-X-a Cryptography Instruction Set Architecture eXtensions designed to improve cryptographic latency on extendable processors. CrISA-X, provides enhanced speed of various algorithms simultaneously while optimizing ISA adaptability, a feat yet to be accomplished. The extension, diverse for several computation levels, is first tailored explicitly for individual algorithms and sets of LWC algorithms, depending on performance, frequency, and area trade-offs. By diligently applying the Min-Max optimization technique, we have configured these extensions to achieve a delicate balance between performance, area utilization, code size, etc. Our study presents empirical evidence of the performance enhancement achieved on a synthesis modular RISC processor. We offer a framework for creating optimized processor hardware and ISA extensions. The CrISA-X outperforms ISA extensions by delivering significant performance boosts between 3x to 17x while experiencing a relative area cost increase of +12% and +47% in LUTs. Notably, as one important example, the utilization of the ASCON algorithm yields a 10x performance boost in contrast to the base ISA instruction implementation.

Decentralized Edge Computing Networks (DECN) environments have emerged with the advent of the IoT to reduce delays, bringing data processing closer to where the data is generated to improve the processing of volumetric data at high speed instead of being sent to clouds to facilitate real-time applications. However, the security and privacy of the data exchanged among the edge devices need more consideration, considering its sensitivity and importance. Computational Diffie-Hellman (CDH) can be used to protect data exchange from malicious attacks. Unfortunately, CDH is vulnerable to man-in-the-middle attacks and lacks mutual authentication. Therefore, considering the computational power of devices in the DECN environment, this article presents a Modified CDH-based Secure and Lightweight Key Agreement Protocol (MCDH-SKLAP) to secure communication in the DECN. The proposed protocol has undergone a thorough analysis for robustness under ROM and ProVerif threat models, instilling confidence in its security aspects. Furthermore, the performance analysis results show it has low computation and communication overhead, making it suitable for use with resource-limited devices in the DECN environment. The proposed MCDH-SKLAP has achieved a 35% to 81% improvement in computation overhead and an 8.5% to 30% improvement in communication overhead.

In this paper, we present hardware implementations of the lightweight TinyJAMBU cipher with reduced power consumption using a mechanism based on shift register parallelization. The power consumption in digital circuits depends linearly on the switching activity of the logic gates. The parallelization technique reduces the number of switches per clock cycle of the shift registers, which can significantly reduce power consumption. This technique has been applied to the TinyJAMBU cipher, a finalist in the NIST lightweight cryptography standardization process with the lowest resource and power consumption. The implementations we present use the logical parallelization technique in the cipher’s NLFSR, which is the basic block of TinyJAMBU, and in the key register. Measurements with data from various post-place and route simulations, performed for the Xilinx 7-Series family of FPGAs, are presented to demonstrate the effectiveness of the proposed technique in reducing power consumption, achieving a reduction of more than 30% in dynamic power consumption compared to the standard implementation, with almost no increase in resource consumption. Therefore, the ciphers hardware implementations proposed in this paper are highly suitable for use as hardware peripherals in applications with severe constraints on available resources and power, such as low-power microcontrollers that are widely used in the IoT field.

This research work explores the growing role of IoT devices in daily life and the increasing demand for secure data transmission in different sectors like healthcare, military, etc. Moreover, this study focuses on the recent advancements in lightweight cryptography and compares various encryption algorithms in an IoT environment using real-time data. Employing Message Queuing Telemetric Transport (MQTT) protocol, this research work assess the time of encryption, memory usage, and CPU usage as key parameters. By standardizing iterations, key width, and block length, this study aims to identify optimal encryption solutions for IoT applications. [ABSTRACT FROM AUTHOR]

There are many emerging areas in which highly constrained devices are interconnected and communicated to accomplish some tasks. Nowadays, Internet of Things (IoT) enables many low resources and constrained devices to communicate, compute process and make decision in the communication network. In the heterogeneous environments for IoT, there are many challenges and issues like power consumption of devices, limited battery, memory space, performance cost, and security in the Information Communication Technology (ICT) network. In this paper, we discuss a state-of-art of lightweight cryptographic primitives which include lightweight block ciphers, hash function, stream ciphers, high performance system, and low resources device for IoT environment in details. We analyze many lightweight cryptographic algorithms based on their key size, block size, number of rounds, and structures. In addition, we discuss the security architecture in IoT for constrained device environment, and focus on research challenges, issues and solutions. Finally, a proposed security scheme with a service scenario for an improvement of resource constrained IoT environment and open issues are discussed. [ABSTRACT FROM AUTHOR]

Rapid technological developments prompted a need to do everything from anywhere and that is growing due to the modern lifestyle. The Internet of Things (IoT) technology is helping to provide solutions by interconnecting smart devices. Lightweight block ciphers are deployed to enable security in such devices. In this paper, a new lightweight block cipher RAZOR is proposed that is based on a hybrid design technique. The round function of RAZOR is designed by mixing the Feistel and substitution permutation network techniques. The rotation and XOR-based diffusion function is applied on the 32-bit input with 8 branches to optimize the security. The strength of RAZOR is proven against differential, linear, and impossible differential attacks. The number of active S-boxes in any 5-round differential characteristic of RAZOR is 21 in comparison to the 10, 6, 4, 7, and 6 for PRESENT, Rectangle, LBlock, GIFT, and SCENERY respectively. RAZOR provides better security than the existing lightweight designs. The average throughput of 1.47 MB/second to encrypt large files makes it a better choice for software-oriented IoT applications. [ABSTRACT FROM AUTHOR]

Maximum distance separable (MDS) matrices are often used in the linear layer of a block cipher due to their good diffusion property. A well-designed lightweight MDS matrix, especially an involutory one, can provide both security and performance benefits to the cipher. Finding the corresponding effective linear straight-line program (SLP) of the circuit of a linear layer is still a challenging problem. In this article, first, we propose a new heuristic algorithm called Superior Boyar-Peralta (SBP) in the computation of the minimum number of two-input Exclusive-OR (XOR) gates with the minimum circuit depth for the SLPs. Contrary to the existing global optimization methods supporting only two-input XOR gates, SBP heuristic algorithm provides the best global optimization solutions, especially for extracting low-latency circuits. Moreover, we give a new 4 × 4 involutory MDS matrix over F24, which requires only 41 XOR gates and depth 3 after applying SBP heuristic, whereas the previously best-known cost is 45 XOR gates with the same depth. In the second part of the article, for further optimization of the circuit area of linear layers with multiple-input XOR gates, we enhance the recently proposed BDKCI heuristic algorithm by incorporating circuit depth awareness, which limits the depth of the circuits created. By using the proposed circuit depth-bounded version of BDKCI, we present better circuit implementations of linear layers of block ciphers than those given in the literature. For instance, the given circuit for the AES MixColumn matrix only requires 44 XOR gates/depth 3/240.95 GE in the STM 130 nm (simply called ASIC4) library, while the previous best-known result is 55 XOR gates/depth 5/243.00 GE. Much better, our new 4 × 4 involutory MDS matrix requires only 19 XOR gates/depth3/79.75 GE in the STM 90 nm (simply called ASIC1) library, which is the lightest and superior to the state-of-the-art results. [ABSTRACT FROM AUTHOR]

As the popularity of 3D printing or additive manufacturing (AM) continues to increase for use in commercial and defense supply chains, the requirement for reliable, robust protection from adversaries has become more important than ever. Three-dimensional printing security focuses on protecting both the individual Industrial Internet of Things (I-IoT) AM devices and the networks that connect hundreds of these machines together. Additionally, rapid improvements in quantum computing demonstrate a vital need for robust security in a post-quantum future for critical AM manufacturing, especially for applications in, for example, the medical and defense industries. In this paper, we discuss the attack surface of adversarial data manipulation on the physical inter-device communication bus, Controller Area Network (CAN). We propose a novel, hierarchical tree solution for a secure, post-quantum-supported security framework for CAN-based AM devices. Through using subnet hopping between isolated CAN buses, our framework maintains the ability to use legacy or third-party devices in a plug-and-play fashion while securing and minimizing the attack surface of hardware Trojans or other adversaries. The results of the physical implementation of our framework demonstrate 25% and 90% improvement in message costs for authentication compared to existing lightweight and post-quantum CAN security solutions, respectively. Additionally, we performed timing benchmarks on the normal communication (hopping) and authentication schemes of our framework. [ABSTRACT FROM AUTHOR]

Physical Unclonable Function (PUF) has recently attracted interest from both industry and academia as a potential alternative approach to secure Internet of Things (IoT) devices from the more traditional computational-based approach using conventional cryptography. PUF is a promising solution for lightweight security, where the manufacturing fluctuation process of integrated circuits is used to improve the security of IoT, as it provides low complexity design and preserves secrecy. PUF provides a low-cost low-power solution and can be implemented in both Field Programmable Gate Arrays and Application-Specific Integrated Circuits. In this survey, we provide a comprehensive review of the state of the art of PUF, its architectures, protocols, and security for IoT. [ABSTRACT FROM AUTHOR]

With the rapid development of the Internet of Things (IoT), IoT applications face more and more security threats. However, IoT devices are resource-constrained and need lightweight encryption schemes. In this paper, a new lightweight stream cipher DCC-128 based on the nonlinear chaotic coupling function is proposed. Inspired by a dynamically coupled chaotic map, a state-driven approach to changing the chaotic coupling structure is used to enhance security. The proposed chaotic function has good dynamical performance and can be easily implemented on the hardware platforms, thus it is used as the main nonlinear drive of DCC-128. With simple operations such as modular addition, shift, and XOR, DCC-128 has high implementation efficiency and is a hardware-oriented design. The security analysis indicates that common attacks are not likely to affect its security. The hardware performance is compared with the lightweight cryptographic standards and the latest lightweight ciphers. Moreover, the recommended randomness test shows good statistical properties, we believe that DCC-128 is less vulnerable to distinguishing attacks. All results show that DCC-128 is a competitive lightweight stream cipher for resource-constrained devices. [ABSTRACT FROM AUTHOR]

It is known that the sponge construction is tightly indifferentiable from a random oracle up to around 2c/2 queries, where c is the capacity. In particular, it cannot provide generic security better than half of the underlying permutation size. In this paper, we aim to achieve hash function security beating this barrier. We present a hashing mode based on two b-bit permutations named the double sponge. The double sponge can be seen as the sponge embedded within the double block length hashing paradigm, making two permutation calls in parallel interleaved with an efficient mixing function. Similarly to the sponge, the permutation size is split as b = r+c, and the underlying compression function absorbs r bits at a time. We prove that the double sponge is indifferentiable from a random oracle up to around 22c/3 queries. This means that the double sponge achieves security beyond the birthday bound in the capacity. In addition, if c > 3b/4, the double sponge beats the birthday bound in the primitive size, to our knowledge being the first hashing mode based on a permutation that accomplices this feature.

Abstract It is challenging to devise lightweight cryptographic primitives efficient in both hardware and software that can provide an optimum level of security to diverse Internet of Things applications running on low-end constrained devices. Therefore, an efficient hardware design approach that requires some specific hardware resource may not be efficient if implemented in software. Substitution bit Permutation Network based ciphers such as PRESENT and GIFT are efficient, lightweight cryptographic hardware design approaches. These ciphers introduce confusion and diffusion by employing a 4 × 4 static substitution box and bit permutations. The bit-wise permutation is realised by simple rerouting, which is most cost-effective to implement in hardware, resulting in negligible power consumption. However, this method is highly resource-consuming in software, particularly for large block-sized ciphers, with each single-bit permutation requiring multiple sub-operations. This paper proposes a novel software-based design approach for permutation operation in Substitution bit Permutation Network based ciphers using a bit-banding feature. The conventional permutation using bit rotation and the proposed approach have been implemented, analysed and compared for GIFT and PRESENT ciphers on ARM Cortex-M3-based LPC1768 development platform with KEIL MDK used as an Integrated Development Environment. The real-time performance comparison between conventional and the proposed approaches in terms of memory (RAM/ROM) footprint, power, energy and execution time has been carried out using ULINKpro and ULINKplus debug adapters for various code and speed optimisation scenarios. The proposed approach substantially reduces execution time, energy and power consumption for both PRESENT and GIFT ciphers, thus demonstrating the efficiency of the proposed method for Substitution bit Permutation Network based symmetric block ciphers.

In resource-intensive Internet of Things applications, Lightweight Stream Ciphers (LWSCs) play a vital role in influencing both the security and performance of the system. Numerous LWSCs have been proposed, each offering certain properties and trade-offs that carefully balance security and performance requirements. This paper presents a comprehensive evaluation of prominent LWSCs, with a focus on their performance and resource consumption, providing insights into efficiency, efficacy, and suitability in the real-world application of resource-intensive live video feed encryption on an ARM processor. The study involves the development of a benchmarking tool designed to evaluate key metrics, including encryption frame rate, throughput, processing cycles, memory footprint, ROM utilization, and energy consumption. In addition, we apply the E−Rank metric, which combines key performance and resource metrics to derive a unified comparative measure for overall software performance.

The Internet of Things (IoT) has gained popularity in various fields, including components such as embedded devices and wireless sensors. However, ensuring the security of data transmission from these devices is of critical importance. In light of these challenges, a novel lightweight encryption method called DRcipher is proposed in this paper for resource-constrained IoT devices. DRcipher has a 64-bit block size and supports either 96-bit or 128-bit key sizes. In order to improve the security, DRcipher employs a pseudo-random number of encryption rounds determined by the primary key. DRcipher adopts the structure of Generalized Feistel Network (GFN) with 4 branches, and its round functions consist of F-function, FF-function and RP permutation components. In particular, there is a negative feedback mechanism between the FF-function and the overall round of encryption functions. In addition, DRcipher is synthesised using Synopsys Design Compiler version A-2007.12-SP1 and the UMCL18G212T3 standard cell library. DRcipher-96 has an area footprint of 1546 Gate Equivalents (GE), while DRcipher-128 has a slightly larger area footprint of 1646 GE. Moreover, a comprehensive security analysis shows that the proposed DRcipher ensures high-level security redundancy against differential cryptanalysis, linear cryptanalysis, and so on.

Maximum distance separable (MDS) matrices are often used in the linear layer of a block cipher due to their good diffusion property. A well-designed lightweight MDS matrix, especially an involutory one, can provide both security and performance benefits to the cipher. Finding the corresponding effective linear straight-line program (SLP) of the circuit of a linear layer is still a challenging problem. In this article, first, we propose a new heuristic algorithm called Superior Boyar-Peralta (SBP) in the computation of the minimum number of two-input Exclusive-OR (XOR) gates with the minimum circuit depth for the SLPs. Contrary to the existing global optimization methods supporting only two-input XOR gates, SBP heuristic algorithm provides the best global optimization solutions, especially for extracting low-latency circuits. Moreover, we give a new 4 × 4 involutory MDS matrix over F24, which requires only 41 XOR gates and depth 3 after applying SBP heuristic, whereas the previously best-known cost is 45 XOR gates with the same depth. In the second part of the article, for further optimization of the circuit area of linear layers with multiple-input XOR gates, we enhance the recently proposed BDKCI heuristic algorithm by incorporating circuit depth awareness, which limits the depth of the circuits created. By using the proposed circuit depth-bounded version of BDKCI, we present better circuit implementations of linear layers of block ciphers than those given in the literature. For instance, the given circuit for the AES MixColumn matrix only requires 44 XOR gates/depth 3/240.95 GE in the STM 130 nm (simply called ASIC4) library, while the previous best-known result is 55 XOR gates/depth 5/243.00 GE. Much better, our new 4 × 4 involutory MDS matrix requires only 19 XOR gates/depth3/79.75 GE in the STM 90 nm (simply called ASIC1) library, which is the lightest and superior to the state-of-the-art results.

WG-5 is a lightweight stream cipher proposed for usage in the resource-constrained devices, e.g., passive RFID tags, industrial controllers, contactless smart cards and sensors. In this paper, a weakness called slide property of WG-5 which has not been discovered in previous works is for the first time explored and analyzed. The result shows that the probability that two related key-IV pairs of WG-5 generate the shifted keystreams can be up to 2−20, which is significantly high compared with an ideal stream cipher that generates the random keystreams. The correctness and accuracy of this theoretical probability is confirmed experimentally. Based on the slide property of WG-5, some key recovery attacks on WG-5 in the related key setting are proposed. The cryptanalytic result shows that the 80-bit secret key of WG-5 can be recovered with a time complexity of 225.615, requiring 6 related keys and 80 keystream bits for each of 224.585 chosen IVs. The experimental result validates our attack and shows that WG-5 can be broken within about 92.054 seconds on a common PC in the related key setting. These results imply that the design of WG-5 is far from optimal and needs to be strengthened to provide enough security for the lightweight constrained applications.

The IoT technology is currently used in many areas and marked by growing popularity. On the one hand, the IoT makes our lives easier, on the other hand, it presents challenges in terms of security and privacy protection. An IoT infrastructure is characterized by a high level of threats due to, inter alia, numerous technical barriers that make it difficult to use conventional methods to protect information. The aim of this paper is to present a symmetric coding algorithm based on algebraic groups generated by specific trigonometric curves. The algorithm is dedicated to short data sequences transmitted by devices with limited computing power.

Determining bounds on the differential probability of differential trails and the squared correlation contribution of linear trails forms an important part of the security evaluation of a permutation. For Xoodoo, such bounds were proven using the trail core tree search technique, with a dedicated tool (XooTools) that scans the space of all r-round trails with weight below a given threshold Tr. The search space grows exponentially with the value of Tr and XooTools appeared to have reached its limit, requiring huge amounts of CPU time to push the bounds a little further. The bottleneck was the phase called trail extension where short trails are extended to more rounds, especially in the backward direction. In this work, we present a number of techniques that allowed us to make extension much more efficient and as such to increase the bounds significantly. Notably, we prove that the minimum weight of any 4-round trail is 80, the minimum weight of any 6-round trail is at least 132 and the minimum weight of any 12-round trail is at least 264, both for differential and linear trails. As a byproduct we found families of trails that have predictable weight once extended to more rounds and use them to compute upper bounds for the minimum weight of trails for arbitrary numbers of rounds.

In recent years, lightweight cryptography has been a hot field in symmetric cryptography. One of the most crucial problems is to find low-latency implementations of linear layers. The current main heuristic search methods include the Boyar-Peralta (BP) algorithm with depth limit and the backward search. In this paper we firstly propose two improved BP algorithms with depth limit mainly by minimizing the Euclidean norm of the new distance vector instead of maximizing it in the tie-breaking process of the BP algorithm. They can significantly increase the potential for finding better results. Furthermore, we give a new framework that combines forward search with backward search to expand the search space of implementations, where the forward search is one of the two improved BP algorithms. In the new framework, we make a minor adjustment of the priority of rules in the backward search process to enable the exploration of a significantly larger search space. As results, we find better results for the most of matrices studied in previous works. For example, we find an implementation of AES MixColumns of depth 3 with 99 XOR gates, which represents a substantial reduction of 3 XOR gates compared to the existing record of 102 XOR gates.

It is challenging to devise lightweight cryptographic primitives efficient in both hardware and software that can provide an optimum level of security to diverse Internet of Things applications running on low-end constrained devices. Therefore, an efficient hardware design approach that requires some specific hardware resource may not be efficient if implemented in software. Substitution bit Permutation Network based ciphers such as PRESENT and GIFT are efficient, lightweight cryptographic hardware design approaches. These ciphers introduce confusion and diffusion by employing a 4 × 4 static substitution box and bit permutations. The bit-wise permutation is realised by simple rerouting, which is most cost-effective to implement in hardware, resulting in negligible power consumption. However, this method is highly resource-consuming in software, particularly for large block-sized ciphers, with each single-bit permutation requiring multiple sub-operations. This paper proposes a novel software-based design approach for permutation operation in Substitution bit Permutation Network based ciphers using a bit-banding feature. The conventional permutation using bit rotation and the proposed approach have been implemented, analysed and compared for GIFT and PRESENT ciphers on ARM Cortex-M3-based LPC1768 development platform with KEIL MDK used as an Integrated Development Environment. The real-time performance comparison between conventional and the proposed approaches in terms of memory (RAM/ROM) footprint, power, energy and execution time has been carried out using ULINKpro and ULINKplus debug adapters for various code and speed optimisation scenarios. The proposed approach substantially reduces execution time, energy and power consumption for both PRESENT and GIFT ciphers, thus demonstrating the efficiency of the proposed method for Substitution bit Permutation Network based symmetric block ciphers. [ABSTRACT FROM AUTHOR]

Unmanned aerial vehicles (UAVs) have become increasingly popular in recent years and are applied in various fields, from commercial and scientific to military and humanitarian operations. However, their usage presents many challenges, including limited resources, scalability issues, insecure communication, and inefficient solutions. We developed a secure and scalable registration protocol to address these issues using LoRa technology. Our solution involves the usage of the physical unclonable function (PUF) and blockchain technology for key exchange. PUF also ensures security against physical tampering, and blockchain is applied to share the symmetric key among the base stations. After the registration, the later communication messages are encrypted with AES-GCM to provide authentication and confidentiality between the parties. We conducted a security analysis of the registration protocol using the ProVerif tool, and our solution meets the security requirements, including the mutual authentication of entities, key freshness, key secrecy and also key confirmation properties. Besides the Proverif-based analysis, an informal security analysis is also provided that shows that the registration is protected against a variety of well-known active and passive security attacks. As drone resources are limited, we also prepared a proof of concept to test our solution under real-life conditions, focusing on efficiency and lightweight operations. [ABSTRACT FROM AUTHOR]

Recently, most modern cars can be controlled with the Remote Keyless System (RKS). A Remote Keyless System consists of a key fob that communicates wirelessly with the car transceiver that is used to control and secure access to the vehicle. The keyless entry systems are based on RFID communication and are equipped with limited computation and power resources. It was proven to be a target for cybercriminals. In this work, we proposed the use of the LED block cipher for data encryption-decryption of the keyless entry systems. The proposed hardware architecture of the LED algorithm was optimized to fit the limited resources of the keyless entry systems. The proposed 8-bit sequential architecture contains 627 LUTs+FFs. To further reduce hardware resources, we proposed a 4-bit architecture for the MixColumns sub-function, which gives good results in occupying hardware resources by reducing it to 597 LUTs+FFs. This leads to a good effect on the area implementation and power consumption of keyless entry systems. Thus, the proposed LED hardware architecture may be applied to lightweight applications that demand a high level of secrecy such as the key fob. In order to adopt the proposed design of the LED block cipher as a security system for keyless entry systems, we examine the security of the proposed LED architecture using five metrics; entropy analysis, histogram analysis, correlation analysis, NPCR, and UACI. As a result, the LED block cipher has a good ability to encrypt any data against any attack. [ABSTRACT FROM AUTHOR]

This research paper presents a study on designing and implementing a robust key management scheme for lightweight block ciphers in Internet of Things (IoT) networks. Key management is a critical concern for IoT devices due to their limited resources and susceptibility to security threats. The proposed scheme utilises partial key pre-distribution to achieve lightweight and secure key management. The protocol's security has been analysed against various attacks, demonstrating its resistance. Performance evaluation results indicate that the proposed key management technique is suitable for resource-constraint IoT networks, as it reduces communication overhead, power consumption, and storage space requirements. The methodology employed in this research includes designing and implementing the proposed key management scheme and conducting scenario-based analyses of its functionality. The results affirm that the proposed solution effectively ensures secure communication in IoT networks. Overall, this research contributes to developing a secure and efficient key management scheme for lightweight block ciphers in IoT networks. [ABSTRACT FROM AUTHOR]