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This paper presents the study of a single-stage, single-phase, unity power factor converter, isolated by a high frequency transformer, based on a Zeta converter operating in discontinuous conduction mode (DCM). The main feature of the proposed converter is its ability to naturally emulate an apparent resistance to the ac input source, without current sensor or current controller. Circuit operation, theoretical analysis and design example are included in this paper, along with experimental results taken from a laboratory prototype rated at 400W, input voltage equal to 127 V, output voltage equal to 200 V, switching frequency of 25 kHz and efficiency of 92 %. In order to reduce the commutation losses and limit the peak voltage across the power semiconductors, a non- dissipative snubber has been included in the laboratory prototype. With the advent of new low losses power semiconductor technologies, such as SiC and GaN, power converters operating in DCM will become very attractive, due to their simplicity and robustness, even for high power applications. This is the main motivation of the study presented hereafter.

PWM dc-dc converters operating in Continuous Conduction Mode (CCM) perform similar basic functions despite the topology of which one. The canonical equivalent circuit of small signal & low frequency ac model permits to analyze converter behavior in a general manner, without the need to make reference to a specific topology. For Buck, Boost, Buck-Boost and Cuk topologies the “plug-in” parameters of the canonical model can be easily found just by circuit manipulation using very simple circuit analysis techniques. For the Sepic (Single-Ended Primary Inductor Converter) and Zeta topologies, utilization of the same procedure fails and one cannot arrive to the canonical model. To overcome this barrier, some authors indicate the need to apply circuit synthesis techniques which are not always familiar to many engineers. It will be shown that it is possible to arrive to the canonical model of this two converter topologies by using the well-known two-port network (quadripoles) circuit analysis technique.