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Like every integrated circuit, Arbiter-PUFs suffer from any ambience variations such as electrical noise, supply voltage variations and temperature fluctuations. In this work, we show that most bit-errors are related to small phase differences, for which noise dominates the readout bit value. We present an approach eliminating this influence by modifying the arbitration circuit part into an eye-opening oscillator. By utilizing the deadzone of two D-Flip-Flops, the decision about the response is delayed until the phase difference becomes significant enough. With this modification, we could increase the PUFs initial bit-error rate of 3.31% to almost zero. We also highlight important design choices for this solution, like the setup-time of the D-Flip-Flops and the minimum number of enforced oscillations., acceptedVersion

This paper presents a simple yet effective way of improving delay based Physical Unclonable Functions by changing transistor gate sizes only. All utilized components of an Arbiter PUF were simulated in a 90nm CMOS process with sweeps applied to each gate dimension. By evaluating an Arbiter PUF consisting of the proposed enhanced components, we show that the intra Hamming distance can be decreased by over 60% and the inter Hamming distance can be fixed at 50%., acceptedVersion