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This paper proposed a framework called IAPA (Integrated Access Point Architecture) that applied an off-the-shelf AP (Access Point) device on WLAN (Wireless Local Area Network) as an IoT (Internet-of-Things) gateway to integrate Zigbee and Wifi. This Wifi-Zigbee AP (called WiZAP) has the advantages of low cost, small size and low power consumption. However, the coexistence of Wifi and Zigbee in unlicensed bands will introduce a serious data collision problem. In this paper, we propose a linear-time balance-first configuration strategy to adjust Wifi parameters to reduce data collision. A strategy to dynamically configure these parameters for MAC layer communication is also proposed. Experiments test the influence of network transmission in real application scenarios. Results show that our WiZAP can work efficiently with the coexistence of Wifi and Zigbee.

Emerging applications for an online sign language dictionary require that retrieval systems retrieve a target vocabulary through visual symbols. However, when people encounter an unknown vocabulary in sign language during communication, they require the online dictionary to retrieve the vocabulary with higher recall-rate and smaller-sized graph through a mobile device. Still, three situations show that the current online dictionary needs an extension. First, previous works lack of retrieving the target graph of a vocabulary through its complete visual symbol-portfolio. Secondly, they often respond a large number of possible images; however, their precisions and recall rates remain very low. Thirdly, previous works of sign language gloves can convert the visual symbols into the graphic features, but only part of the symbols, ignoring the symbols of expression and relative direction. Therefore, the aim of this study is, based on Taiwanese Sign Language, to design a new graph retrieval architecture for sign-language (GRAS), and to implement a new graph retrieval system for sign-language (GRSS) based on this architecture. Finally, we invite users to evaluate GRSS. The experimental results show that GRSS gets convincing performance. And, GRSS adopting RDF technology can improve the performance of GRSS without adopting RDF technology.

In the past decade, the scale of e-commerce has continued to grow. With the outbreak of the COVID-19 epidemic, brick-and-mortar businesses have been actively developing online channels where precision marketing has become the focus. This study proposed using the electrocardiography (ECG) recorded by wearable devices (e.g., smartwatches) to judge purchase intentions through deep learning. The method of this study included a long short-term memory (LSTM) model supplemented by collective decisions. The experiment was divided into two stages. The first stage aimed to find the regularity of the ECG and verify the research by repeated measurement of a small number of subjects. A total of 201 ECGs were collected for deep learning, and the results showed that the accuracy rate of predicting purchase intention was 75.5%. Then, incremental learning was adopted to carry out the second stage of the experiment. In addition to adding subjects, it also filtered five different frequency ranges. This study employed the data augmentation method and used 480 ECGs for training, and the final accuracy rate reached 82.1%. This study could encourage online marketers to cooperate with health management companies with cross-domain big data analysis to further improve the accuracy of precision marketing.

Social defeat stress (SDS) due to changes in biochemical functions has been implicated in the pathogenesis of affective and cognitive disorders. Employing pharmacological approach with adaptogens in the management and treatment of psychosocial stress is increasingly receiving scientific attention. In this study, we investigated the neuroprotective effect of rutin, a bioflavonoid with neuroprotective and anti-inflammatory functions on neurobehavioral and neuro-biochemical changes in mice exposed to SDS. Groups of mice named the intruder mice received normal saline (10 mL/kg), rutin (5, 10, and 20 mg/kg, i.p.), and ginseng (50 mg/kg, i.p.) daily for 14 days, and then followed by 10 min daily SDS (physical/psychological) exposures to aggressor mice from days 7-14. Investigations consisting of neurobehavioral (locomotion, memory, anxiety, and depression) phenotypes, neuro-biochemical (oxidative, nitrergic, cholinergic, and pro-inflammatory cytokines) levels in discrete brain regions, and hypothalamic-pituitary-adrenal (HPA) axis consisting adrenal weight, corticosterone, and glucose concentrations were assessed. Rutin restored the neurobehavioral deficits and reduced the activity of acetylcholinesterase in the brains. Adrenal hypertrophy, increased serum glucose and corticosterone levels were significantly attenuated by rutin. SDS-induced release of tumor necrosis factor-alpha and interleukin-6 in the striatum, prefrontal cortex, and hippocampus were also suppressed by rutin in a brain-region-dependent manner. Moreover, SDS-induced oxidative stress characterized by low antioxidants (glutathione, superoxide-dismutase, catalase) and lipid peroxidation and nitrergic stress were reversed by rutin in discrete brain regions. Collectively, our data suggest that rutin possesses an adoptogenic potential in mice exposed to SDS via normalization of HPA, oxidative/nitrergic, and neuroinflammatory inhibitions. Thus, may be adopted in the management of neuropsychiatric syndrome due to psychosocial stress.

IoT content usually comes from power-constrained sensors and requires applying different levels of protection. We design a bounded-error-pruned IoT content market (BIoTCM) framework with preserving privacy protection (BEPDPP) scheme using blockchain smart contract. According to payment level applied in smart contract of BIoTCM, our BEPDPP will prune original data within a given level of bounded-error to provide different resolutions of content for consumers. As the real data is intrinsically hidden, content protection is provided with privacy-preserving. Experimental results generated by five different types of IoT content demonstrate that our content protection solution is cost-effective in sensor lifetime.

Wireless Sensor Networks (WSNs) contain many sensor nodes which are placed in chosen spatial area to temporally monitor the environmental changes. As the sensor data is big, it should be well organized and stored in cloud servers to support efficient data query. In this paper, we first adopt the streamed sensor data as "data cubes" to enhance data compression by video-like lossless compression (VLLC). With layered tree structure of WSNs, compression can be done on the aggregation nodes of edge computing. Then, an algorithm is designed to well organize and store these VLLC data cubes into cloud servers to support cost-effect big data query with parallel processing. Our experiments are tested by real-world sensor data. Results show that our method can save 94% construction time and 79% storage space to achieve the same retrieval time in data query when compared with a well-known database MySQL

Semiconductor assembly mass production environment has means of testing and verifying bond consistency and reliability during wire bonding. Common bond integrity assessment is ball shear testing (BST). This test enables analysis of the strength between the bond pad and a ball bond. This paper presents significant procedure on how ball shear testing parameters should be treated during wirebond integrity check. Device complexity in terms of performing ball shear testing specifically on sensor dice has different output responses. Frequent shearing on die resulted as bond pads are elevated by 30 µm (microns). To address manufacturing in-process controls challenges, shearing tool position, dage settings, and optical scopes are taken into consideration. Also, a study was performed on the execution correctness in combination with proper dage parameters was explored to meet good ball shear test process capability and break modes.

Innovation on die attach curing process on semiconductor industry play a big role to have a robust process eliminating unwanted gross unit rejection. Resolving failures and hardware breakdowns on the exhaust system of oven curing process are the focus of this paper. Discoloration and contamination due to outgas and fumes that cannot exit the oven chamber are the effects of a failed exhaust system. Addressing the said phenomenon showing simulations, trial runs will be discussed on this paper. Promoting an innovative approach that includes real time monitoring of the system performance, and detection of its failure to prevent continuous operation with failed exhaust system are performed to have an appropriate resolution.

Wirebonding process is one of the most challenging assembly manufacturing process in semiconductor packaging industry. This paper discussed the wirebonding challenge and the solution to resolve the wire to die shorting on reverse stitch on ball (RSOB) and prevent irregular looping height for the substrate land grid array (LGA) device. Comprehensive parameter optimization was done particularly on the wirebond looping to ensure that no wire depression and no capillary hitting would occur wirebonding setup. Ultimately, the optimized wirebonding parameter prevented the occurrence of looping issues during the lot process. For future works, the configuration and technique could be applied on packages with similar situation.

This paper presents the reformation and fabrication resolved on the wire clamp and top plate (WCTP) design to eliminate the presence of lead finger bouncing resulting to high rejection of non-stick on leads (NSOL). Problem experienced was that the hollow or half-etched portion of the leadframe at the top and bottom units caused its bouncing effect. With the aim to improve localized massive NSOL defect, WCTP has been modified to provide positive bias to support its hollow part or the half-etched part of the leadframe at the top and bottom of the units. The re-designed WCTP was fabricated, extending its clamping with enhanced vacuum on top and bottom rows. The implementation of the improved WCTP design reduced the defect with 88 % improvement with the defect reduction during the lot runs.

Strips that have undergone tape saw singulation will not be completed without the ultraviolet (UV) curing process. To detach the units from the tape, the singulated strips have required further assistance to be loaded for UV cure. Otherwise, hard-to-pick units will be the outcome and sticky residues were usually observed to be attached on the units. Since tape sawn strips requires UV cure, suppliers were asked to engage on upgrading their machine to equip the singulation machine with UV cure. The principle is that after sawing, the singulated strips will be washed and dry normally at the spinner. Then instead of unloading the singulated strips, the machine will pass it first to the inline UV cure machine and then unload when successfully completed the whole process. Through adding the UV curing process in the package singulation sequence, singulated strips unloaded are now ready for the next succeeding process. That way, it would be much help to lessen the handling of sawn strips from one machine to another. The introduction of inline UV cure has simplified the process by automation which increased the security of the units’ quality as well as the productivity of manpower.

Singulation is a process in a semiconductor industry where high dense strips were singulated into single units. Jig saw singulation was the updated technology where strips were seated and vacuumed on a rubber nest jig during singulation. Jig saw singulation is also practical for high volume manufacturing as it demands minimal indirect materials. To cut the strips, jig alignment with the strip was measured by the machine to ensure that the rubber nest jig will not be cut and damaged while the strip is being singulated. However, with the different upstream process that the strip undergone, machine prompt frequent jig alignment errors when the machine detected that the strip saw street has high displacement with the recorded alignment of the saw street of rubber nest jig. Through this study, the authors have driven to understand the jig alignment errors occurrences as well as the assistance that can be made for the strip to be processed. The authors also included the study of the risks that might be imposed on both rubber nest jig and the affected strips, as well as the recommendations when jig alignment errors were encountered.

The continuing advances of die technology of integrated circuits (IC) miniaturization bringing more complexity in the product. At unusual conditions one may encounter new challenges intrinsic to the structure of the package. The study aims to qualify a product such as multi-stacked dice configurations with baseline reference using same die technology. The only difference is the substrate layout in which defined for the electrical purpose. The challenge is to understand and resolve low intermetallic coverage (IMC) on each die which may lead to manufacturability and reliability problems over time.

Modification and improvement of an existing tooling design in semiconductor packaging industry has been a usual practice, to enhance the current setup and to provide a solution to a specific assembly problem. This paper discusses the solution in eliminating the smashed ball defect occurrence observed after wirebond process. Smashed ball is usually encountered if the unit is unstable and creates a bouncing effect during wirebond process. It is therefore important to mitigate this micro-bouncing effect by analyzing the package design and the window clamp and top plate (WCTP). The objective is to increase the stability of the unit during wirebonding, especially for quad-flat no-leads (QFN) package with no tape. To achieve this, the solution is to alter the vacuum hole design of the top plate from single hole per unit to multiple holes of varied sizes per unit. Ultimately, after changing the design of the top plate, the micro-bouncing encountered during wirebond process was significantly reduced. This in turn created a consistent ball formation in all bonded wires. The comparative data presented in this paper confirmed the effectivity of the redesigned WCTP. For future works and studies, the improvement and learnings could be used on devices with comparable configuration.

Glass material used on a semiconductor device for isolating currents are one of the new breakthroughs of the modern world. Challenges are inevitable due to its complex characteristics and unique appearance. The study focuses on the phenomenon of reject glass die unrecognized, picked and bonded by die attach machine on good units of the semiconductor quad-flat no-leads (QFN) device in focus. This QFN device utilizes glass die as interposer on two active dice that separates the dielectric current of each die. During die attach process, machine photo recognition system failed to recognize and detect the glass die reject marking due to its unique transparent design and will be attached on good units. Thus, resulting to gross rejection and low process yield. Practical solutions to prevent the said phenomenon are simulated and determined by performing selection of variables like the contrast of the reject mark related to the product structure and compatibility through statistical analysis. The improvement drives to promote process robustness and scrap reduction that will help the manufacturing to be competitive through innovative resolutions on problems.

The integrity of the assembly wirebond process’ 2nd bond poses a big challenge for semiconductor manufacturing of quad-flat no-leads (QFN) devices, particularly on multiple wires on a lead. These devices are vulnerable to induce or obtain broken wire at heel defect. This type of defect is an abnormality in the formation of the stitch, mostly a crack or fracture seen on the facade of the stitch. Normally, it happens when there is too much vibration or transfer of ultrasonic generator (USG) power combined with high bonding force on 2nd bond. In the case of leads with common wires, broken wire at heel could also happen through excessive USG application resulting to transfer of resonance on adjacent wires. This paper presents a better understanding and analysis done to provide an adequate and appropriate solution to broken wire at heel issue.

After singulation process where the strips are being cut into single units, unit tray loading comes next. Unit tray loading is the process where the singulated units will be picked up from the table and then place it in a tray pocket. Z-picker assembly executes the pick and placing activity through vacuum suction. Vacuum pads were installed on the Z-picker’s vacuum pad holder area, and it contacts with the unit. Vacuum pads come with different design depending on dimension and configuration of the device in process. Pick and place process is prone for unit dislodge as it transfers the unit from one place to another. These unit dislodges will result to missing units and will be accounted for yield loss. In this study, the authors were driven to understand the Z-picker mechanism together with the effect of vacuum pad designs, aiming to find the best match that would lessen the occurrence of unit dislodges.

Theta rotation on die during diebond process is one of the critical machine responses especially for land grid array (LGA) device with tight tolerances requirement. The paper focuses on the die theta rotation tolerance capability with critical design for LGA device evaluated on two different diebond machine platforms. The evaluation was narrowed down into two main diebond machines with the objective of attaining the best performance in terms of die theta rotation tolerance capability. The study used a side-by-side comparison analysis in terms of theta rotation on the two machines and presented the effect of machine selection on the theta rotation response. Theta rotation was monitored and both machines satisfied the specification of 1 degree of maximum rotation, though diebond Machine 1 was able to produce a more stable diebonding with only around less than 0.15 degree of theta rotation variation. For future works, the selected diebond machine could be used for devices with critical requirement.

Die placement reference in die attach process is one of the critical aspects in measuring the actual die placement especially for the device that has a required measurement. This paper focused on the re-design on the layout of the substrate ball grid array (BGA) package with cross fiducials at the singulation lane which are located at the corner portions of the device. The cross fiducial would serve as a reference when measuring the actual placement of the Silicon die in the package. With this improvement, the technicians and operators could now easily identify the reference based on the mount and bonding diagram requirement.

The paper focused on the evaluation of quad-flat no-leads (QFN) device in tapeless leadframe technology on different diebonder platforms to achieve an acceptable fillet height performance. The study was narrowed down into two main machines with the objective of attaining a fillet height of less than 75 % for small die. Eventually, the fillet height requirement was achieved by both diebonder platforms, hence, these machines could be used for future works on devices with similar requirement.

Intermetallic coverage (IMC) is one of the critical wirebond output responses that is usually checked to ensure the ball to pad integrity. The success of wirebonding relies on the formation of an interfacial intermetallic growth of ball bond to ensure it can withstand reliability stresses. The challenging approach in IMC analysis detect as over-etching around IMC area that leads to inaccurate IMC data collection. To address the over-etching, we generate a new method which is backside polishing that results to a reliable IMC data collection and help reduced the cycle time of IMC data gathering.

Package singulation process is where the whole strip was sheared to produce individual units. Existing singulation program for 1-map strip have only six (6) pattern recognition system (PRS) points along the whole strip with 240 mm length. Considering the length of the strip, it is prone with misalignment especially when the unit pitching is small. Due to a big gap of PRS points, the compensation of unit pitch has a significant variable value due to strip expansion that results to misalignment when not monitored. PRS works to calculate and compensate the appropriate alignment of the strip including the unit pitching. Distance between adjacent PRS points divided by the number of cut lines it covers results to the unit pitch. The lesser accumulation of strip expansion, the more it compensates and align with the actual unit pitch. Modification of PRS Program to add PRS points along the strip in order to lessen the distance between adjacent PRS points were made and results were promising compared with the existing with only 6 PRS points. It has been found out that unit pitch varies by adding PRS points that will compensate the expansion of the whole strip.

With the continuous trend of new technologies in semiconductor manufacturing assembly, challenges and issues are unavoidable. This paper presents the modification and improvement done on the process plate design to eliminate the bouncing effect of the silicon die that leads to off-centered ball (OCB) reject during the formation of wire on a quad flat no-leads (QFN) device. The panel type single-row process plate cannot totally vacuum the warped leadframe and this is resulting to off-centered ball. Through changing the panel type single-row process plate to panel type multi-hole process will have a strong vacuum sucked underneath the leadframe and eliminates the occurrence of off-centered ball. Future works could use the improved process plate design for devices of similar configuration.

Tape saw singulation is the process where a strip was mounted on the tape attached on the frame and then sawn into single units. Circular tape saw singulation only caters one panel of the two-paneled strip which was found to be consuming with the machine capacity and resources. Driven by continuously growing volumes of customer demands at the Philippines for the past two years, it was a challenge for the machine to maximize its capacity while minimizing the cost and resources. Opportunity was found on exploring the idea of dual work piece where two strip panels were catered by one circular tape frame. Dual work piece application would not only maximize the machine capability and capacity but also reduce the cost of resources consumed per strip loading. In this study, the authors have explored the workability of dual work piece cutting where two panels can be catered on one circular frame instead of the current one panel per circular frame. Dual Work Piece application was found to be effective to achieve the goal of maximizing the machine capacity while trimming down the expenses by 50% that was brought about by the resources demanded to process the strips at singulation. With the results of the study, it was recommended for the dual work piece cutting be applied and explored on growing semiconductor industry.

Shopfloor practices that when the first cut line was aligned with the hairline, actual blade cut, and saw street of the strip, the succeeding cut lines will automatically follow with the same alignment. Considering various factors that affect the condition of the strip, it was recommended to verify the succeeding cut lines of the strip to project if the hairline will still be aligned with the saw street as cutting goes on. Unfortunately, verification of succeeding cut lines was usually skipped and refer only with the first cut alignment as reference. Thus, end up risking the units for possible cutting misalignment. Cutting misalignment can be encountered when the programmed unit pitching measurement was mismatched with the actual unit pitch of the strip. However, mismatching of the unit pitch can be anticipated through y-indexing where the saw street of the strip will be verified for alignment with the hairline along the succeeding cut lines. Frequent occurrence of mismatched unit pitching was brought about by the strip condition after series of assembly processes that expands and retracts the strip. With the mentioned scenario which has been encountered from different semiconductor assembly plants, it was best to verify the y-indexing of the strip on top of verification on the first cut line alignment. Application of y-indexing verification is essential for the entrapment and correction of mismatched unit pitching. Rejection of units due to misaligned cuts can also be prevented. Assistance of operators to adjust and monitor the hairline to compensate the actual pitching was also avoided as early as first cut line verification.

Epoxy quality contributes a great role in defining quality products of quad flat no lead multi row packages. In dealing with certain problems related to epoxy position shift caused by unoptimized design, innovation on the dispenser module is considered and focused at. This paper discusses the phenomenal issue of epoxy position shifting in die attach process and the solutions applied. The current design of dispenser module in die attach machine demonstrates flaws that need to be improved through design optimization. Innovative approach was applied, removing variables on the design that caused rejections during die attachment due to the shifted epoxy position. The improved design was able to address the issue as projected on the study, and helps not only the epoxy position performance, but also the set-up time of epoxy during syringe replacement. This design can be adapted by other manufacturing for process improvement and robustness.

The rise of various Wafer technologies has been developed based on industries and applications requirement. Highest quality of material characterization is complex and requires specialized process equipment and manufacturing procedures to meet defined design standards. The paper presents distinctive glass wafer-level fabrication technology that will enhance its properties with respect to pattern recognition system (PRS) at back-end manufacturing for industrial applications. Feasibility of colored glass wafer has been built into proposed conception to manufacture wafer-level packaging. The idea from transparent to colored glass wafer came from manufacturing key challenges that cutting sequence during pattern recognition cannot be distinguished. The proposed solution will mitigate high risk of misaligned cut at wafer sawing and its potential attachment on leadframe during die attach. glass wafer dice, transparent in nature, intermittently encountered multiple PRS assist during Wafer sawing and die attach as it hardly recognizes its cutting positions. Since dependent of machine capability limitations, misaligned cut is inevitable and usually happen occasionally. Addressing its unrecognizable characteristic, proposed colored glass wafer and with visible outline and saw lane fabrication was conceptualized instead of seeking ideal and high equipment model that can differentiate its opaque feature. The colored glass wafer and with visible outline and saw lane naturally creates segmentation visibly and will not be parameter dependent during manufacturing.

The paper presents a modified design for wafer level semiconductor devices, using a CAD (computer-aided design) tool for visualization. The discussion provides a specialized manufacturing flow for the augmented die design through advanced wafer fabrication method and wafer cutting technique. Ultimately, the new package design would result for better visual inspection and interface anchoring between the device and the external board.

Glass die are one of the materials used by semiconductor plants during production of specialized quad-flat no-leads (QFN) products. With its transparent appearance and fragile characteristics, several challenges are encountered and analyzed to resolve unwanted issues and to have a robust process manufacturing. This paper will discuss a potential concept of process improvement on the side of the device’s manufacturing with pattern recognition capability as detection and identification of the material to be processed. The paper will also discuss different options that can be selectively considered with respect to the manufacturer’s capability of their process flow.

As the modern world evolves through innovation and technology, manufacturing companies of semiconductor drive their people to dedicate themselves on continuous improvement and technical advancement. Products they produce becomes smaller and thinner, but applications are limitless and innovative. In manufacturing of quad flat no lead packages, challenges were encountered during the die attach process especially in small die size. Die attach material overflow on pad is one of these, and certain parameters and techniques are explored to have a quality and robust process. Defining appropriate epoxy pattern with respect to the die size is a big factor to make sure no epoxy material will flow outside the die pad perimeter that may cause unit rejection. This paper will discuss the related issues of the said package by performing experiments and applying certain techniques to address the problem.

The paper focuses on the die placement tolerance capability with critical design for land grid array (LGA) device evaluated on two different die attach machine platforms. The evaluation was narrowed down into two main die attach machines with the objective of attaining the best performance in terms of die placement tolerance capability. Die placement tolerance were quantified and only die attach Machine B was able to satisfy the specification of less than 30 microns. The study used a bar graph comparison in terms of die placement tolerance on the two machines and presented the effect of machine selection on die placement tolerance capability. For future works, the selected die attach machine could be used for devices with critical requirement.

Parameter optimization is not only the key to find the most favorable and best solution as variable chances of failure modes may happen at extreme case conditions at unexpected period. Packaging design robustness is much resilient to establish a satisfactorily good quality product and sustain a long-term goal of a remarkable process capability. This paper presents leadframe design solution of quad-flat no leads (QFN) to address mold flash defect caused by leadframe bouncing during wirebonding. An inverted pyramid configuration was conceptualized to provide better stability than the standard configuration during wirebonding process and other concerned assembly processes due to the shift of the center of gravity moving closer to the full metal part.

New devices and technologies in the semiconductor industry are getting more challenging to process because of inherent issues especially on quad-flat no-leads (QFN) packaging assembly. This paper is focused on the improvement done for QFN leadframe device to address the major machine assist during the lot processing at wirebond process. Illumination and visual of the leadframe and the sand blasting process plate on the machine are difficult to separately distinguish due to similar color shade of the materials, thus frequent machine assists ensued. To reduce the frequent machine assist occurrence, an improvement is done through enhancing the process plate by using a black chrome to totally separate the illumination of leadframe and the process plate. Ultimately, the machine assist during wirebonding process is improved (the longer the better) from 16 minutes to 6 hours continuous and uninterrupted running.

In the world of semiconductor industry, automation plays a big role on every manufacturing plants to improve efficiency, prevent product yield losses, and making sure that top quality products will be delivered on end user. On die attach curing process of manufacturing semiconductor integrated circuits (IC) devices, certain problems occur like wrong Nitrogen (N2) parameter setting on the oven curing machine, with human intervention during setup, causing leadframe oxidation related defects. The paper discussed the importance of automation system on processing semiconductor IC products on die attach curing process, eliminating mostly human intervention on setting up machine parameters, storing and managing programs, restrict unauthorize users from accessing, provide friendly user procedures to prevent human errors and prevent oxidation related defects.

Innovations and breakthroughs are continuously driven in semiconductor manufacturing to overcome existing assembly limitations and recurring difficulties. This paper is focused on the resolution of the delamination issue during die attach assembly process. A new design of semiconductor die is presented to establish a robust adhesion or interface bonding between the silicon die and the epoxy material for die attach. The paper also provides the specialized design of manufacturing flow for the improved die design through advanced wafer fabrication method and wafer cutting technique. The realization of the advanced silicon die design would ultimately mitigate the delamination issue and would contribute for a robust die attach assembly process.

During new product development of a substrate land grid array (LGA) device, issues were encountered at wirebonding process due to design constraints. This paper is focused on addressing the wire-to-wire short defect during wirebonding process of the first bond. Wirebond process optimization was comprehensively employed, but eventually recommended to have a substrate redesign with relocated bond fingers to increase the wire angle (less steep) between the first bond and the second bond. With the improvement done in the substrate design and through wirebond process optimization, wire-to-wire short defect occurrence was successfully eliminated.

Advanced packaging at the back-end semiconductor manufacturing characterizes various equipment capabilities per device requirement. High resolution imaging for inspection system during die attach process has gained its interest to feature automated selections during in-line processing. Increasing yet stringent requisites of today’s applications give us leading indicators of market’s demand at more functionality in a smaller and complex package. In light with the technology trend, vision inspection system is a well-known challenge. Instead of using a high magnification microscope off-line after assembly processing, leadframe inspection feature uses optical image-based system to recognize real-time feedback on lead-related defects. Such leadframe inspection activation provides good accuracy, monitoring process integrity in real-time for quad-flat no-leads (QFN) leadframe packages. This paper presents how leadframe inspection at die attach machine takes advantage of simultaneous detection of early die attach defect manifestations.

Wirebonding is one of the most challenging assembly manufacturing processes in semiconductor packaging industry. This paper discussed the wirebonding challenge and the solution to mitigate misplaced ball issues and prevent pattern recognition alignment errors. Parameter optimization particularly on wirebond looping was done to ensure that the silicon die’s L-fiducial is visible and not obstructed by the wires, which is the operator point or die reference of the unit during wirebonding setup. Ultimately, the optimized wirebonding parameter prevented the pattern recognition alignment error and misplaced ball issues during the lot process. For future works, the configuration and technique could be applied on packages with the similar situation.

With the new devices and new technologies in the semiconductor industry are getting more challenging to process because issues are unavoidable especially on thin dies. The paper is focused on the improvement done on a ball grid array (BGA) substrate package assembly to address the quantity of rejection of die crack during die picking at the die attach process station. High pick force and high needle top height found out during the pick-up process is the main root cause of die crack. Parameter optimization particularly for die picking with the combination of pick force and needle top height parameter was done to eliminate this type of issue after the die attaches process. With the die attach process improvement, a reduction of 100 percent of die crack occurrence was successfully achieved. For future works, the improvement and learnings could be used for devices with similar constraints.

The paper is focused on the glue voids reduction on critical semiconductor quad-flat no-leads (QFN) device processed on a stencil printing type of die attach machine. Process optimization through material preparation improvement was done to mitigate the silver lumps of the sintering glue which is a main contributor on the voids occurrence. Eventually, the glue voids were reduced to less than the allowed 5% limit. For future works, the learnings and configuration could be used on devices with similar requirement.

Intermetallic is a critical factor that is controlled and limit during manufacturing of integrated units. Through improving the ball flatness response of the semiconductor wire significantly impact the outcome for the intermetallic characteristic between metal such as Gold-Aluminum connection. The implementation of this study on the actual manufacturing control eliminates escapee of poor intermetallic that would impact the reliability and integrity of the package upon its application to the end product.

The paper presents a study on the effect of semiconductor die’s bond pad probe marks on the interface between the wire and the bond pad. The probe marks are quantified in terms of percentage area in the bond pad, while the interface strength between the wire of Gold material to the Aluminum bond pad is measured through the intermetallic coverage (IMC). Actual evaluation showed that the size of the probe marks has significant impact on the bond pad area, especially on IMC. Validations were made comparing the IMC and shear strength performance of the wire ball bonded on the worst-case probe marks and on the standard probe marks. The learnings on this study could be used on future works with similar requirement.

Electromagnetic interference (EMI) is an unwanted disturbance caused by external sources that would affect the electrical functionality of the device. This paper presents an advanced approach of electromagnetic interference (EMI) shielding protection for sensitive and critical semiconductor packages. The process employed half-cutting method to apply the EMI coating on the upper-half portion of the device, protecting the Silicon die and internal components from external EMI disturbance. Eventually, the enhanced EMI shielding process would provide advantages of improved quality and eliminate risks of possible assembly issues while providing the main purpose of EMI protection for semiconductor devices. For future studies, the technique could be applied on packages with similar requirement. Prototypes are helpful to validate the effectiveness of the enhanced process.

Stencil printing using solder paste material is one of the challenging processes in semiconductor assembly manufacturing. During evaluation of a semiconductor device, off-centered ball issue was encountered. The study aimed to mitigate the off-centered ball issue at stencil printing process by exploring the effect of different solder paste materials. Both solder paste materials were cured using the same reflow condition. However, solder paste material 1 (S1) resulted to cold solder joints while material 2 (S2) showed cured solder paste characteristic. With S2 material used in stencil printing, the off-centered ball occurrence was eventually eliminated. For future works, the solder paste material and configuration could be used for devices with similar requirement.

One of the most challenging assembly manufacturing process in semiconductor industry is wirebond process using a wire as direct material. With this new technology, some issues were encountered during the first trial of a quad flat no-leads (QFN) package. This paper is focused on the heal crack seen on the stitch formation during second bond. A comprehensive improvement was done by relocating the stitch formation on the second bond. Ultimately, heal crack occurrence was successfully eliminated.

With the new and upcoming technologies in semiconductor industry, packages like the ball grid array (BGA) are getting more challenging to process due to inherent issues that come along. Process improvement through modification in the design of indirect material is one key direction to improve the productivity during assembly manufacturing. In this paper, an enhanced design of dipping plate is presented to solve the issue of flux shorting due to out-of-specs dipping plate at ball attach process. The study used a side by side comparison to prove that the new design is better than that of the out-of-specs indirect material. With the new enhanced design of dipping plate and the optimized flux depth parameter, flux shorting occurrence was successfully mitigated.

The paper focused on the improvement done in quad-flat no-leads (QFN) leadframe package assembly to address the quantity of rejection of crumpled leadframe during handling at wirebond process station. Overload sensor at the output magazine handler was found out to be defective, hence a new sensor was installed. With the improvement done, crumpled leadframe strip occurrence was ultimately eliminated.

The paper focused on the improvement done in chip on lead (COL) leadframe package assembly manufacturing to address the leadframe bouncing effect during die attach process. A new and enhanced process plate is designed with multi-hole configuration to provide a strong vacuum underneath the leadframe and to maintain the planarity during dispensing and die bonding of silicon dies onto the leadframe. With the new multi-hole process plate, leadframe bouncing was successfully eliminated during die attach process. For future works, the multi-hole process plate could be used on devices with similar configuration.

This paper presents the modification and improvement done on the wire clamp and top plate (WCTP) design to eliminate the bouncing effect of the silicon die that leads to smashed ball reject during the formation of wire. The protrusion of the unit on the vacuum hole produced movement and slight vibration that affects the consistency of wirebonding. Through changing the standard vacuum hole to micro-holes provides underneath support to the unit and eliminates the overhanging or protrusion during the formation of wire. The implementation of the micro-hole design reduced the defect parts per million (dppm) occurrence to zero.