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In recent years, there is an increased use of passive filters in both transmission and distribution systems due to the proliferation of power electronic devices. However, the problem of filter design has not been well addressed in the past and one example is the application of high-pass filters in a filter package. Three types of HP filters are widely used to mitigate multiple harmonics, i.e., 2nd HP filter, 3rd HP filter and C-type filter. There is still a lack of research to clearly reveal the characteristics of each filter, which makes it difficult for the designer to select the optimal filter topology under different circumstances. The main goal of this paper is to solve the problem of how to select a proper configuration among three HP filter candidates for a given harmonic problem. Unlike the conventional optimization-based filter studies, this paper investigates three HP filters in an analytical way. As a result, the paper provides a deep insight into the inherent characteristics of the filter and the conclusions drawn in the paper are universal; thus can be used in different applications, ranging from low voltage levels to high voltage levels. The research results lead to a recommended application scope of each HP filter, which is very useful to guide the design of filter packages and help designers to evaluate the design results. [ABSTRACT FROM AUTHOR]

The dc-dc converters with high step-up DC-voltage gain play a vital role in integrating low voltage DC sources. Though several converter topologies are reported in the recent past, attempts have been made to reduce the components, especially the switching devices, passive elements, converter losses, etc., of the converter. A novel DC-DC converter topology, viz., single switched impedance network (SSIN)-based converter with n-stage is proposed in this paper. The operation of the SSIN based converter in continuous and discontinuous conduction modes are discussed. The effect of parasitic elements on DC-voltage gain and efficiency of the SSIN is carried out. The small-signal model of the SSIN converter is derived. The performance of the SSIN converter is compared with the similar converter topologies. The 500 W prototypes of the SSIN with n = 1 and n = 2 are fabricated, and the experimental results are presented in this paper. To improve the converter performance, SiC-based semiconductor devices are used. The SSIN converter with two-stage has low switch loss at 500 W load, improved efficiency during high power and high output voltage operation, the switch stress of Vo/2, etc. [ABSTRACT FROM AUTHOR]

When a fault occurs on the dc side of the voltage source converter based high voltage direct current (VSC-HVDC) transmission system, the fault current rises quickly due to the low damping of the dc system. Using a dc fault current limiter (DC-FCL) to limit the rise of the fault current can significantly reduce the breaking requirements of the DCCB. A topology of a bidirectional active dc fault current limiter (BA-FCL) based on coupled inductor is proposed in this paper. No expensive full-controlled power electronic devices are used in this topology. Only a few half-controlled power electronic devices are used to achieve active control of the current limiting unit. Compared with many topologies of current limiter at present, the fault current limiting effect of BA-FCL is improved significantly while the cost, volume, topology complexity, and control complexity are reduced. The stress analysis and parameter design of the proposed current limiter are carried out. Finally, the simulation case study and hardware experiment are implemented to verify the good economy and current limiting performance of the proposed topology. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC), owing to the presence of a large number of submodules (SMs) and energy storing elements, requires a large footprint and initial investment. To address these issues, this paper proposes the switched modular multilevel converter (SMMC). It consists of two major elements; the chain-links (CLs), consisting of cascade connection of SMs as in MMC, and the single-pole-triple-throw (SPTT) switches, which can be realized using either the T-type or NPC-type switch strings. The SMMC works on the principle of connecting all the phase-legs in series and their respective positions are mutually interchanged. It offers a compact structure as the SMs count is reduced to 33% of MMC, which results in a much lower energy storage requirement. Furthermore, it does not have inter-phase circulating current problem and hence the CL inductors can also be avoided. The SMMC structure, operating principles, control, and modulation schemes are explained in detail. A detailed comparison of SMMC with the other major existing converters is carried out to highlight the important features of SMMC. The efficacy of SMMC is validated using PSCAD simulation studies with a 19-level grid-connected SMMC model. A 3-phase 19-level SMMC laboratory prototype is developed to further validate its feasibility. [ABSTRACT FROM AUTHOR]

Ultra-high voltage fast vacuum circuit breakers (FVCBs) could benefit a power system by promoting transient stability because their opening and closing times are significantly lower than those of commonly used circuit breakers at transmission voltage. This paper presents the design and verification of a prototype 363-kV/5000-A – 63-kA multiple-break FVCB. The prototype consists of two parallel-connected circuit branches in each phase. Each branch comprises three breaking units. The breaking unit, arranged on a 330-kV-class insulating platform, is a double-break FVCB driven by two independent electromagnetic repulsion actuators. The breaking units include a specially designed 40.5-kV vacuum interrupter (VI) with an extended ceramic envelope and optimized contact contours. A 4.0-nF grading capacitor is connected in parallel with each break to achieve a uniform stressed voltage distribution across the break. The prototype performs controlled switching of short-circuit current with an arcing time of 2.0 ms. The feasibility of the 363-kV FVCB is verified by a dielectric test on one break of the prototype and a series of tests on a single-phase prototype according to the international standard IEC 62271-100, 2017 and the Chinese standard GB 1984-2014. The tests include controlled switching of a short-circuit current in a short arcing time under different transient recovery voltages following test duties T100s(b) and T100a, short-time withstand current and peak withstand current tests, a temperature rise test, and an electromagnetic compatibility test. [ABSTRACT FROM AUTHOR]

The HVDC systems have been employing modular multilevel converters (MMC) due to their unique high voltage high power potential. However, the lack of fault ride-through capability imposes restrictions on MMCs that are based on half-bridge (HB) modules. Since it is necessary to limit the fault currents to protect MMCs from serious short circuit faults against pole-to-pole DC fault, several protection schemes have been introduced to deal with the DC short circuit faults. This paper proposes a new hybrid MMC protective topology consisting of a combination of the HB and three-quarter-bridge (TQB) modules. The TQB behaves like an HB under normal operation and has low power losses compared to other protective topologies. Modulation and control of this configuration are like HB-based MMC. In the proposed hybrid protective topology, during a pole to pole DC fault, the fault current can be either blocked or be limited by TQB-SMs. Both simulations and experiments were performed to verify the operation of the suggested hybrid MMC in different modes of operation. [ABSTRACT FROM AUTHOR]

The missing capability of DC fault current limitation is an inherent disadvantage in the typical half-bridge modular multilevel converter (MMC), which restricts its application in long-distance high voltage direct current (HVDC) systems. The full-bridge submodule (FBSM) and clamped double submodule (CDSM) topologies allow for fault current self-clearing, but also suffer from additional hardware cost and power losses. In this paper, an improved submodule topology utilizing the new reverse-blocking insulated gate bipolar transistor (RB-IGBT) is proposed to improve system economy without compromising its performance. The operating principles and DC fault characteristics of the proposed topology are analyzed in details, including comparison with various topologies in terms of cost, losses, fault current clearing speed and thermal. Compared with the traditional CDSM topology, the proposed RBSM can clear DC faults faster with reduced cost of switching devices. A DC fault protection strategy for MMC-HVDC system is also presented. Simulation results under normal operating, permanent and transient fault conditions are carried out to verify the effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper presents a new power electronic topology for a STATCOM allowing the generation of multilevel AC voltages. This topology is characterized by a modular configuration since it uses two well known four-leg two-level voltage source inverters. A Scott transformer with multiple secondary windings connects the two four-leg inverters to the grid. One of the important features of the proposed power topology is the capability to generate AC voltages with high number of levels, in spite of using only two four-leg two-level voltage source inverters. To maximize the number of voltage levels a geometric progression ratio of 3 between the windings of the transformers connected in cascade is proposed. However, to reduce the turns-ratio span, alternatively a fractional geometric ratio of 1.5 is also proposed and analyzed. A control strategy adapted to the proposed power converter topology is also presented. Besides the control of the reactive power the regulation of the four-leg inverter DC voltage will also be considered. To support the theoretical studies and assumptions, simulations and experiments are presented. Experimental results were obtained using a low power laboratory prototype. The results shown give evidence to the characteristics and features of the proposed power converter topology and control system. [ABSTRACT FROM AUTHOR]

Modular multilevel converters have become the technology of choice in high voltage direct current systems. They are composed of a large number of submodules, which poses significant computational challenges to electromagnetic transient simulations. To address this issue, scholars proposed several approaches that are a trade-off between simulation accuracy and computational burden, which mainly achieve numerical efficiency by adopting reduced and simplified models of the converter arm submodules. This paper proposes a different simulation paradigm based on sub-circuit isomorphism. It is suited for the analysis of intrinsically modular electronic circuits, as it exploits the common behavior of structurally identical submodules by clustering them together. This method does not require any simplification of the submodule electrical model and minimizes the number of equations to be solved at each time step of the time domain analysis, thereby significantly reducing the computational effort. Thus, this method is suitable for thorough simulations of ac/dc networks, which may require the implementation of detailed transistor-level representations of the converter submodules. [ABSTRACT FROM AUTHOR]

This article develops a series of improved Z-source dc–dc converters to realize additional voltage pumping and high power density through two propositions. Proposition 1 develops two improved positive- and negative-connected Z-source dc–dc converters (IPZSC and INZSC), using the same number of components as in the existing voltage pumping Z-source converter. Based on Proposition 1, Proposition 2 proposes four novel embedded Z-source dc–dc converters (EZSCs) by placing the source in a specifically designed position, which realizes lower voltage stresses across capacitors. Various technical aspects of the proposed EZSCs, including operations, power losses, and small signal stability analyses are detailed in this paper. Besides, comparisons between the proposed series of improved Z-source dc–dc converters and other existing Z-source dc–dc converters are thoroughly made to demonstrate the better performance of the EZSCs. Finally, experiments are conducted to well validate the effectiveness and superiority of the proposed converter circuits. [ABSTRACT FROM AUTHOR]

This paper presents protection and fault location of wye-connected shunt capacitor banks used in medium or high voltage applications. The proposed method is sensitive to single element failure obtained by using voltage adaptive instantaneous superimposed current in each phase. The change in equivalent reactance computed using time-domain signals is used to find the number of failed capacitor element and types of fault. The location of the faulted capacitor is identified using sign of the voltage difference of the lower and upper halves of the shunt capacitor bank. The performance of the proposed method is tested for various cases including identical faults, simultaneous faults, system voltage unbalance in both single and double wye-connected shunt capacitor banks. The method is also validated using field data collected from a 400 kV SCB for an internal fault. The proposed technique is compared with available methods and found accurate. [ABSTRACT FROM AUTHOR]

DC fault protection is the bottleneck that restricts the development of modular multilevel converter based high voltage direct current (MMC-HVDC) system. Superconducting fault current limiters (SFCL) is an ideal protection device that can significantly limit short circuit current and enhance the fault tolerance ability of MMC-HVDC system. At present, several topologies of SFCLs have been proposed, but there is no systematical study of their current-limiting characteristics in MMC-HVDC. This paper studies the development process of DC short-circuit faults in MMC-HVDC system, and analyzes its demand for fault current limiting. Then, resistive type, saturated iron core type and hybrid type SFCL are modeled and their limiting effect of critical fault current under DC pole-to-pole fault is tested. By comparison, the current-limiting characteristics of three types of SFCL are concluded. Results show that resistive SFCL has best performance in steady state, while saturated iron core SFCL has best performance in transient state. The current-limiting characteristic of hybrid type SFCL is between the other two types. [ABSTRACT FROM AUTHOR]

This article proposes a novel bidirectional isolated dc–dc converter with high voltage gain and wide input voltage, which can be applied to bidirectional power conversion systems. The proposed topology is composed of a bidirectional buck-boost converter and a forward-flyback converter; it has the advantage of higher voltage gain and has continuous current characteristic of the low-side port in step-up and step-down mode. In addition, the proposed topology also has the function of leakage inductance energy recovery, which can improve the efficiency of the converter, reduce the voltage surges on switches, and have the characteristics of zero voltage switching on certain switches. Finally, this paper implements a 500-W bidirectional dc–dc converter to verify the feasibility of the proposed topology. The low-side voltage of the proposed topology is 24, 48, and 55 V; the maximum efficiency in step-up mode are 94.2%, 95.6% and 96.9%, and the maximum efficiency are 92.6%, 94.2% and 94.5% in the step-down mode, respectively. [ABSTRACT FROM AUTHOR]