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The capacitor condition monitoring is an important issue for the reliable operation of modular multilevel converters (MMCs) in high-voltage applications. The numerous capacitors make the monitoring for the capacitor condition complex and computation-consuming. This paper proposes a hierarchic capacitor condition monitoring strategy to assure the reliability of high-voltage MMCs. In the strategy, the switching times of the switching signals are counted to detect the condition of the capacitor in each submodule (SM). Then, the subsequent capacitance calculation method is only conducted to the abnormal capacitors indicated by the above condition detection algorithm. Meanwhile, the variations of the measured and reference capacitor voltages are employed to calculate the capacitance in the proposed method. The condition detection algorithm shrinks the scope where the abnormal capacitors locate, which avoids calculating the total capacitances in MMCs. In the proposed capacitance calculation method, the complex operations are further saved. Both the two measures reduce the computation burden effectively. The implementation of the whole monitoring strategy is simple and fit for high-voltage MMCs. Moreover, the strategy has no adverse influence on the normal operation of MMCs. The effectiveness of the proposed strategy is verified by the simulation studies with the professional tool Matlab/Simulink. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dual input nine-level inverter (DINLI) topology which requires only seven controllable devices. The dual inputs are un-identical DC voltage sources in the ratio 1:3. A simple control scheme is derived by appropriately modifying the phase disposition pulse width modulation technique to generate high-quality 9-level output from the DINLI topology. At any given instant, a maximum of four switches conduct out of which only a maximum of two switches operate at high frequency, bringing down the switching and conduction losses significantly and improving the overall system efficiency. The bidirectional DINLI (BDINLI) topology with reactive power capability can be realized by replacing the unidirectional devices with the controlled switches (i.e., total nine switches). In addition, the proposed DINLI topology does not require extra voltage balancing circuits which further improves the efficiency. The DINLI operation is verified through MATLAB simulations for grid-connected applications and its extension to an n-level, 3-phase application is also investigated. Experiments performed on a 1KVA laboratory prototype to validate the theoretical claims. [ABSTRACT FROM AUTHOR]

Different from typical circuit breakers, breakers used to switch AC filters in convertor stations have to operate frequently according to the real-time operation mode and daily load changes. Therefore, the performance of filter breakers decreases very quickly, which leads to frequent accidents. Both preinsertion resistors and controlled switching devices can suppress switching transients. In this paper, a comparative analysis of whether a controlled switching device and preinsertion resistor should be adopted is carried out using PSCAD. The transient is calculated as the combined result of the switching angle and preinsertion resistor value, and the optimal configurations are proposed. After determining the resistor value and whether a controlled switching device should be included, the reference voltage of the arrester should be reevaluated. [ABSTRACT FROM AUTHOR]

Two-stage AC-DC converters are considered as a prominent solution for DC-type electric vehicle (EV) chargers. However, this kind of architecture suffers from high switching losses with large heatsink and DC-link capacitor volume. To relieve this issue, this paper presents a new hybrid modulation for DC-type EV chargers, where a two-phase clamped discontinuous pulse-width-modulation (DPWM) in the front-end circuit is cooperated with the variable frequency triangular-current-mode (TCM) zero voltage switching (ZVS) or its simplified implementation, i.e., boundary-ZVS (B-ZVS) strategy, in the back-end circuit. The former can stop the switching actions in the front-end stage during two-thirds of the grid period, while the AC currents are at their highest values, which can yield to the best switching loss reduction and deliver high power factor operation. Besides, TCM-ZVS or B-ZVS modulations can achieve ZVS turn-on action for all semiconductors during all operating range in the DC-DC stage to further reduce the power losses on the semiconductors. With such characteristics, the proposed strategies can reduce the switching losses of the system to the best extent, and thus allow an enhancement of the system power density by improving the power conversion efficiency. The proposed strategy is described, analyzed, validated, and benchmarked in a 5 kW SMD SiC MOSFET-based two-stage AC-DC converter. A 99% power efficiency can be achieved with the solution implementing the TCM-ZVS strategy at an output voltage of 400 V and rated power. [ABSTRACT FROM AUTHOR]

This paper presents a new single-source three-phase seven-level inverter with an inherent three-time voltage boosting capability for medium-voltage applications. The proposed topology is comprised of series connection of two switched-capacitor (SC) networks with an added half-bridge module per phase. Each of such integrated SC networks requires a single capacitor associated with three active power switches. The three-time voltage boosting feature of the proposed topology can reduce the dc-link voltage requirements by 50% in comparison to the traditional neutral point clamped (NPC), flying capacitors, active NPC (ANPC), hybrid clamped ANPC, and cascaded H-bridge topologies, and 75% to advanced ANPC topologies. It can also reduce the number of required switches and capacitors as well as their voltage stresses compared to those state-of-the-art topologies reported in the literature. By integrating “n” number of added SC networks in the proposed seven-level basic topology, the number of output voltage levels can be extended to 2n+3 per phase. A finite control set model predictive control algorithm is also derived to control the converter in both the active and reactive power exchanges modes without distorting the generated grid current quality. The capacitor voltage balancing is inherent in the proposed topology, and thus, there is no need for any additional voltage balancing circuit, which further reduces the control complexity. The performance of the proposed topology and its control algorithm are validated by several measurement results. [ABSTRACT FROM AUTHOR]

An improved two-stage model predictive current control (MPCC) for three-phase three-level converters in the paper, which can simultaneously achieve common-mode voltage (CMV) reduction, effective dc-link capacitor voltage control, and decreased computational burden, is proposed. Compared to the other current control strategies, it has the capability of handling multiple control objectives and possesses a simple structure. Furthermore, it greatly reduces the CMV since the peak CMVs of all the candidate voltage vectors are constrained to be less than one sixth of the dc-link voltage. In addition, an optimal two-stage voltage vector selection mechanism is employed in the proposed method. It helps to significantly reduce the computational complexity. Simulation and experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Conventionally, the converter of switched reluctance motor (SRM) is fed by the uncontrollable diode bridge rectifier (DBR), which leads to a low grid-side power factor (PF) and high current total harmonic distortion (THD). In this paper, an alternative solution for the grid-connected high-speed SRM drive system with improved PF is proposed. In the proposed drive system, the three-level active front end (AFE) is connected in cascade with the midpoint converter for SRM operation. A centralized strategy, which controls the AFE and SRM together, is proposed to govern the motor speed and grid-side PF by regulating the real power and reactive power of the system, respectively. Specifically, the real power, reactive power, and the voltage balancing of split capacitors are controlled by the model predictive directed power control (MP-DPC) algorithm, which significantly reduces the control complexity and guarantees the fast dynamic response. Consequently, satisfying speed regulation, high PF, low current THD, and bi-directional power-transfer capability are achieved. An idea-proofed testbench is constructed in laboratory, and the applicability of the proposed drive system is verified by a series of experimental results. [ABSTRACT FROM AUTHOR]

With increasing penetration of solar PV, some distribution feeders are experiencing highly variable net-load flows and even reverse flows. To optimize distribution systems under such conditions, the scheduling of mechanical devices, such as OLTCs and capacitor banks, needs to take into account forecasted solar PV and actual grid conditions. However, these legacy switching assets are operated on a daily or hourly timescale, due to the wear and tear associated with mechanical switching, which makes them unsuitable for real-time control. Therefore, there is a natural timescale-separation between these slower mechanical assets and the responsive nature of inverter-based resources. In this paper, we present a network admissible convex formulation for holistically scheduling controllable grid assets to position voltage optimally against solar PV. An optimal hourly schedule is presented that utilizes mechanical resources to position the predicted voltages close to nominal values, while minimizing the use of inverter-based resources (i.e., DERs), making them available for control at a faster time-scale (after the uncertainty reveals itself). A convex, inner approximation of the OPF problem is adapted to a mixed-integer linear program that minimizes voltage deviations from nominal (i.e., maximizes voltage margins). The resulting OPF solution respects all the network constraints and is, hence, robust against modeling simplifications.Simulation based analysis on IEEE distribution feeders validates the approach. [ABSTRACT FROM AUTHOR]