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This paper presents the development of a Class-D full-bridge zero-voltage switching (ZVS) inverter, applicable to wireless power transfer (WPT) systems, operating at 13.56 MHz switching frequency with dynamic dead-time control (DDTC). Resonant-coupled WPT systems are being designed at ultrahigh switching frequencies to reduce the size of the wireless link and the passive components. Maintaining ZVS while controlling the output power delivered to a fixed or variable load is one of the major challenges of designing inverters at multi-MHz switching frequencies. DDTC is the approach deployed in this paper to sustain soft switching of a Class-D full-bridge inverter over the full range of output power while regulating the input dc bus voltage. Simulation results are presented to show that dynamically controlling the dead-time during input dc bus voltage variations reduces switch-node voltage overshoot, prevents large current spikes in the switching devices, and reduces associated high switching loss. Practical results obtained show that DDTC reduces switch-node voltage overshoot, increases the inverter efficiency, and reduces the steady-state temperature of the inverter during output power regulation. [ABSTRACT FROM AUTHOR]

This two-part paper presents a method to mitigate half-cycle saturation of transformers caused by monopolar operation of neighboring HVDC transmission lines while keeping the ability to detect the zero-sequence fault currents (ZSFC) when ground faults occur. Part I of this paper has presented the mitigation principles and device design of the proposed neutral current blocking switch. In Part II, the performance of the proposed method to permit the circulation of zero-sequence current is investigated. An operation strategy is proposed that simultaneously allows the mitigation of half-cycle saturation and the detection of ZSFC. Simulations on a widely-used 500 kV system show that the proposed mitigation technique, using a sub-synchronous switching frequency (no higher than 30 Hz), can effectively mitigate the half-cycle saturation while allowing the circulation of ZSFC. The novel mitigation method exploits the characteristic differences between half-cycle saturation (dc) and asymmetric faults (ac). The method provides an implementable solution to the dc-bias phenomenon because it delivers concurrently dc-bias mitigation, minimal impact on ground fault detection, and no switching stresses on the power electronic switches. The proposed technique can also be applied to the mitigation of geomagnetically induced currents. [ABSTRACT FROM AUTHOR]

First harmonic analysis (FHA) is arguably the most widely used analytical technique for wireless power transfer (WPT) circuits due to its simplicity. Although FHA can provide closed-form solutions, the existence of rectifier diode forward voltage drop and higher order harmonics, especially the second and third harmonics at variable duty cycle operation, can significantly deteriorate its accuracy. This paper presents an accurate and efficient method called enhanced multiple harmonic analysis (eMHA) for the optimal design and optimal control of WPT systems. The eMHA method considers the nature of nonlinear rectification networks under nonsinusoidal current and reexamines the concept of the equivalent load. As a result, the rectified WPT system is transformed into a series of linear systems with complex load impedances. The steady-state electric quantities can be then explicitly calculated. This enables eMHA to seamlessly work with numerical optimization algorithms to facilitate the automated design and optimization of WPT systems. An example of optimal design and optimal control of a 10 W WPT system is demonstrated. The results obtained by eMHA and FHA are also compared. A prototype of the designed circuit was constructed. The accuracy and effectiveness of eMHA are verified by experimental measurements. This paper is accompanied by a MATLAB-based analytical tool with a graphical user interface demonstrating the effects of circuit variables on electrical quantities and waveforms. [ABSTRACT FROM AUTHOR]

A new single stage three-phase ac–dc converter with four switches and galvanic isolation is proposed in this paper. The new converter is simple and uses fewer switches than previously proposed ac–dc converters of the same type. It is a bridgeless converter that can operate with continuous input current and with any pulsewidth modulated method suitable for a standard three-phase six-switch voltage source rectifier. In this paper, the operation, control, analysis, and design of the proposed converter are explained and its features are discussed. Experimental results obtained from a prototype that confirm the feasibility of the converter are presented as well. [ABSTRACT FROM AUTHOR]

Compared with the conventional two-level dual-active-bridge (DAB) dc–dc converter, the three-level DAB converter could operate with lower voltage rated switching devices and provide more control degrees of freedom, which enhances the control flexibility. This paper proposes a modulation strategy with five control degrees of freedom. In the previous work with multiple control degrees, the optimization strategies for efficiency or inductor current minimization are investigated; however, these strategies all need detailed mode analysis and complex mathematical optimization tools to obtain the optimal duty cycles. In this paper, an optimization strategy for the root-mean-square value of the inductor current is proposed. This method extracts the fundamental and third-harmonic components from the high-frequency voltages on both sides and adjusts the amplitude of the bridge voltages by the vector diagram to obtain the optimal duty cycles. The inductor current can be reduced significantly at light loads with the proposed strategy, so the efficiency of the converter can be improved. Moreover, the optimization process does not need the detailed operation analysis of the converter, nor does it require the complex mathematical optimization tools. Finally, the performance of the three-level DAB and the optimization strategy are verified by the experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a new modular and active snubber cell, easily applicable, and attractive for converters, especially have many switches proposed. This snubber cell is implemented on the single phase of a grid-connected three-phase T-type three-level inverter (T-3LI). In this new converter, the main switches turn-on under zero-voltage transition and turn-off under zero-voltage switching (ZVS). Also, auxiliary switches turn-on under zero-current switching and turn-off under ZVS. All snubber diodes operate under soft switching (SS). There are no additional current and voltage stresses on the main switches. During an SS operation, the switching energies are transferred to a dc voltage source. Then, these energies are processed to input with an independent dc–dc converter. Thus, all switching energies are recycled. In this paper, the principle operation and steady-state analysis of the modular and active snubber cell for a single-phase T-3LI are presented and experimental results, rated 1 kW and 100 kHz, are provided to verify theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, we propose adaptive algorithms of gain tuning for Kalman filters and switching Kalman and $\mathcal {H}_{\infty }$ filters for discrete systems. Both of the gain tuning and switching rely on square means of innovations. This paper also provides stability analyses on time-varying Kalman filters and derives a sufficient condition for their asymptotic stability, on which our gain-tuning algorithm is based. It should be noted that the stability condition is available for even nonstabilizable systems having their uncontrollable poles on the unit circle. To illustrate those algorithms, we perform simulations using a harmonic oscillator model that is nonstabilizable and has its poles on the unit circle. Furthermore, we apply the algorithms to estimation of a ship's oscillation, particularly, with time-varying frequencies by simulations and model experiments. Consequently, all the results of stability analyses, simulations, and experiments have convinced that the algorithms are solid and effective. [ABSTRACT FROM AUTHOR]

This paper presents a unified second-stage LC filter applied in the three-state switching cell buck–boost converter, which provides current and voltage with low ripple and low noise. The unified second-stage filter promotes a reduction in the number of devices while maintaining the filtering performance of the converter, with second-stage LC filters at the input and at the output. Moreover, the unified filter, when associated with a three-state switching cell buck–boost converter, allows a size reduction of filter devices, especially for designs with duty cycle range around 1/2. Furthermore, the unified filter arrangement provides nondissipative clamping of switching devices and reduce the system order when compared to the converter with second-stage LC filters. In this paper, the static and dynamic characteristics of the proposed converter in continuous conduction mode (CCM) are reported. Experimental data were obtained from a laboratory prototype with an input range of 32 $\sim$ 72 V, constant output of 48 V, a load of 150 W, and switching frequency of 45 kHz. The measured efficiency for the rated load was 97% for maximum input voltage. A comparison of the size and performance of the proposed filter with the topology that uses second-stage LC filters at the input and at the output is also presented. [ABSTRACT FROM AUTHOR]

In this paper, a new bidirectional dc-dc converter that is based on the quadratic and switched-capacitor structures is proposed for Electric Vehicle applications. The proposed converter has high voltage conversion ratios, low voltage stress on the semiconductor devices, constant potential difference between the grounds of its low voltage and high voltage ports, and continuous current at its low voltage port. Synchronous rectification is utilized to enhance the efficiency of the converter. In addition, an extended version of the proposed converter is discussed in this paper. Finally, the experimental results obtained from a 2-kW/800-V scaled-down prototype validate the feasibility of the proposed topology and the correctness of its theoretical analysis. [ABSTRACT FROM AUTHOR]

The paper confirms that removing antiparallel silicon carbide (SiC) Schottky barrier diodes (SBDs) from SiC-based inverters offers positive effects without critical impact on inverter loss and electromagnetic interference (EMI) issues, moreover, the removal of SBDs reduces the inverter losses in many cases and noise emissions. This conclusion leads to the possibility to improve the power densities by removing SBDs. However, the removal of SBDs may cause some disadvantages such as an increase of the reverse conduction loss and influence of the body diode recovery phenomenon. Therefore, a comprehensive investigation of these advantages and disadvantages is necessary. In this paper, design criteria are proposed to clarify the conditions in which SiC-based inverters without SBDs have advantages over those with SBDs from the viewpoint of losses. On the other hand, to achieve the removal of SBDs, it is also necessary to confirm that removing SBDs does not cause severe EMI issues. The paper confirms that switching noises are reduced by the removal of SBDs; this is due to the larger damping effect of the SiC mosfets without SBDs than that of SiC mosfets with SBDs. The validity of the theoretical analyses and design criteria is confirmed with comprehensive experimental results. [ABSTRACT FROM AUTHOR]

In order to increase the efficiency of modern microprocessor power supplies used in data centers, 380-V dc power distribution systems have been attracting attention due to their high efficiency and high reliability. This paper presents an innovative single-stage approach for 380-V voltage regulator modules (VRMs) based on a quasi-resonant multilevel topology constant on-time operation. The proposed topology inherently integrates the multiphase approach, providing fast phase shedding and flat high-efficiency curves even at light-load conditions. This is a unique advantage, which is not possible to establish in the two-stage approach, which is very important in server architectures, and where high efficiency is required even at light-load conditions. This paper analyzes the circuit topology and proposes a control architecture for fast transient response, including current-sharing capabilities. The digital controller has been implemented in 0.16- $\mu$ m lithography together with a digital pulsewidth modulation with a 195-ps resolution and a 40-MS/s 7-bit analog-to-digital converter. Experimental results show an efficiency of 93% for a 120-A 380–1.8-V VRM power supply. [ABSTRACT FROM AUTHOR]

This paper proposes a fifth-order resonant immittance network based dual-active-bridge (DAB) converter and an optimal modulation method that will ensure high-efficiency operation of the converter under wide-range variations in voltage ratio and output power level. The proposed modulation method is based on the concept of total power loss minimization, where a loss model is developed and an optimization algorithm is formulated to compute the optimal set of internal and external phase shift parameters that will lead to the maximum efficiency for a given set of operating parameters including voltage ratio and output power level. It is found that to maintain high-efficiency operation under wide-range variations in voltage ratio and output power level, the DAB converter is required to switch between different operation modes and neither soft-switching operation nor unity-power-factor operation is able to achieve wide-range high efficiency performance when used alone. The importance of $reconfigurability$ of operation mode for achieving wide-range high efficiency performance is clearly illustrated in this paper. [ABSTRACT FROM AUTHOR]

In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

A space vector modulation (SVM) technique of a dual-inverter system for an open-end winding motor drive is described in this paper, where one inverter has a battery power source and the other has an only capacitor across the dc bus. The SVM must be achieved to operate the motor with field-oriented control and simultaneously to control the capacitor voltage at a constant value by using redundant switching states of the dual-inverter system. The control of the capacitor voltage is carried out by selecting a charging or a discharging mode in each redundant switching state, taking the instantaneous motor power factor into account. In addition, it is also required to reduce the error voltage pulses, which are generated in output multilevel voltage waveforms during the dead time. The compensation method of the existing dead-time scheme and the improved SVM sequence to reduce the error voltage vectors are proposed in this paper. The proposed methods are examined through several experimental tests and are confirmed to generate superior output voltage waveforms from the viewpoint of the measured total harmonic distortion and dv/dt. [ABSTRACT FROM AUTHOR]

This paper presents an FPGA-based Digital Real-Time Simulation (DRTS) environment for the analysis of Electromagnetic Transients (EMTs) of power systems that include multiple Power Electronic Converters (PECs). The main features of the proposed DRTS platform are that it i) employs two-value resistor switch model for PECs and thus avoids inaccuracies of Associate Discrete Circuit (ADC) model and ii) does not require separation of PECs by transmission lines (stub lines) and thus accurately represents PECs in close electrical proximity of each other. These features respectively result in a time-variant and large system admittance matrix which significantly increases the computation burden in each simulation time-step and can render it infeasible for real-time applications. To overcome this problem this paper introduces i) Switching-Network Partitioning (SNP) method which is tailored for PECs representation in FPGA and ii) Reformulated Modified Nodal Analysis (RMNA) method to enable computational parallelism between the solution of network and component models in FPGA. SNP enables solution-level partitioning of the PECs and the rest of the system. The developed DRTS platform enables sub-microsecond simulation time-step and provides a fixed hardware irrespective of the system configuration. Performance of the platform is evaluated for a study system and verified versus off-line simulation studies. [ABSTRACT FROM AUTHOR]

The main drawbacks of conventional direct torque control (DTC) drives are erratic switching frequency and high torque ripples. The multilevel inverter fed DTC drives are proved to be an alternative for eliminating these drawbacks. Apart from the commonly used three-level inverter fed drives, this paper presents an even-level inverter fed DTC drive. In this paper, a space vector modulated DTC algorithm for a four-level DTC drive is proposed and is implemented by feeding both ends of an open-end-winding induction motor with two-level inverters. The space vector modulation (SVM) algorithm uses a fractal based design for switching voltage vector generation and allied computations are performed in 60 degree co-ordinate system. Representation of vectors as integer values in 60 degree co-ordinate planes avoids fractional arithmetic, which simplifies the algorithmic computations. Detailed analyses of the drive performance under dissimilar operating modes are presented. The loading performance of the drive is experimentally verified on a 5-HP induction motor with a strain gauge type mechanical loading system. No-load experimental results were obtained from a laboratory model 2-HP induction motor drive operated in closed loop mode. [ABSTRACT FROM AUTHOR]

Partial shading condition drastically reduces the maximum power output of photovoltaic array. Partial shading occurs due to several factors, such as flying birds, trees, and passing clouds. Many ways can be mitigated partial shading problems in photovoltaic (PV) array. One among the way is reconfiguration techniques, namely reconfigure the location of PV modules in PV array based on irradiance levels in order to distribute shading effects and increasing maximum power. This paper proposed an optimal SuDoKu reconfiguration pattern for $9\times 9$ total-cross-tied (TCT) PV array to improve maximum power under partial shading conditions. In this approach, the physical location of PV modules in TCT array are rearranged based on optimal SuDoKu style without altering the electrical connections, so that the shading effects can distribute over the array. Further, the performance of proposed pattern investigated with existing SuDoKu pattern under different shading conditions by comparing the global maximum power point, mismatch losses, fill-factor, and efficiency using MATLAB-Simulink. Based on the results of this paper, it concluded that the proposed optimal SuDoKu reconfiguration arrangement is reducing the wiring arrangement and increasing the shading distribution over the array as compared to SuDoKu arrangement. [ABSTRACT FROM AUTHOR]

In this paper, two simple control methods are proposed for improving direct torque control (DTC) with a constant frequency torque controller (CFTC-DTC) in induction machines. The CFTC-DTC was initially introduced to reduce torque ripple and achieve constant switching frequency in inverters. However, when compared to the original DTC, the CFTC-DTC algorithm suffers from slow torque dynamic response owing to the selection of zero-voltage vectors during torque transient. In addition, when the motor operates at low speed, flux droop occurs at sector transitions, which leads to undesirable current distortions. The problem of flux droop occurs because of short-duty voltage cycles and small radial voltage components at low speeds. This paper has two main contributions—to eliminate zero-voltage vectors during torque dynamics in order to establish a fast torque response in the transient state, and to minimize the flux droop at the sector transitions by applying another triangular carrier and modifying the torque output in order to increase the duty voltage cycles at low motor speeds. A detailed analysis of the problems and proposed methods is presented. Experimental results are provided to validate the effectiveness of both proposed methods. [ABSTRACT FROM AUTHOR]

Various methods have been presented in the past to emulate the electrical behavior of modular multilevel converters (MMCs). To meet the demands for the reliability aspect study of MMCs, this paper proposes a viable setup to emulate the thermal behavior and to investigate its feasibility for reliability testing and thermal model validation of the power modules in the MMC. The proposed mission profile emulator has three distinctive features: 1) capable of emulating and measuring the thermal stresses of power modules; 2) capable of implementing practical switching profile as a full-scale MMC; and 3) having significantly reduced requirement for dc power supply compared to existing setups used for electrical studies. Theoretical discussions, and simulations as well as the experimental results are presented to demonstrate the capability of the mission profile emulator both electrically and thermally. Moreover, this paper is accompanied by a video demonstrating how to measure the junction temperature of the power devices using the optical fiber and the thermal camera. [ABSTRACT FROM AUTHOR]

The emergence of applications which require high-voltage switches has created a tendency to use semiconductor device series stacks. These series stacks permit operation at blocking voltages above semiconductor elements’ nominal voltage. Insulated-gate bipolar transistors (IGBT) are currently utilized for controllability and switching speed, when these topologies are employed. The main challenge therewith is guaranteeing voltage balance between IGBTs, both when blocked and when switching transistors. Most of the methods which have been proposed to mitigate static and dynamic voltage unbalances increase transistor losses. The series stack loss-less high voltage switch (LHVS) which mitigates voltage unbalances, thus reducing switching losses, is presented in this paper. LHVS consists of a circuit, which ensures soft IGBT switching, an energy recovery circuit, and a gate delay compensation circuit. Additionally, the insulation voltage level is guaranteed to be equal between control circuit and high-voltage side of each IGBT. The operating principle of the LHVS is detailed in this paper, as is experimental validation which has been performed for three series stack modules. Static unbalances are reduced to 1%, while the differences between collector–emitter voltage curves in switching “on” do not surpass 8 ns, and switching losses are reduced by 41%, as compared to the hard-switching topology. [ABSTRACT FROM AUTHOR]

This paper proposes a resonant switching cell model to analyze and design the single-ended resonant dc–dc converters. The single-ended zero-voltage switching (ZVS) converters such as the Class E converter are efficient for megahertz switching because they feature low turn-on and turn-off switching losses. Also, they use only a ground-referenced switch, allowing a simple gate drive circuit. In this paper, we investigate the single-ended resonant converter with the small input inductance, whereas the conventional Class E converter has a large input inductance. The main contribution of this paper is to propose the resonant switching cell as an analytic model that simplifies the analysis and the design of the resonant dc–dc converters. Furthermore, this paper presents the design method of the resonant switching cell model for minimizing the resonant current magnitude and conduction loss while the converter maintains ZVS property. The experimental results from a 10-MHz GaN-based prototype demonstrate the feasibility and effectiveness of the analysis and design based on the proposed resonant switching cell model. [ABSTRACT FROM AUTHOR]

This paper presents a novel procedure for energy management system (EMS) that can utilize the flexibility in transmission networks in a practical way. With the proposed enhanced EMS procedure, the reliability benefits that are provided by corrective transmission switching (CTS) in real-time contingency analysis can be translated into significant cost savings in real-time security-constrained economic dispatch. Simulation results show that the congestion cost with consideration of CTS is largely reduced as CTS can relieve potential post-contingency network violations. The effects of integrating CTS in existing EMS procedure on markets are also analyzed. In conclusion, this two-part paper shows that CTS can achieve substantial reliability benefits, as well as significant cost savings. [ABSTRACT FROM AUTHOR]

The flexibility in transmission networks is not fully utilized in existing energy management systems (EMSs). Corrective transmission switching (CTS) is proposed in this two-part paper to enable EMS to take advantage of the flexibility in transmission systems in a practical way. This paper proposes the following two EMS procedures: first, Procedure-A connects real-time security-constrained economic dispatch (RT SCED) with real-time contingency analysis (RTCA), which is consistent with industrial practice; and second, Procedure-B, an enhanced version of Procedure-A, includes CTS in EMS with the proposed concept of branch pseudo limit used in RT SCED. Part-I of this paper presents the methodology, whereas Part-II includes detailed results analysis. It is demonstrated that Procedure-A can effectively eliminate the base case overloads and the potential post-contingency overloads identified by RTCA, and Procedure-B can achieve significant congestion cost reduction with consideration of CTS in RT SCED. Numerical simulations also illustrate that integrating CTS into RT SCED would improve social welfare. [ABSTRACT FROM AUTHOR]

This paper proposes a two-stage energy management scheme (EMS) for AC–DC hybrid smart distribution systems (DSs). The proposed EMS is formulated as a multi-objective optimization problem to minimize the DS operation costs and energy losses. The proposed EMS is achieved in two stages. In the first stage, a network reconfiguration algorithm determines the optimal day-ahead reconfiguration schedule for a hybrid DS. In the second stage, a real-time optimal power flow algorithm determines the real-time operational schedule of the energy resources. This paper also introduces a new linearized power flow model for AC–DC hybrid DSs. This new model facilitates the formulation of the first-stage algorithm as a mixed-integer linear programming problem and the formulation of the second-stage algorithm as a linear programming problem. The proposed two-stage EMS was tested on a case study of a hybrid DS that included different types of loads and distributed generators. The results demonstrate the efficacy of the proposed EMS: the optimal day-ahead reconfiguration schedule was successfully obtained in the first stage, and the proper and optimal real-time operation was achieved in the second stage. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) are playing a pivotal role in the power sector with potential applications, such as interfacing renewable energy sources with the grid and several industrial drive applications. MLIs with a smaller number of switching devices are more promising due to their compact size, reduced cost, and higher efficiency compared with their traditional counterparts. This paper, therefore, presents a new three-phase seven-level inverter. This topology is a combination of two cascade-connected two-level voltage-source inverters (VSIs) and H-bridge cells with flying capacitors (FCs). This paper presents the operating principle and the balancing technique for the dc-link capacitors and FCs. The generation of various output voltage levels and the limitation of the sinusoidal pulsewidth modulation control for FC voltage balancing is also presented. The number of components in the proposed circuit configuration and their voltage ratings are considerably lower compared with the recently proposed topologies. The behavior of the proposed circuit configuration is first assessed with simulation studies and is then tested with a laboratory prototype. The simulation and experimental results validate the effectiveness of the proposed topology and the voltage balancing technique. [ABSTRACT FROM AUTHOR]

This paper presents a novel control strategy to significantly reduce the high-frequency transformer loss in a modular solid-state transformer (SST) based converter system. The modular SST design is based on an ac–dc power-electronic building block comprised of an H-bridge at the ac input and a bidirectional soft-switching isolated dc–dc converter with a medium-voltage insulated high-frequency transformer. The ac terminals of input H-bridges are connected in series and directly coupled to the medium-voltage ac line, while the output dc terminals are all connected in parallel at a low voltage. The key innovation described in this paper, without sacrificing the output performance, is the control scheme that reduces core and winding losses associated with the dc–dc resonant stage by turning off the selected dc–dc converters in synchronism with the line voltage. The prototype for the test described in this paper is based on a modular SST where each module is rated at 50 kVA, with a 200 kHz transformer using 1.7 kV silicon carbide discrete mosfets, but the described control concepts are more broadly applicable to similar topologies. [ABSTRACT FROM AUTHOR]

This paper deals with a multilevel ac–ac double conversion system that uses the intercell transformer (ICT) for applications which include generating systems and the interfacing of renewable energy sources with the utility grids. Each phase of the proposed configuration is formed through the ICT interleaving operation of two multilevel 5-level E-type legs to achieve the 3-phase 5-level back-to-back E-type converter (3Φ5L BTB E-type converter). The analytical procedure to select the inductance and capacitance values of both the input and output filters is described in the paper. Furthermore, the design and implementation of the input/output ICTs and inductors is discussed. The simulation and the experimental results on the 20-kVA interleaved 3Φ5L BTB E-type converter prototype are presented to validate the proposed analysis. [ABSTRACT FROM AUTHOR]

SiC-based diodes and mosfets switch extremely quickly with low conduction losses. Thus, from the perspective of efficiency, such devices are ideal for a continuous conduction mode (CCM) boost power factor correction (PFC) converter. However, the circuit parasitic becomes alive while switching with high $dv/dt$ and $di/dt$ values, which necessitates the need for electromagnetic compatibility (EMC) compliance measurements. Employing the best available low-loss SiC mosfet and SiC diode, in this paper, a 1-kW PFC boost converter prototype was designed, developed, and evaluated with the objective of quantifying the efficiency and EMC signature. The efficiency is evaluated through two approaches, namely, a circuit simulation and a laboratory measurement. With the first approach, the switching losses are obtained using a widely accepted double-pulse test methodology, and the conduction losses are taken from the data sheet, whereas with the second approach, the current and voltage are recorded at the input and output of the PFC converter using power analyzer. The electromagnetic interference (EMI) is monitored using line impedance stabilizing network and EMC analyzer. To maximize the efficiency, a fast, clean switching of the silicon carbide (SiC) is necessary. Utilizing a low-parasitic printed circuit board design approach and switching the selected low-loss SiC devices with a 0  $\Omega$ external gate drive resistance, this PFC boost yields a peak efficiency of 97.2% at full-rated power when switched at 250 kHz. Furthermore, the EMI noise was measured at 66 and 250 kHz. It was found that the same EMI filter size satisfies the CISPR 11 Class B conducted EMI limit at both switching frequencies with a noise of approximately 10 dB higher at 250 kHz. As the main contribution of this paper, the best case efficiency and worst case EMI are evaluated in this paper. [ABSTRACT FROM AUTHOR]

With the rapid development of photovoltaic and fuel cell stacks, high voltage gain converters are urgently demanded. Conventional boost is limited by the exaggerated duty cycle, it is impossible to obtain a high voltage gain while ensuring efficiency. Therefore, a zero-voltage switching (ZVS)-modified SEPIC converter that combines a voltage multiplier cell with traditional SEPIC is proposed in this paper. With detailed parameters design process, this presented converter works at zero voltage switching (ZVS), while obtaining high voltage gain without extremely high duty cycle. Besides, voltage stress is also reduced and low-voltage component with lower parasitic parameters can be used, thus efficiency is maintained. In order to further improve the power density, an integrated inductor scheme is adopted in this paper without changing intrinsic working states of the two inductors. A 36-W prototype is built, and experiments are conducted to verify the advantages of the proposed converter. The efficiency is up to 91.5% at full load. [ABSTRACT FROM AUTHOR]

This paper proposes a soft-switched modulation technique with synchronous rectification for an isolated single-stage single-phase matrix-type dc–ac converter. The dc side consists of a full bridge inverter, and the ac side is a 2×2 matrix converter-based cycloconverter. The proposed unipolar modulation strategy provides zero current switching/zero voltage switching (ZVS) for the ac side devices and ZVS-on for the dc side devices. It also allows natural commutation of the current flowing through the secondary side leakage inductor of the isolation transformer and the grid inductor during unity power factor (UPF) condition, thus eliminates the requirement of snubber circuit. An improved soft-switched flyback-based regenerative snubber circuit is also presented for non-UPF operation. Proposed snubber circuit recycles the energy stored in the snubber capacitors in every switching cycle. A guideline to design snubber circuit along with a comparative study is discussed in this paper. Performance of the proposed hybrid modulation technique is evaluated in an SiC mosfet based 1.2-kW dc–ac converter prototype. A detailed analysis of the converter performance has been presented in this paper considering the circuit non-idealities. [ABSTRACT FROM AUTHOR]

Solid state transformer (SST) integrated hybrid dc–ac microgrid (HMG) has wide operating capabilities in presence of dc–ac loads, renewable energy resources, and energy storage. This paper proposes control strategies for localized control of zonal hybrid microgrid, enabled by the SST and centralized energy storage devices (ESD) integrated using dual active bridge (DAB) converter. The control of DAB dc–dc converter is modified for zero circulating power flow (ZCPF) operation in both SST and ESD. Power management and coordination control used in this paper ensures the power supply reliability of the zonal HMG integrated through the SST. Microgrid system, along with its proposed controllers, provides a stabilized low-voltage dc and ac network ports, in both grid feeding and forming modes. The performance of the configured HMG system is evaluated under various power management scenarios using the MATLAB software platform. Further, the SST architecture, with its proposed controller, is tested on FPGA-based hardware platform. [ABSTRACT FROM AUTHOR]

This paper presents a novel integrated-stage light-emitting diode (LED) driver based on Flyback and resonant converters. The Flyback converter realizes power factor correction in the discontinuous conduction mode. The resonant converter is operated as a dc–dc converter to support the LED loads. Moreover, the resonant converter can clearly decrease the drain–source voltage of the active switch and exhibits zero-voltage-switch characteristics. Therefore, a cost-effective MOSFET can be chosen as the main control component that can decrease the cost of the whole system. Compared to a single-active-switch converter (such as Class-E converter), the number of passive components in the resonant converter can be limited to four. Therefore, the power density of the system can be improved drastically. In this paper, a 100-W prototype is presented under the experimental condition to validate the proposed integrated-stage LED driver. [ABSTRACT FROM AUTHOR]

The new continuous fast terminal sliding mode control (CFTSMC) is adopted in this paper for the speed regulation of permanent magnet synchronous motor drive applications. The CFTSMC method has a capability to converge the error faster, provide higher tracking accuracy and robust against the load disturbances. However, the CFTSMC method needs high switching gain during the strong disturbances, which introduces the chattering and steady state variation to the system. To address these issues, a composite CFTSMC technique based on the extended state observer (ESO) is proposed in this paper. The ESO is used to estimate the system disturbances for feed-forward compensation. The ESO-based CFTSMC method needs smaller switching gain than the CFTSMC method. Moreover, the ESO-based CFTSMC method has a strong robustness against load disturbances, better convergence rate, and better tracking accuracy than the CFTSMC and conventional continuous sliding mode control method. The superiority of the proposed control method is verified by the Lyapunov function and confirmed by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

Contribution: This paper introduces the real-world limitations and non-technical aspects of power electronics (PEs) projects to students through innovative tutorial activities. Background: Many electrical engineering curricula offer a PE courses (PECs) for third- or fourth-year undergraduate students. Prior research on PEs education mainly focused on improving students’ experimental skills through developing practical experiments, laboratory activities, and problem/project-based learning. An instructional approach that instead employs real-world knowledge and skills is worth evaluating. Intended Outcomes: Students should be able to consider real-world technical and non-technical limitations when applying theory to design PE circuits and converters, and be able to select and carry out appropriate tests to troubleshoot circuits. Application Design: Prior research on engineering education emphasized the importance of introducing real-world limitations to the students as part of their curriculum. This paper suggests that the tutorial activities presented in a PEC can help students acquire skills in designing and troubleshooting a circuit or system according to desired technical aspects, real-world limitations, and available data. Findings: Evidence of the validity of this approach in a PEC at two Australian universities, over four academic years, is provided. Students receiving the new tutorial activities had percentage scores some 10–15 points higher than those who had traditional tutorials. Another evaluation reveals the students’ vibrant participation in the activities during the new tutorial sessions. [ABSTRACT FROM AUTHOR]

This paper is concerned with quasi-synchronization of delayed memristive neural networks (MNNs) with switching jumps mismatches via aperiodically intermittent control. The issue is presented for three reasons: 1) the existing controllers for synchronization may be too complicated and not economical; 2) under the influence of switching jumps mismatches, synchronization of MNNs may fail to achieve; and 3) matrix measure method is less conservative but cannot be applied directly to synchronization of MNNs. To overcome these difficulties, the concept of asynchronously switching time interval is proposed to describe the phenomenon when the drive-response MNNs switch their connection weights asynchronously. Then, aperiodically intermittent control is designed and quasi-synchronization analysis is carried out based on a combined method that compromises the merits of interval matrix method and matrix measure method. A quasi-synchronization criterion, expressed in terms of the mixture of ${p}$ -norm and matrix measure of the memristive connection weights, is established. Meanwhile, the fundamental reason for the failure of complete synchronization is revealed. Moreover, an explicit expression of the error level is obtained and the design of the controller under a predetermined error level is presented. The obtained results in this paper reduce the conservativeness and provide a novel insight into the research of synchronization of MNNs. [ABSTRACT FROM AUTHOR]

A novel iterative convex optimization algorithm is proposed for the efficient synthesis of 4-D antenna arrays in this paper. A general nonconvex programming problem in terms of pencil beam synthesis at the center frequency and the suppression of multiple sidebands with different time schemes is first established. In order to decrease the nonconvexity with respect to equivalent excitations, the nonconvex programming problem is then decomposed into a convex optimization problem at the center frequency and a simplified nonconvex optimization problem at sidebands. Based on the optimized results at the center frequency, an iterative convex optimization algorithm that consists in solving a sequence of convex optimization problems is adopted to solve the nonconvex optimization problem efficiently. Because of the introduction of iterative idea and convex optimization, the proposed method achieves a good tradeoff between the optimization time and the optimality of the solution for the synthesis of 4-D antenna arrays of various scales. Numerical examples of uniformly or nonuniformly spaced 4-D antenna arrays are presented to demonstrate the excellent performance of the proposed algorithm in comparison with those of the previously reported methods. [ABSTRACT FROM AUTHOR]

In this paper, a new dc–dc high voltage gain converter with low-voltage stresses on switches and diodes is proposed. Even though, in the topology of the proposed converter there are not any coupled inductors and transformer utilized, the voltage conversion ratio of the proposed converter is considerable in comparison to its conventional types. Also, two switches of the proposed converter provide longer charge time for two inductors which make the proposed converter capable of providing high voltage gain without preselecting extremely large duty cycles. In addition, the number of power circuit components of the proposed structure are few and the voltage stresses on semiconductor elements are low. In this paper, theoretical analysis of the proposed converter for each operating mode is presented and the voltage gain, voltage and average current stresses of elements, maximum input current ripple, efficiency and equations of critical inductances are calculated. Moreover, to verify the capability of the proposed converter, it is comprehensively compared with other similar recently presented high voltage gain boost converters. Finally, an approximately 12 V/380 V and 520-W prototype of the proposed converter is implemented in laboratory to demonstrate its practical performance, then, the experimental results reconfirm each other and theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, an overload and short-circuit protection method is proposed for voltage source inverter-based uninterruptible power supply (UPS) system. In order to achieve high reliability and availability of the UPS, short circuit and overload protection scheme are necessary. When overload or short circuit happens, using the proposed control method, the amplitude of the output current can be limited to a constant value, which can be set by the customer to avoid the destruction of the power converter, and to obtain a faster recovery performance as well. The detailed principle of the proposed protection method is discussed in this paper. It mainly contains three parts in the control diagram for current limit, first is the anti-windup in the voltage and current controllers, then the feedforward of the capacitor voltage to the current control loop, the last is the fast reset of the resonant part of the current controller when overcurrent happens. The procedure of developing the control method is also presented in the paper. Experimental results on a commercial UPS system are presented to verify the effectiveness of the control method. [ABSTRACT FROM AUTHOR]

Fault tolerance in wind turbines is considered crucial to increase their reliability and availability levels. This paper presents a fault-tolerant direct-drive permanent magnet synchronous generator (PMSG) using new direct control techniques, with the ability to handle power semiconductor open-circuit faults in the full-scale back-to-back converter. The fault-tolerant topology consists of a five-leg converter, with a shared leg connected to a generator phase and to its corresponding grid phase, through a triode for alternating current (TRIAC). The main contribution of this paper consists of the development of an alternative direct torque control and direct power control schemes for both machine-side converter and grid-side converter, respectively. Moreover, a reliable fault diagnostics algorithm without requiring additional sensors is also integrated, providing the information required to instantaneously trigger fault-tolerant remedial strategies. Simulation and experimental results are presented to validate the effectiveness of the proposed fault-tolerant PMSG drive. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper presents bidirectional grid-connected modular multilevel converters (MMC) with direct digital control and division-summation processes to achieve power-injection and rectification functions. A direct digital control is developed to track current references, regulate dc-bus voltage and cell voltage, and balance the upper and lower dc-bus voltages. It can accommodate wide filter-inductance variation and take care of source voltage harmonics to achieve tight current tracking and low distortion output current. Based on the power-balance principle, the commands of arm currents can be determined directly. In this paper, the MMC configuration is introduced first, and then the control laws for current tracking and voltage regulation are derived in detail. Experimental and simulated results obtained from two 50 kW MMCs operated in power-injection and rectification modes have verified the analysis and discussion. [ABSTRACT FROM AUTHOR]

Graphene has attracted great interest for its distinctive band structure and physical properties. Results from previous studies show that a graphene cathode can provide stable field emission and intense emission in a vacuum. In this paper, a graphene cathode was fabricated using chemical vapor deposition (CVD) on copper electrodes, and the breakdown of the cathode in a high-pressure gas was studied. A low-jitter, self-breakdown gas spark switch based on a graphene cathode is proposed in this paper. The impulse-breakdown characteristics of this switch in a quasi-uniform electric field were studied. When the gap length is 5 mm, and the gas pressure is 0.6 MPa, the average breakdown voltage ($U_{\mathrm {BD}}$) is nearly 85.9 kV, and the voltage jitter is only 3.2%; these values are much lower than those for pure copper cathodes and graphite cathodes. The graphene cathode is found to be a suitable choice for use as a high-power gas switch in applications requiring an intense emission source. [ABSTRACT FROM AUTHOR]

This paper presents a self-learning strategy to control the deactivation of cylinders in large displacement automotive engines. Cylinder deactivation is a useful strategy to reduce emissions and improve fuel consumption without limiting the maximum engine power. A cylinder deactivation algorithm has to balance the target of reducing emissions with drivability concerns. Changing the cylinder configuration at the wrong time or too often negatively affects drivability and fuel efficiency. The paper proposes a self-learning algorithm inspired by the Markov Chain formalism. The proposed algorithm predicts the future fuel consumption and determines the best cylinder configuration based on that prediction. The prediction algorithm is learnt online using past inputs and thus adapts to the specific driver and conditions. Two versions of the algorithm are proposed that use two different inputs. The approaches are validated in simulation on an engine test-bed, showing that the self-learning algorithm yields fuel savings up to 10% without affecting drivability in the New European Driving Cycle. [ABSTRACT FROM AUTHOR]

Tile-based viewport-adaptive streaming methods have been used in delivering omnidirectional video for virtual reality applications. In these methods, the 360° video is encoded in multiple quality versions by using the motion constrained tile set (MCTS) technique. A set of high-quality and low-quality tiles, corresponding to viewport and non-viewport areas, respectively, are selected and transmitted to the user. However, these methods require frequent intra random access points to ensure seamless viewport switching capability, very high decoding complexity, or a multi-layer coding scheme. The frequent intra random access points include very high bitrate in viewport switching points. The high decoding complexity and multi-layer decoder requirements are not aligned with the omnidirectional media format (OMAF) standard. Such requirements make these methods sub-optimal or impractical for streaming the omnidirectional video. This paper studies the current tile-based solutions for delivering the omnidirectional content. Moreover, the OMAF-compliant shared coded picture (SCP)-based scheme is proposed in this paper for streaming the omnidirectional video. The core concept of the SCP-based method is to manipulate the switching point pictures in a way that the frequent intra-coded pictures are no longer required for the viewport switching operations between different quality versions of the content. The experiments illustrated that the SCP-based method outperforms the MCTS-based method on average by 11% to 14% in terms of streaming bitrate reduction with only 4% extra decoding complexity. [ABSTRACT FROM AUTHOR]

Clamp mode snubbers are very well suited for the series structure of the insulated-gate bipolar transistors (IGBTs) in pulsed power applications. They properly meet the necessities expected from them such as the fast operating of the series IGBTs since they have no effect on the gate side. In addition, they can provide safe voltage condition for the IGBTs in short circuit faults, which are very probable in pulsed applications. The clamp mode snubber can perform its voltage balancing task whenever the power capacity of the snubber can support the injected powers due to the voltage unbalancing factors. This paper initially introduces the main factors injecting power to the snubbers. Then, it will be illustrated that the exact injected power to each predetermined snubber cannot be determined due to the uncertainties about the effect of the voltage unbalancing factors. Although it is impossible to determine the exact value of the power injected to each snubber, the total injected powers to the snubbers can be calculated. Therefore, as an effective remedy, this paper proposes a concentrated snubber. Using the proposal, all the injected powers are conducted to a centralized circuit and can be easily managed. In addition, analytical expressions are provided for proper dimensioning of the proposed concentrated snubber elements. Furthermore, the performance of the proposed concentrated snubber is evaluated using simulations and experimental prototyping. [ABSTRACT FROM AUTHOR]

This paper investigates a Vienna rectifier as a charger for series-connected battery packs. Focusing on carrier-based pulsewidth modulation (CBPWM), the ripple current flowing through the neutral point (NP) results in the voltage oscillation if the loads are resistive. To reduce the ripple of average NP current with mitigated distortion under balanced and unbalanced dc-link voltages conditions, a novel CBPWM with segmented component injection scheme (SCIS) is proposed in this paper. After dc component injection, continuous intervals for optimized component injection and clamping intervals for compensation component injection are identified. Optimized components are calculated originally based on unbalanced factor to make the average NP current zero-size in one switching period. Moreover, unique compensation components generate suitable NP current to shape the sinusoidal input currents according to the circuit analysis. In consequence, the SCIS not only keeps the input current with low-harmonic distortion, but also minimizes the oscillation of dc-link voltage under balanced and unbalanced conditions. In addition, the value of the NP current during the clamping intervals is analyzed under various operating conditions. The effectiveness and the performance of the proposed SCIS are verified by simulation and experiments. [ABSTRACT FROM AUTHOR]

This paper introduces a novel modeling approach that allows to obtain fast simulations of pulsewidth-modulated dc–dc switched-mode power supplies (SMPS). The proposed methodology combines the use of precise switched models during transient evolutions and averaged models during steady-state or slowly varying conditions. In that way, the resulting mixed modeling approach enables to obtain the detailed switching behavior of SMPS in the context of long-term simulations. The commutation between models is automatically performed in runtime by an algorithm that detects the transient or slowly varying condition according to the evolution of some model variables. When the precise switched model is used, the mentioned algorithm also adjusts the averaged model parameters so that its results are accurate irrespective of the operating point. This paper also describes the implementation of the methodology in the Modelica language and reports simulation experiments showing that the results are as accurate as those obtained using precise switched models, but several times faster. [ABSTRACT FROM AUTHOR]

This paper presents an interleaved boost converter with a bifold Dickson voltage multiplier suitable for interfacing low-voltage renewable energy sources to high-voltage distribution buses and other applications that require a high-voltage-gain conversion ratio. The proposed converter was constructed from two stages: an interleaved boost stage, which contains two inductors operated by two low-side active switches, and a voltage multiplier cell (VMC) stage, which mainly consists of diodes and capacitors to increase the overall voltage gain. The proposed converter offers a high-voltage-gain ratio with low voltage stress on the semiconductor switches as well as the passive components. This allows the selection of efficient and compact components. Moreover, the required inductance that ensures operation in the continuous conduction mode (CCM) is lower than the one in the conventional interleaved boost converter. The distinction of the proposed converter is that the inductors’ currents are equal, regardless of the number of VMCs. Equal sharing of interleaved boost-stage currents reduces the conduction loss in the active switches as well as the inductors and thus improves the overall efficiency, as the conduction power loss is a quadratic function. In this paper, the theory of operation and steady-state analysis of the proposed converter are illustrated and verified by simulation results. A $\text{200-W}$ hardware prototype was implemented to convert a $\text{20-V}$ input source to a $\text{400-V}$ dc load and validate both the theory and the simulation. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) are being used in wide range of power electronic applications. These converters have attracted a lot of attention during recent years and exist in different topologies with similar basic concepts. This paper presents five main submodules (SMs) to be used as the basic structures of MLIs. The paper reviews the common MLI topologies from the structural point of view. The topologies are divided into the different SMs to show conventional MLI configurations and future topologies that can be created from the main SMs. A comparative study between different topologies is performed in detail. The MLIs are categorized and investigated with from different perspectives such as the number of components, the ability to create inherent negative voltage, working in regeneration mode and using single dc source. [ABSTRACT FROM AUTHOR]

This paper addresses the problem of fast transient simulation of high-speed coupled channels driven by transceivers that include transmitter feed-forward equalization (TX-FFE). Practical circuit hardware implementations of such drivers may not be correctly represented by industry-standard algorithmic modeling interfaces (AMIs), which are usually based on ideal digital finite impulse response filters. In particular, slow transients may arise when aggressive FFE is activated and particular switching sequences significantly stress local voltage regulators integrated in the output buffers. In this paper, we model this effect using a constructive hierarchical approximation of the analog waveforms that form a linearized vector Thevenin or Norton representation of the driver. This representation enables the accurate simulation of coupled channels including both differential- and common-mode signals. Analog waveforms at the receiver input are readily obtained by standard time-frequency transformations while including channel characteristics and any additional linear equalization block, if present. This proposed framework is compatible with industry-standard AMIs, extending their scope to coupled channels with nonideal TX-FFE circuit blocks. Eye diagrams and transient waveforms corresponding to millions of bits are computed in few seconds using a nonoptimized software implementation. Random jitter and crosstalk are seemlessly included as in standard AMI frameworks. The results of various numerical experiments on commercial transceivers are reported in this paper, confirming both the accuracy and the efficiency of the proposed framework. [ABSTRACT FROM AUTHOR]