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The number of applicable carrier-based pulsewidth modulation (PWM) patterns increases with the growth of output levels in scalable multilevel topologies, such as active-neutral-point-clamped (ANPC) converters. Therefore, it is hard to optimize PWM for such topology, especially with large output levels. In this paper, a simplified and modular carrier-based PWM design approach for multilevel ANPC converters is proposed. Inspired by the decomposition theory, the topology decomposition is introduced in this paper to decompose an N-level ANPC converter into low-level subtopologies. Then, the complete set of applicable PWM patterns is derived based on ANPC operation principles, which makes it possible to optimize the performance based on the various requirements in applications. Meanwhile, the carrier-based PWM is implemented through the utilization of subtopologies with low-level modulation schemes, such that the design process of carrier-based PWM is greatly simplified and modularly realized. Both the complete PWM patterns and PWM design examples with experimental results of several ANPC converters are provided to show the feasibility and modularity of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a neutral-point deviation and ripple compensating control method applied to a three-level neutral-point-clamped (NPC) converter. The neutral-point deviation and its harmonic components are analyzed with a focus on the average current flowing through the neutral-point of the dc link. This paper also proposes a control scheme compensating for the neutral-point deviation and dominant harmonic components under generalized unbalanced grid operating conditions. The positive and negative sequence components of the switching functions and ac input currents are employed to accurately explain the behavior of three-level NPC converter. Simulation and experimental results are presented to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

A high-frequency high voltage gain discontinuous conduction mode coupled-inductor boost LED driver based on planar component is presented in this paper. GaN switch is adopted with lower conducting resistance and higher switching speed. Zero voltage switching (ZVS) is achieved at the same time to reduce high switching loss caused by high switching frequency. Compared with the previous work, the voltage gain is higher and efficiency is higher because of ZVS. This paper focuses on high efficiency; therefore, resonant gate driver is adopted and efficiency is increased by 0.6%. In terms of the coupled-inductor, planar component is used and parameter optimization is also proposed to realize lower loss, including wingding loss and fringing loss caused by the air gap. A 500 kHz 36 W prototype has been designed to demonstrate theoretical analysis. In addition, comparison of drive loss between the resonant gate driver used in this paper and conventional driver implemented by Si8271 is made, revealing advantages of the resonant driver. Obtained efficiency was up to 92.1% at full load. [ABSTRACT FROM AUTHOR]

The use of electronic equipment and other dc-compatible appliances in homes and offices is increasing at a very fast rate, as well as the distributed generation of energy. These two statements will most likely trigger, in a near future, the adoption of district-scale dc grids, connecting dc microgeneration plants and consumers, in an effort to cut the number of conversion steps required to deliver power to dc appliances. DC–DC converters will be fundamental in these systems, allowing the establishment of several voltage levels. The reliability of these converters plays a critical role, ensuring service continuity of the loads connected to them. With the increment of reliability in mind, this paper proposes a simple yet effective open-circuit fault diagnostic method suitable for interleaved dc–dc boost converters, but equally functional for other dc–dc converter topologies. The improvements introduced in this paper greatly simplify the diagnostic action, while making the correct diagnostic of faults independent of the switching duty cycle. Moreover, an alternative reconfiguration scheme is proposed to mitigate the adverse impacts of such faults. To prove the effectiveness of these strategies, a three-phase interleaved boost converter prototype was used in the experiments. [ABSTRACT FROM AUTHOR]

In this paper, a single-inductor dual-output (SIDO) dc–dc converter is proposed. The significant feature of the proposed converter is feeding a constant power load in low-voltage side (LVS) port, where even feeding a variable load at LVS does not have any cross regulation to high-voltage side port with the desired approximation. Magnificently, both merits are obtained in open-loop manner, which is an outstanding characteristic in comparison with that of the existed converters. In this paper, soft commutation and soft switching of switches and diodes are investigated along with the aforementioned main novelty. Moreover, detailed theoretical analyses of the proposed SIDO dc–dc converter in continuous conduction mode are presented besides the comparisons with some other structures. Finally, theoretical analyses are verified through a 1500 W experimental prototype results. [ABSTRACT FROM AUTHOR]

In this paper, a series-capacitor-based interleaving buck power factor correction (PFC) converter is proposed, the intermediate energy storage capacitance of which is operated at discontinuous capacitor voltage mode (DCVM), and automatic power factor (PF) correction for this converter is obtained. Moreover, the voltage across the series capacitor of the proposed PFC converter is clamped at the input voltage, and thus peak voltage stress existed in the traditional DCVM buck PFC could be relieved. By effectively regulating the charge/discharge time for the series capacitor, ultrahigh step-down conversion ratio of the proposed converter is achieved, the conversion ratio of which is independent of the duty cycle and only related to the switching frequency and circuit parameters. Therefore, high PF can be obtained due to very narrow deadtime of the input current. Meanwhile, the proposed PFC converter can realize the soft turn-on of part power switch and soft turn-off of part power diodes. In addition, comparing with the traditional discontinuous inductor current mode PFC, the input current of the proposed PFC converter is continuous so that the peak value and root-mean-square value of input current can be reduced. The operational principle, performance analysis, and parameter design principle are given in this paper. The analysis results show that the PF and total harmonic distortion are also independent of the duty cycle. Finally, a 220-Vac input, 60 W/15 V output experimental prototype is built to verify the validity of the theoretical analysis. [ABSTRACT FROM AUTHOR]

Reduced switch active phase converters (APC) are cost-effective solutions for running three-phase loads from single-phase grids. This paper proposes a novel auxiliary-capacitor-based APC (AC-APC) for this application. The combination of the topological location of the auxiliary capacitor and the control of the AC-APC reduces current stress on the semiconductor devices. In this paper, a selection criterion for the optimal auxiliary capacitor value is formulated to reduce the device currents in such a way that the overall efficiency is enhanced. This paper presents a comparative analysis of converter volt-ampere (VA) rating and device power loss for conventional H-bridge active front-end and inverter-based topology, APC, and AC-APC. To evaluate the efficacy of the proposed AC-APC, an experimental study is conducted on the APC and the AC-APC feeding a 3-hp three-phase induction motor. At a full load of $\text{2.5}\,\text{kW}$ and $\text{0.8 } \text{power factor}$ , the measured maximum efficiency of the AC-APC is $2\%$ higher than that of the APC. Analytical evaluation of converter currents and device power loss are in close agreement with experimental observations. [ABSTRACT FROM AUTHOR]

In this paper, we present a novel real-time multiple-input multiple-output (MIMO) channel sounder for the 28 GHz band. Until now, most investigations of the directional characteristics of millimeter-wave channels have used mechanically rotating horn antennas. In contrast, the sounder presented here is based on a phased array structure that performs fast electronic steering of the beams in the horizontal and vertical domains. This approach drastically shortens the measurement times for measurements that are directionally resolved both at the transmitter (TX) and the receiver (RX), and the measurement time per location is reduced from minutes or hours to milliseconds. This not only enables measurement of more TX–RX locations for a better statistical validity but also allows to perform directional analysis in dynamic environments. The sounder also has high phase stability, which, in conjunction with the short measurement time, leads to a low phase drift between TX and RX. This in turn enables phase-coherent sounding of all beam pairs even when TX and RX have no cabled connection for synchronization, and thus avoids any delay ambiguity. Furthermore, the phase stability over time enables complex RX waveform averaging to improve the signal-to-noise ratio during high path loss measurements. The paper discusses the system design as well as the measurements performed for verification of the sounder performance. Furthermore, we present sample results from double directional measurements in dynamic environments. [ABSTRACT FROM AUTHOR]

The supply-side current of an inverter-fed induction motor (IM) is easily accessible and less affected by noises than the motor stator current. This paper proposes a novel sensorless speed estimation method for an IM using the spectrum of the supply-side current. However, due to the influence of fundamental supply frequency, it is difficult to carry out the speed detection straight from the supply-side current signal. In this paper, an analytic model for characterizing the supply-side current of an inverter-fed IM using the modulation theory and the switching function concept is developed. Then, the Hilbert transform is applied to extract the speed harmonic component from the supply-side current. Finally, an interpolated Goertzel algorithm is put forward to enhance the estimation precision of IM speed. The performance of the proposed sensorless speed estimation method is proved by the speed estimation results obtained from hardware experiments of an IM fed by an inverter under different load conditions. [ABSTRACT FROM AUTHOR]

This paper presents a balancing algorithm for the so-called Director Switch, a controlled, reverse conducting, self-powered, high-voltage switch, using series-connected insulated gate bipolar transistors (IGBTs). This is a key component on two new voltage-source, high-voltage direct current (HVDC) converter topologies. These, which promise efficiency, cost, and size reductions, are an alternate arm converter and a series bridge converter. One of the main design challenges of the director switch is how to supply the IGBT gate drivers, and other auxiliary electronics while overcoming the high-voltage insulation barrier to ground level. In this paper, this is achieved by using the energy stored in a capacitive clamp snubber circuit, which also helps with the overvoltage mitigation during rare hard-switching events. However, the clamp capacitor and by proxy the IGBT voltages become highly unbalanced during operation, compromising the integrity of the switch. This paper presents a balancing strategy that consists in applying a controlled delay in the switching of the IGBT levels, in a way that forces a voltage balance on all the switch levels. The paper explains the unbalance. Then, the balancing strategy is explained and validated on simulation and on a high-voltage experimental rig, on switches comprising two and three series-connected IGBTs, respectively. [ABSTRACT FROM AUTHOR]

This paper proposes a new class of topologies of single-stage high-frequency ac-link power converters, which is capable of providing both voltage step up/down within a wide frequency and voltage ranges. The proposed family, which supports bidirectional power flow, can interface various single/multi-port dc and/or single/multi-phase ac systems to provide dc–dc, dc–ac, ac–dc, or ac–ac power conversion. In this family of converter, which offers a very modular structure, a small inductor that forms the link exchanges power entirely or partially between the source and load. The proposed family can function in buck, boost, and/or buck–boost modes of operation, and a combination of these modes of operation is also feasible. In comparison to the parallel inductive four-quadrant link converters, the proposed family features a significantly reduced link peak current, reduced switch ratings, and reduced total number of power switches. These features enhance the efficiency, reduce the total cost, and increase the power density of the system. In order to further improve the overall efficiency of the system, minimize the current/voltage stress over all utilized semiconductor devices, and lower electromagnetic interference (EMI), a small capacitor is placed in parallel with the link inductor to realize soft-switching operation for the proposed configurations. Moreover, the proposed converters have the potential to incorporate a lightweight single-phase high-frequency transformer for electrical isolation. The proposed circuit topologies prevent reverse recovery issues and eliminate losses corresponding to body diodes of power switching devices via utilizing power switches in conjunction with external fast recovery diodes. The proposed family offers a very high level of reliability owing to its immunity from short circuit of input and output terminals and open circuit of the link inductor, which may occur in other power converters due to commutation problem resulting from a short deadtime or an overlap time between switches, unwanted control command, delay in electronic circuits, or EMI noise's misgating on or off, in addition to the absence of electrolytic capacitors in the power circuit. A control approach is also developed to regulate input and output currents in one stage of power conversion. A detailed theoretical analysis, operation, design methodology, and control strategy of the proposed family are provided in this paper, and the effectiveness and performance of the proposed converter family are verified via simulation results and experimentally. [ABSTRACT FROM AUTHOR]

Switching behavior analysis is an indispensable step for evaluating the steady-state performance of a bidirectional dc–dc converter and a prerequisite for soft-switching modulation design. For dual-bridge series resonant dc–dc converters (DBSRCs), the commonly used fundamental harmonic approximation (FHA) does not usually provide predictions accurate enough for reliable analysis and design. This paper discloses the exact closed-form solution for the zero-voltage switching (ZVS) operation conditions of DBSRCs for the most general case, in which all modulation quantities—i.e., phase shift, duty cycles, and switching frequency—are included. The proposed approach relies on a geometrical analysis of the converter state-plane trajectory, and allows us to analytically predict the ZVS or hard-switching state of any switch and for any given converter operating point. By inherently capturing the effects of all tank harmonics, the model disclosed in this paper shows higher accuracy than the conventional FHA-based approach, and translates into a practical tool for ZVS prediction and optimization at the converter design stage. Based on the derived analytical results, switching behavior of DBSRCs with minimum rms current trajectory (MCT) modulation is investigated, and an effective design choice of resonant-to-switching frequency ratio is presented, which contributes to reduced switching losses and enhanced efficiency. Furthermore, a variable frequency modulation scheme is formulated, achieving ZVS operation of all transistors over a wide input/output voltage range and efficiency improvement versus MCT technique. The analysis and conclusions are validated via extensive experimental tests on a 700 W DBSRC prototype. [ABSTRACT FROM AUTHOR]

In low-power applications of photovoltaic (PV) systems, the transformerless grid-connected inverters have been preferred to increase the efficiency and reduce the cost, size, and power losses when they are compared to the ones with the transformer. A transformerless single-phase inverter topology with a single dc-link capacitor for the grid-connected PV systems is proposed in this paper. The proposed inverter has been simulated by using a cooperation process of the MATLAB and SPICE package programs and it has been implemented for experimental verification. The proposed inverter reduces the high-frequency common-mode leakage current caused by parasitic capacitances of PV panels, whereas it is controlled with the unipolar sinusoidal pulsewidth modulation. Also, the results show that the common-mode voltage remains constant. The efficiency of the proposed inverter has been compared to that of the most common topologies having the dc-link decoupling during the zero voltage states. This paper is accompanied by a video file demonstrating the power loss distribution in the inverter. [ABSTRACT FROM AUTHOR]

This paper presents a novel insulated gate bipolar transistor (IGBT) behavioral model on the field programmable gate array (FPGA), which is suitable for the real-time simulation of fast transients in power electronics circuits. In this model, the static and dynamic behaviors of the IGBT switch are described and modeled separately. The static IGBT model is represented by the saturation region of output characteristic and is a part of the circuit network model. The dynamic IGBT model is combined with the static one to describe the fast switching transient behaviors by using the IGBT equivalent circuit model. The presented dynamic model in this paper does not involve any iterative solving algorithm and can be designed with highly pipelined structures on FPGA. Therefore, the IGBT switching transient waveforms can be generated precisely with a 5 ns resolution. The proposed model is tested with two cases—a four-phase floating interleaved boost converter and a three-phase five-level modular multilevel converter. The effectiveness and accuracy of the model are validated by comparing the real-time simulation results with offline simulation software. [ABSTRACT FROM AUTHOR]

High-speed train systems have proven to be very flexible and attractive systems that can be developed under various circumstances and in different contexts and cultures. As a result, high-speed trains are widely deployed around the world. Providing more reliable and higher data rate communication services for high-speed trains has become one of the most urgent challenges. With vast amounts of spectrum available, the millimeter wave (mmWave) system is able to provide transmission rates of several gigabits per second for high-speed trains. At the same time, mmWave communication also suffers from high attenuation; thus, higher energy efficiency should be considered. This paper proposes an energy-efficient power-control scheme of train–ground mmWave communication for high-speed trains. Considering a beam switching method for efficient beam alignment, we first establish the position-prediction model, realistic direction antenna model, and receive power model. And, then we allocate the transmission power rationally by using the power minimization algorithm while ensuring the total amount of transmission data. Based on this, this paper also develops a hybrid optimization scheme and finds the limit of total energy consumption when the number of segments goes to infinity. Using simulation with various system parameters and taking velocity estimation error into account, we demonstrate the superior performance of our schemes. [ABSTRACT FROM AUTHOR]

Aging of power system assets challenges utilities to maintain reliable service while minimizing their maintenance costs. Although malfunction of devices in the transmission or distribution networks can have catastrophic consequences, their failure is seldom unforeseen. Typically, the device aging occurs gradually over time until its health condition reaches a point of complete breakdown. The overall objective of this paper is to devise a non-invasive, online condition monitoring technique of circuit switchers for shunt capacitor banks. It aims to detect abnormal operation of these devices based on features derived from raw voltage and current waveforms, such that a predictive maintenance strategy may be employed before a complete failure occurs. The data analyzed in this paper are collected at a transmission capacitor bus, where the banks are equipped with pre-insertion impedance. Through a baseline range of values for selected parameters, the proposed technique is able to detect missing pre-insertion impedance during the capacitor energizing and failure of pre-insertion impedance switch out a few cycles after the energizing operation. [ABSTRACT FROM AUTHOR]

In this paper, a new class of bidirectional partial-resonance power converters is presented. The proposed family can be configured to interface single- or multi-port dc, single- or multi-phase ac systems at input-side and/or output-side. The proposed family offers a very modular structure, which can lead to cost reduction from a common designed module. In this converter, which accomplishes power conversion in a single stage, a small inductor placed in series with the input and output switch-bridges forms the link. This small link inductor is responsible for transferring power between different ports of the system. The proposed topologies can operate in buck, boost, and buck–boost modes of operation to step up and/or step down the voltage. In buck–boost mode of operation, the converter is controlled such that the power is entirely transferred through the link inductor; whereas, in buck or boost modes of operation only a fraction of the power is transferred through the link inductor, and the remaining power is directly transferred from input phases to the output phases. Galvanic isolation, which is typically a prominent factor contributing to power density of a converter, can be provided by means of a compact and lightweight single-phase high-frequency transformer added to the link. In comparison with earlier generations of partial-resonance inductive-link power converters, in the proposed converter, the level of link peak current and consequently power-loss, as well as voltage and current stress of switches are dramatically decreased. A very small film capacitor can be placed in parallel with the link inductor to facilitate zero-voltage-switching (ZVS) operation for all the switches/diodes. Apart from increasing the overall efficiency, minimized dv/dt stress and improvement in power density are achieved by adding the link capacitor. The proposed converter employs four-quadrant switches, i.e., bidirectional-conducting bidirectional-blocking switches, and charges the link inductor in both positive and negative directions in each cycle. In view of this, better utilization of the link inductor and lower total harmonic distortion (THD) are offered. Furthermore, two distinct switching algorithms are developed for the proposed family of converters. In this paper, the detailed behavior of the proposed family is investigated analytically, and simulation and experimental results are presented to evaluate the performance and effectiveness of the proposed converter. A low-power proof-of-concept prototype with input voltage of 59 V/161 V, load voltage of 178 V/73.5 V, maximum switching frequency of 4.9 kHz/3.65 kHz at 215 W/450 W in a step-up/step-down operation is considered for the experimental verification. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

This paper studies the high power density bidirectional dc–dc converter with interleaving, soft-switching, and near critical conduction mode (near-CRM) operation. Systematic design and control methods are proposed to enhance the effectiveness of passive currents balancing between multiple interleaved phases without using individual phase current feedbacks. This paper first analyzes the zero voltage turn-on operation, including the turn-off energy diversion by the added snubber capacitor and the turn-off resonance models. Second, the intrinsic inverse co-relation between the phase current deviation and the resulting effective duty cycles variation is quantitatively formulated and modeled as a closed-loop mechanism that balances the currents passively. Then, the design constraints of the system parameters including the snubber capacitance, dead time, and valley currents of the near-CRM mode are formulated to guarantee the effectiveness of counteracting the current unbalance. Finally, a variable switching frequency control is proposed to actively control the valley current and maintain the current balancing effectiveness throughout the operating range. An IGBT-based 20-kW three-phase interleaved prototype with the maximum efficiency of 99.1% is constructed to verify the proposed design and control methods. [ABSTRACT FROM AUTHOR]

In this paper, an indirect herding problem is considered for a single herder that is outnumbered by multiple target agents. Indirect herding is a problem that involves a network of one or more controllable herding agents and indirectly controlled target agents (i.e., the target agents can only be controlled through the herder by exploiting herder–target interactions), where the goal is to achieve a network-wide objective. This paper investigates the unique problem where a single herder is required to regulate all the target agents to some desired formation. The problem is further complicated by the fact that the target agents have uncertain nonlinear dynamics, including uncertainties in the herder–target interaction. Neural network function approximation methods are used along with switched systems methods to ensure uniformly ultimately bounded convergence of the agent trajectories provided the developed sufficient dwell-time conditions are satisfied. Simulation and experimental results that involve one herding agent and multiple target agents demonstrate the validity of the designed controller and function approximation scheme for multiple herding objectives. [ABSTRACT FROM AUTHOR]

This paper proposes a distributed coordinated voltage control scheme for distribution networks with distributed generation (DG) and on-load tap changer (OLTC). In this scheme, static synchronous compensators (STATCOMs), DG units and OLTC are coordinated to regulate voltages of all buses to be close to the nominal value in the distribution network, mitigate voltage fluctuations, and minimize the number of operations of OLTC while considering different temporal characteristics of voltage regulation devices. The optimization problem of coordinating DG units and STATCOMs is decomposed by the gradient projection (GP) method. The local controller optimizes the reactive power outputs of DGs and STATCOMs according to local voltage and reactive power measurements, and still achieves the optimal coordination of DG units and STATCOMS in a decentralized manner without a central controller or communication between local controllers. The OLTC control scheme is designed to correct the long-term voltage deviations based on model predictive control (MPC) while minimizing the number of operations. The local controllers send the calculated reactive power references of DG and STATCOMs to the OLTC controller, which achieves distributed coordinated voltage control and mitigates the computation burden. A distribution network with two 20 kV feeders and 8 DG units was used to validate the control performance of the proposed coordinated voltage control scheme. [ABSTRACT FROM AUTHOR]

In the face of increasing natural disasters and an aging grid, utilities need to optimally choose investments to the existing infrastructure to promote resiliency. This paper presents a new investment decision optimization model to minimize unserved load over the recovery time and improve grid resilience to extreme weather event scenarios. Our optimization model includes a network power flow model which decides generator status and generator dispatch, optimal transmission switching (OTS) during the multi-time period recovery process, and an investment decision model subject to a given budget. Investment decisions include the hardening of transmission lines, generators, and substations. Our model uses a second order cone programming (SOCP) relaxation of the AC power flow model and is compared to the classic DC power flow approximation. A case study is provided on the 73-bus RTS-GMLC test system for various investment budgets and multiple hurricane scenarios to highlight the difference in optimal investment decisions between the SOCP model and the DC model, and demonstrate the advantages of OTS in resiliency settings. Results indicate that the network models yield different optimal investments, unit commitment, and OTS decisions, and an AC feasibility study indicates our SOCP resiliency model is more accurate than the DC model. [ABSTRACT FROM AUTHOR]

This paper proposes a multifunctional control strategy and associated control algorithms for distributed wind-turbine (WT) based nano-grids connected to a distorted utility-grid. The contribution is on a new strategy with innovative control algorithms to coordinate multiple converters for a multitasking operation of the nano-grids. The novelty is on a unique control design with feasibilities: maximizing the generated power from WT, maintaining power quality in both ac- and dc-sides under critical conditions of the power grid, and improving power quality against distortion from local nonlinear loads under a reduced switching frequency. A robust fast-dynamic predictive control method is developed for current controllers to fulfil the multifunction. Unconstrained deadbeat control inputs are derived in twofold targets: ensuring fast dynamic response and significantly reducing both the computation and switching frequency for finite predictive control. The control system is applied on a permanent-magnet synchronous generator (PMSG) WT-based nano-grid connected to a distorted utility-grid. An OPAL-RT-based real-time platform is used for comparative studies among the proportional integration (PI) control, finite predictive control (FS-MPC), and proposed control method. The performance verification exhibits the power quality improvement in both the nano- and utility-grids under critical conditions via high-performed regulation of currents, voltages, reactive power, and rotor-speed of the PMSG-WT. [ABSTRACT FROM AUTHOR]

The successful mission of CubeSat require reliable and fault-tolerant electrical power system (EPS) that powers all the other subsystems and payloads. Several studies have shown that EPS failure has been one of the main contributors for the CubeSat mission failure. The main objective of this paper is to enhance the lifetime of CubeSats EPS by proposing a distributed EPS architecture and power-down mode. The distributed architecture consists of independent converters for maximum power point tracking operation of photovoltaic (PV) panels. This is possible by using gallium nitride field-effect transistors to reduce the converter footprint and placing the converters on the back-side of the PV panels. Also, single-inductor based $N$ -1 redundant converters for generation and load-side are proposed to provide uninterrupted operation during component failures. Thus, the proposed distributed architecture not only improves the reliability but also facilitates placement of redundant converters to achieve the fault-tolerant capability. To further reduce the electrical and thermal stresses on the semiconductor devices and thus, improve the EPS life span, a novel power-down mode is proposed for the power converters. In this mode, semiconductor devices are switched-off whenever the power processed is below the threshold level and/or no-load operation. Reliability block diagrams are illustrated to demonstrate the reliability improvement and calculations shows that the proposed distributed architecture has higher reliability than the conventional EPS architecture. All the proposed concepts are validated using a prototype developed based on the specifications of MYSAT-1, which is an 1U CubeSat launched by Khalifa University. [ABSTRACT FROM AUTHOR]

In a recent work, Beierle, Brinkmann and Leander presented a recursive tree search for finding APN permutations with linear self-equivalences in small dimensions. In this paper, we describe how this search can be adapted to find many new instances of quadratic APN functions. In particular, we found 12,921 new quadratic APN functions in dimension eight, 35 new quadratic APN functions in dimension nine and five new quadratic APN functions in dimension ten up to CCZ-equivalence. Remarkably, two of the 35 new APN functions in dimension nine are APN permutations. Among the 8-bit APN functions, there are three extended Walsh spectra that do not correspond to any of the previously-known quadratic 8-bit APN functions and, surprisingly, there exist at least four CCZ-inequivalent 8-bit APN functions with linearity 27, i.e., the highest possible non-trivial linearity for quadratic functions in dimension eight. [ABSTRACT FROM AUTHOR]

The large antenna arrays with hybrid analog and digital (HAD) architectures can provide a large aperture with low cost and hardware complexity, resulting in enhanced direction-of-arrival (DOA) estimation and reduced power consumption. This paper investigates the trade-off between DOA estimation and power consumption in large antenna arrays with HAD architectures. Particularly, the DOA estimation problem of fully-connected, sub-connected (SC), and switches-based (SE) hybrid architectures is formulated into a unified expression, with the compression matrix in a time-varying form. Based on this model, we derive a dynamic maximum likelihood (D-ML) estimator that is suitable for both HAD and conventional fully digital (FD) structures, and the closed-form expression of Cramér-Rao bound (CRB) to evaluate the performance limit of the D-ML estimator for different HAD structures. The theoretical CRB analysis in the single-source case reveals that, the SC structure has the ability to achieve approximately the same performance as the FD structures at DOAs around zero, but suffers from the inherent angle ambiguity because of the antenna grouping. In addition, we propose a dynamic SC (D-SC) structure that is proved to eliminate the angle ambiguity with time-varying phase shifters, and a switch optimization (SWO) algorithm to minimize the CRB of SE structures. Finally, we introduce a new metric, DOA efficiency, to measure the trade-off between the DOA estimation performance and power consumption of different structures. Simulation results verify our theoretical analysis and the superiority of the proposed D-SC structure and the SWO algorithm. [ABSTRACT FROM AUTHOR]

This article develops a series of improved Z-source dc–dc converters to realize additional voltage pumping and high power density through two propositions. Proposition 1 develops two improved positive- and negative-connected Z-source dc–dc converters (IPZSC and INZSC), using the same number of components as in the existing voltage pumping Z-source converter. Based on Proposition 1, Proposition 2 proposes four novel embedded Z-source dc–dc converters (EZSCs) by placing the source in a specifically designed position, which realizes lower voltage stresses across capacitors. Various technical aspects of the proposed EZSCs, including operations, power losses, and small signal stability analyses are detailed in this paper. Besides, comparisons between the proposed series of improved Z-source dc–dc converters and other existing Z-source dc–dc converters are thoroughly made to demonstrate the better performance of the EZSCs. Finally, experiments are conducted to well validate the effectiveness and superiority of the proposed converter circuits. [ABSTRACT FROM AUTHOR]

Objective: This paper presents a Proof-of-Concept (POC) design and implementation of a biosensing and communication system that can be used for biotelemetry in neural and Gastrointestinal (GI) applications. Methods: Our proposed system is based on backscattering from a semi-passive Radio-Frequency-Identification-Device (RFID) implemented using an Application Specific Integrated Circuit (ASIC) in which electronic switching between transistor gates in high and low states create an impedance difference, thereby effectively changing the ASIC's Radar Cross Section (RCS) and thus modulating its backscattered field. The ASIC is used in conjunction with a biosensor to measure and transmit vital signs from within the body. With this system, we conducted backscatter propagation experiments through different biological and phantom tissues (in ex-vivo and in-vitro) in the GI and neural environments. Results: Our results show that the backscattered waveforms can penetrate tissues of various compositions and thicknesses with power received at distances of up to 55 cm away from the RFID ASIC. Furthermore, results from single- and multi-bit biotelemetry measurements showed a high signal fidelity with low Bit-Error-Rate (BER) while being able to resolve varying tissue temperatures measured by the biosensor in our system. Conclusion: We realized a POC system in which on-chip transistor switching in an ASIC can be used to achieve backscatter communication and biosensing. This system is deployable in neural and GI applications. Significance: Our findings in this work will provide an important practical basis for the design and development of RFID ASIC for biosensing and biotelemetry in medical applications. [ABSTRACT FROM AUTHOR]

Data center networks typically adopt multi-rooted tree topologies to provide high bisection bandwidth. Various fine-grained load balancing schemes have been proposed to split flows across multiple paths. However, data center networks suffer from many uncertainties such as highly dynamic traffic. These uncertainties easily make network become asymmetric, resulting in significant packet reordering. Unfortunately, existing solutions passively deal with packet reordering based on a threshold and hardly adapt to asymmetric networks because of lacking the explicit reordering feedback. These solutions either fail to quickly respond to packet loss or cause unnecessary fast retransmission, which reduces link utilization and increases flow completion time. In this paper, we propose a fine-grained load balancing scheme RMC to eliminate the impact of packet reordering and handle uncertainties in asymmetric networks. To avoid unnecessary fast retransmission, the switch proactively identifies reordered packet according to local queue length and global path latency. Furthermore, we employ a coding technique with redundancy optimization to reduce long-tailed flow completion time under network asymmetry. Through a series of large-scale NS2 simulations and testbed experiments, we demonstrate that RMC effectively avoids unnecessary fast retransmission under different network scenarios and reduces flow completion time by up to 72% compared with state-of-the-art schemes. [ABSTRACT FROM AUTHOR]

This paper presents an isolated single-stage on-board electric vehicle charger without an intermediate DC-link. Based on an isolated current-source topology, the converter features soft-switching in semiconductors regardless of load variation for the full AC line voltage range. Moreover, it requires no external snubber or clamp circuits. The power factor correction and voltage regulation are provided by a relatively simple phase shift modulation, while the amount of circulating energy is kept at minimum. The charger is distinguished by its efficiency characteristic – the maximum is achieved in the constant power charging mode. The control method, component stresses, and design constraints of the topology are analyzed. The concept is verified using a 3 kW experimental SiC-based prototype, which reaches a peak efficiency of 96.4%. Moreover, the charger has demonstrated efficiencies above 95% with the THD of 4.1% when operating in constant power mode at the maximal power. [ABSTRACT FROM AUTHOR]

In a previous paper (Part 1) the authors have performed the simulative evaluation of the life lost by HVDC extruded cables subjected to long TOVs occurring in VSC HVDC cable systems. The conclusions were that it cannot be completely ruled out that the field levels and the duration of such TOVs are a potential threat to certain cable designs, and tests other than Load Cycling Type Tests after CIGRÉ Technical Brochure 496 could assess quantitatively the potential threat associated with long TOVs. For these reasons, in this Part 2 superimposed switching impulses applied during Type Tests after TB 496 are analyzed in order to check if such impulses might be equivalent to long TOVs as for their electro-thermal stress effects on extruded insulation. The analysis is similar to that carried out for long TOVs in Part 1, i.e., it consists of: calculating the electric field during superimposed switching impulses; comparing it with the field during long TOVs; calculating with Miner's law of cumulated damage the life lost during superimposed switching impulses and comparing it with the loss of life during TOVs. A brief literature survey of potential high field effects during long TOVs is also reported. [ABSTRACT FROM AUTHOR]

AC–DC line-commutated converters (LCCs) are widely utilized in existing and emerging ac–dc power systems. Analysis of such systems under balanced and unbalanced conditions is often carried out using electromagnetic transient (EMT) simulation programs. Therein, the detailed switching models of LCCs are often the computational bottlenecks for system-level studies. Recently, the parametric average-value models (PAVMs) have been developed to achieve fast and efficient simulations of switching converters. In this paper, the PAVM methodology is extended to consider operation of LCCs under unbalanced conditions in the ac network. This is done in the extended PAVM by formulating the ac-side harmonics in positive and negative sequences as well as the dc-side harmonics (i.e., ripples) with respect to the ac network imbalance. The new PAVM is validated experimentally and by simulations, and is demonstrated to be accurate in reconstructing the ac and dc waveforms under unbalanced conditions in the ac network. Meanwhile, the proposed PAVM is computationally much faster than its detailed switching model counterpart. [ABSTRACT FROM AUTHOR]

This paper presents a new single-source three-phase seven-level inverter with an inherent three-time voltage boosting capability for medium-voltage applications. The proposed topology is comprised of series connection of two switched-capacitor (SC) networks with an added half-bridge module per phase. Each of such integrated SC networks requires a single capacitor associated with three active power switches. The three-time voltage boosting feature of the proposed topology can reduce the dc-link voltage requirements by 50% in comparison to the traditional neutral point clamped (NPC), flying capacitors, active NPC (ANPC), hybrid clamped ANPC, and cascaded H-bridge topologies, and 75% to advanced ANPC topologies. It can also reduce the number of required switches and capacitors as well as their voltage stresses compared to those state-of-the-art topologies reported in the literature. By integrating “n” number of added SC networks in the proposed seven-level basic topology, the number of output voltage levels can be extended to 2n+3 per phase. A finite control set model predictive control algorithm is also derived to control the converter in both the active and reactive power exchanges modes without distorting the generated grid current quality. The capacitor voltage balancing is inherent in the proposed topology, and thus, there is no need for any additional voltage balancing circuit, which further reduces the control complexity. The performance of the proposed topology and its control algorithm are validated by several measurement results. [ABSTRACT FROM AUTHOR]

An improved two-stage model predictive current control (MPCC) for three-phase three-level converters in the paper, which can simultaneously achieve common-mode voltage (CMV) reduction, effective dc-link capacitor voltage control, and decreased computational burden, is proposed. Compared to the other current control strategies, it has the capability of handling multiple control objectives and possesses a simple structure. Furthermore, it greatly reduces the CMV since the peak CMVs of all the candidate voltage vectors are constrained to be less than one sixth of the dc-link voltage. In addition, an optimal two-stage voltage vector selection mechanism is employed in the proposed method. It helps to significantly reduce the computational complexity. Simulation and experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents Space Vector Modulation (SVM) sequences that reduce Common Mode Voltage (CMV) in Dual Three-phase Asymmetrical Induction Motor (DTAIM). At first, two existing SVM techniques such as Reference SVM (RSVM) and CMV1 are studied. Additionally, three new switching sequences are developed as CMV2, CMV3 and DCMV3, which reduce peak magnitude of CMV by 66.8% in comparison with RSVM technique. In SVM techniques, to obtain least CMV, zero vectors are usually replaced by two opposite large Active voltage Vectors (AV) with equal time duration. In such topologies like CMV1, total six AVs are utilized to synthesize the reference vector. The proposed SVM technique CMV2 utilizes only five large AVs to synthesize the reference vector and reduces CMV. Selection of five neighbouring AVs is reflected in reduction of harmonic flux trajectories and stator current ripple in proposed techniques. Additionally, two more switching sequences (CMV3 and DCMV3) are developed related to utilization of specific zero voltage vectors in all sectors (7 and 56) that produce zero CMV. These two switching sequences also provide easy implementation feature during the development of c-code program. In this study, CMV and stator current ripple are considered as performance parameters for different SVM techniques. All SVM techniques are analysed by analytical results, computer simulations, and using prototype test setup of DTAIM fed by Dual Three-phase Voltage Source Inverters (DTVSIs). [ABSTRACT FROM AUTHOR]

Mobile edge computing becomes a promising technology to mitigate the latency of various cloud services. In addition, network function virtualization (NFV) has been shown a great potential in reducing the operational cost of cloud services while enhancing the flexibility of virtual network function deployments, by implementing dedicated hardware network functions as pieces of software in generic servers. Recently, the GPU acceleration has been investigated to speed up flow processing in virtual network functions (VNFs), by leveraging the parallelism of GPUs. VNFs that need accelerations prefer to stay at cloudlets (locations) equipped with GPUs. However, little attention has been paid for the VNF placement that takes into account GPU-affinity in cloudlets of mobile edge clouds. In this paper, we consider the affinity-aware throughput maximization problem in a mobile edge cloud via leveraging the parallelism on GPUs for user requests with VNF requirements. We consider two types of affinities in the VNF placement: The soft-affinity that allows VNFs to be executed by either CPUs or GPUs in cloudlets; and the hard-affinity that only allows VNFs to be placed to the GPUs of a specified set of cloudlets. We formulate two corresponding VNF placement problems in a mobile edge cloud. Specifically, we first propose an exact solution to the soft-affinity throughput maximization problem by formulating an Integer Linear Program (ILP). We then propose an efficient algorithm for the problem, by proposing a randomized algorithm with a provable approximation ratio for the hard-affinity-aware throughput maximization problem and extending the proposed approximation algorithm to the soft-affinity throughput maximization problem. Furthermore, assuming that user requests arrive into the mobile edge cloud one by one without the knowledge of future arrivals, we devise an online algorithm with a good competitive ratio for this dynamic hard-affinity-aware throughput maximization problem. Finally, we evaluate the performance of the proposed algorithms, through simulations and implementations in a real test-bed. Experimental results show that the performance of the proposed algorithms outperform their existing counterparts and achieve higher throughput. [ABSTRACT FROM AUTHOR]

This paper introduces a network topology identification (TI) method based on deep neural networks (DNNs) for online applications. The proposed TI DNN utilizes the set of measurements used for state estimation to predict the actual network topology and offers low computational times along with high accuracy under a wide variety of testing scenarios. The training process of the TI DNN is duly discussed, and several deep learning heuristics that may be useful for similar implementations are provided. Simulations on the IEEE 14-bus and IEEE 39-bus test systems are reported to demonstrate the effectiveness and the small computational cost of the proposed methodology. [ABSTRACT FROM AUTHOR]

Line-switching operations introduce several concerns to microgrid operators since they trigger reliability and power quality issues in addition to increasing the wear and tear cost of switching devices. This paper proposes a novel methodology for achieving seamless line-switching in low-inertia islanded microgrids. The proposed methodology aims at mitigating the detrimental line-switching impacts by minimizing the power flow in the switched lines at the moments of executing the switching operations. The minimization of the power flow is realized by optimizing the droop control parameters of the DGs during the transition from one network topology to another. Besides, during executing a series of line-switching operations, the sequence of switching is also optimized to minimize the total switched power. While optimizing the line-switching execution sequence, the transitional droops are optimized for each line-switching operation within that sequence. A dynamic mixed-integer nonlinear programming problem is formulated to find both the optimized dynamic transitional droops and line-switching sequence simultaneously. Simulation results demonstrate the effectiveness of the proposed seamless line-switching methodology where the switched power can be reduced by more than 80% for a single line-switching operation and 54% considering a series of four switch exchanges in addition to achieving several instances of zero-current switching. As a result, a significant decrease in the peak of voltage transients has been recorded for some cases. [ABSTRACT FROM AUTHOR]

This paper investigates the outage and throughput performance of full-duplex (FD) cooperative relaying (CR) based non-orthogonal multiple access system (NOMA) with energy harvesting (EH) i.e., FD-CR-EH-NOMA system. We consider a network scenario, where the base station (BS) serves two downlink users, with the near user configured as a FD relay to deliver messages to the far user. We derive analytical expressions for the outage probabilities experienced by the users and the system outage probability of FD-CR-EH-NOMA network under time switching relaying (TSR) protocol in the presence/absence of direct link from BS to the far user. Assuming imperfect successive interference cancellation (i-SIC), we derive analytical expressions for (i) optimal power allocation (OPA) factor at the BS and (ii) optimal time switching (OTS) factor at the relay that independently minimizes the system outage probability. Further, we use the alternating optimization technique to determine the jointly optimal power allocation and time switching factors that minimize the system outage probability. Furthermore, we determine the OTS factor that maximizes the asymptotic throughput of the system in the delay-limited transmission mode. With the help of numerical and simulation investigations, we show that the system outage and throughput of the considered network improve significantly under the proposed schemes. [ABSTRACT FROM AUTHOR]

We formulate and study the problem of ON-OFF privacy. ON-OFF privacy algorithms enable a user to continuously switch his privacy between ON and OFF. An obvious example is the incognito mode in internet browsers. But beyond internet browsing, ON-OFF privacy can be a desired feature in most online applications. The challenge is that the statistical correlation over time of a user’s online behavior can lead to leakage of information. We consider the setting in which a user is interested in retrieving the latest message generated by one of $N$ sources. The user’s privacy status can change between ON and OFF over time. When privacy is ON the user wants to hide his request. Moreover, since the user’s requests depend on personal attributes such as age, gender, and political views, they are typically correlated over time. As a consequence, the user cannot simply ignore privacy when privacy is OFF. We model the correlation between user’s requests by an $N$ state Markov chain. The goal is to design query schemes with optimal download rate, that preserve privacy in an ON-OFF privacy setting. In this paper, we present inner and outer bounds on the achievable download rate for $N$ sources. We also devise an efficient algorithm to construct an ON-OFF privacy scheme achieving the inner bound and prove its optimality in the case $N=2$ sources. For $N > 2$ , finding tighter outer bounds and efficient constructions of ON-OFF privacy schemes that would achieve them remains an open question. [ABSTRACT FROM AUTHOR]

The electromagnetic repulsion model of 400 V/630 A/12.5 kA fast vacuum transfer switch (FVTS) is established using finite element method. The speed and characteristics of the contact bounce of the FVTS are taken as constraints, and the objective is to keep the reliable opening of the mechanism with allowable bounce. The deceleration of the fast operating mechanism in the process of opening and closing is realized by applying the reverse electromagnetic repulsion force. Moreover, the simulation results demonstrate that the electromagnetic buffer effect is available, and the allowable bounce opening of the operating mechanism has been obtained. Furthermore, this paper compares the buffering effects of three kinds of conditions, such as no electromagnetic buffering, 110 V electromagnetic buffering and 220 V electromagnetic buffering. It can be found that the electromagnetic buffering is a necessary part of the 400 V FVTS, and the dynamic characteristics are the optimal scheme when the 220 V electromagnetic buffering is applied. Based on the results of simulation, a FVTS experimental prototype is developed to prove the effectiveness of the design scheme. [ABSTRACT FROM AUTHOR]

Microgrids with multiple converters suffer from excessive pressure on the communication network during traditional voltage and frequency regulation control. This paper proposed an event-triggered control strategy based superconducting magnetic energy storage (SMES) scheme to improve AC microgrids stability under successive disconnection of sources or step change of loads. By designing an event-triggered mechanism, each converter in the microgrid sends its own information to SMES in a non-periodic way. Then the control method of bus voltage and frequency regulation using SMES is constructed, which enables SMES to update its control mode. The microgrid model is established in PSCAD/EMTDC, and two cases of extreme conditions are conducted to demonstrate the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

X-ray computed tomography (CT) uses different filter kernels to highlight different structures. Since the raw sinogram data is usually removed after the reconstruction, in case there is additional need for other types of kernel images that were not previously generated, the patient may need to be scanned again. Accordingly, there exists increasing demand for post-hoc image domain conversion from one kernel to another without sacrificing the image quality. In this paper, we propose a novel unsupervised continuous kernel conversion method using cycle-consistent generative adversarial network (cycleGAN) with adaptive instance normalization (AdaIN). Even without paired training data, not only can our network translate the images between two different kernels, but it can also convert images along the interpolation path between the two kernel domains. We also show that the quality of generated images can be further improved if intermediate kernel domain images are available. Experimental results confirm that our method not only enables accurate kernel conversion that is comparable to supervised learning methods, but also generates intermediate kernel images in the unseen domain that are useful for hypopharyngeal cancer diagnosis. [ABSTRACT FROM AUTHOR]

Although the logically-centralized perspective is offered in Software-Defined Networking (SDN), the data plane is still distributed. Update commands sent by the centralized controller are executed asynchronously and independently in each switch. The timed SDN enables synchronous and coordinated update operations as each update command can be triggered by a pre-defined timestamp. Prior work on timed update mainly focuses on producing a congestion-free update sequence, whereas finding a congestion-free timed update sequence may prolong the update time. Even worse, such an update order may not exist. In this paper, we propose Chronus+, a novel timed update system that utilizes the switch buffer to shorten the update time while minimizing the switch buffer during updates. First, we formulate the Minimum Switch Buffer Problem (MSBP) as an integer linear programming and show its hardness. Then, we propose a set of efficient algorithms to solve the problem in polynomial time. Extensive evaluations in Mininet and large-scale simulations show that Chronus+ can reduce the update time by at least 17% and the switch buffer size by at least 27% compared with state-of-the-art approaches. [ABSTRACT FROM AUTHOR]

Identifying the location of partial discharges (PDs) and providing clear information on insulation vulnerabilities in power systems can help utility companies to improve their maintenance efficiency. This paper presents a PD monitoring and locating system for medium-voltage switchgears using a set of transient earth voltage (TEV) detectors. A time-of-flight methodology was used to identify the switchgear affected by PD among a row of switchgears. A time sharing access mechanism, which was implemented by multiple high-frequency surface mounting relays integrated into each TEV detector, was applied to automatically identify the site of PD and minimize the number of expensive high-speed acquisition cards. The operation principle and implementation of the modular system were formulated, and the efficiency of the proposed system in identifying the switchgear with PD among three 10 kV metal-clad switchgears was confirmed experimentally. [ABSTRACT FROM AUTHOR]

Medium voltage direct current (MVDC) power systems are in their early phase of development, but the lack of efficient and reliable DC circuit breakers is currently one of the most significant bottlenecks for widespread adoption of MVDC applications. Compared to protection devices in high voltage direct current (HVDC) systems, MVDC circuit breakers are expected to interrupt fault currents with higher rates of rise in more power-dense and more controllable structures. A hybrid approach with a piezoelectrically actuated fast mechanical switch in parallel to a solid-state circuit breaker is expected to meet the above requirements. A prototype of a 15 kV-class piezoelectrically actuated fast mechanical switch is presented in this paper. The prototype demonstrates an actuator opening time of 1 ms, a breakdown voltage of over 20 kV, and a continuous current rating of 500 A. After integrating the fast mechanical switch into a hybrid circuit breaker testbed, the fast mechanical switch was able to open within 1.5 ms and the fault was cleared within 5 ms. Therefore, piezoelectrically actuated fast mechanical switches can enable fast, reliable and controllable protection for various MVDC systems like electric ships, electric aircraft and microgrids that integrate distributed energy resources. [ABSTRACT FROM AUTHOR]

360-degree video streaming shows great potential to revolutionize the streaming market, by providing much better immersive experience than standard video streams. However, its wide adoption is hindered by the surging demand of network bandwidth due to multi-screen video transmission. To reduce the bandwidth cost, one promising approach is to predict a user’s field of view (FoV), and then prefetch video tiles that a user will view a few seconds ahead. The challenge lies in that user behaviors cannot be properly captured with very limited information, especially the viewing time spent on each tile and the FoV switching behavior are hard to predict. In this paper, we propose a novel 360-degree video streaming algorithm called TVG-Streaming to optimize user experiences by learning user view behaviors. Different from previous approaches, our idea is to exploit tile-view graphs (TVGs) generated by real user behaviors and accurately estimate the probability that each tile falls in the FoV. With the tile view probability, we can determine the bitrate of each tile for delivery and buffering with limited bandwidth budget so as to maximize users’ quality of experience (QoE). For evaluation, we conduct extensive experiments using real traces and the results show that our proposed TVG-Streaming algorithm significantly outperforms other algorithms by at least 20% improvement in terms of users’ QoE. [ABSTRACT FROM AUTHOR]

Well-annotated training samples show necessity in achieving high performance of object detection, but collection of massive samples is extremely laborious and costly. Recently, cut-paste based methods show the potential to augment the training samples by cutting the foreground instances and pasting them on some background regions. However, existing cut-paste based methods hardly guarantee the quality of synthetic images due to lack of mechanism to ensure rationality of the pasted instances (e.g., context, geometry and diversity), limiting the effectiveness of data augmentation. To overcome above issues, this paper proposes a novel Constrained Online Cut-Paste (COCP) method, making an attempt to effectively and efficiently augment training data for improving performance of object detection. Specifically, our COCP generates synthetic images by switching instances of same class from various image pairs in each training mini-batch, ensuring context coherence between the cut instances and the pasted backgrounds. Furthermore, two constraints based on geometric consistency and sample diversity are developed to eliminate counterproductive and meaningless switched instances those suffer from significant geometric discrepancy or lack variations, further improving quality of the synthetic images. The experiments are conducted on both MS COCO and PASCAL VOC datasets using various state-of-the-art detectors (e.g., Faster R-CNN, RetinaNet, FCOS and Mask R-CNN). The results show that our proposed COCP can be well generalized to various datasets and detectors with clear performance gains, while performing favorably against its counterparts. [ABSTRACT FROM AUTHOR]

In this paper, we propose a topology-cognizant optimal power flow (OPF) paradigm with additional safety constraints for multi-terminal direct current (MTDC) grids. The resulting formulation is concerned with the optimization of controller set-points, i.e., voltage and power levels at each bus, and the switching status of transmission lines that collectively referred to as grid topology. A pair of additional safety constraints are integrated into the problem formulation to prevent voltage violations caused by power fluctuations in between two controller set-point updates. Searching for a grid topology that offers more efficient operation leads to a mixed-integer nonlinear program (MINLP) which is computationally challenging due to: i) Non-convex power flow equations, (ii) Non-convex converter loss equations, and iii) Binary variables accounting for the operational status of transmission lines. Non-convexities of power flows and converter loss equations are tackled by means of a mixed-integer second-order cone programming (MISOCP) relaxation, while the optimal switching status of transmission lines are determined via a branch-and-bound search. Numerical results for the modified IEEE 14, 30, and 57-bus systems are used to verify the merits of the proposed method. Furthermore, this method is experimentally validated using the CIGRE B4 DC grid benchmark in a real-time hardware-in-the-loop platform. [ABSTRACT FROM AUTHOR]

In this paper, a methodology to solve the optimal reactive power dispatch (ORPD) in electric power systems (EPS), considering discrete controllers, is proposed. Discrete controllers, such as the tap position of on-load tap changing (OLTC) transformers and switchable reactive shunt compensation, are optimized by the proposed method. A semidefinite relaxation (SDR) of the ORPD problem and a branch-and-bound (B&B) algorithm have been fully deployed. A new formulation is presented for the OLTC transformers to obtain a connected structure of the semidefinite programming (SDP) matrices. The customized B&B algorithm deals with the discrete nature of the binary control variables. Moreover, in order to enhance the convexification, valid inequalities called lifted nonlinear cuts (NLC) are implemented in the SDR. Additionally, a chordal decomposition technique is used to improve the computational performance. Finally, the B&B algorithm is used to solve the mixed-integer semidefinite programming problem. Several benchmarks have been used to show the accuracy and scalability of the proposed method, and convergence analysis shows that near-global optimal solutions are generated with small relaxation gaps. [ABSTRACT FROM AUTHOR]