Search

Three-level inverter has an outstanding performance and is more advantageous in the switching vector selection than two-level inverter. In particular, the neutral-point voltage unbalance and common-mode voltage (CMV) reduction of three-level inverter should be carefully regulated for the appropriate operation, both of which, however, are mutually coupled resulting that the conventional space vector modulation (SVM) scheme cannot deal with them properly. To overcome this limitation, this paper proposes an improved space vector modulation (ISVM) technique to reduce the CMV and neutral-point voltage imbalance simultaneously. The generating mechanism of neutral-point voltage oscillation is derived. Based on the analysis, the proposed ISVM method adopts four voltage vectors (large, medium, small, and zero vectors) with adjusted dwell times to eliminate the ac unbalance of the neutral-point voltage. Considering the occurrence of neutral-point voltage disturbances, the dc neutral-point unbalance voltage is controlled by selecting the P-type or N-type small vector and adjusting the dwell times of small vectors for neutral-point voltage recovery. In addition, a novel switching sequence arrangement method with the minimal number of switches transition in one switching cycles and between switching cycles is proposed to reduce the total switching loss. Theoretical analysis and verification results show that the proposed ISVM scheme can reduce the magnitude of CMV to half of value using the conventional SVM, and an accurate control of ac and dc unbalanced neutral-point voltage can be obtained. [ABSTRACT FROM AUTHOR]

SiC mosfets allow a higher frequency, lighter weight inverter over their Si counterparts for electric vehicle (EV) applications. However, using SiC-based EV traction inverters is likely to increase the shaft voltage in an ac motor drive system, which significantly affects the reliability of the system. This paper investigates the impact of high-speed switching of SiC devices and high switching frequency of SiC-based inverter on the common-mode voltage (CMV) and the shaft voltage. It is theoretically illustrated and experimentally demonstrated that the high switching frequency increases the amplitude of the shaft voltage, while the fast switching speed has limited influence on both CMV and the shaft voltage. Afterward, active zero state pulsewidth modulation (AZSPWM) and common-mode chokes are employed to mitigate the shaft voltage. The experimental results show that either the AZSPWM modulation scheme or common-mode chokes have the capability to minimize the shaft voltage. Better performance can be achieved by utilizing both techniques simultaneously. It is also observed that the high switching frequency enabled by the fast-speed SiC device is able to be helpful to the use of reduced shaft voltage technologies. [ABSTRACT FROM AUTHOR]

In this paper, a modified selective harmonic mitigation pulse amplitude modulation (SHM-PAM) is presented to be capable of canceling all triplen harmonic orders and suitable for single-phase application of five-level type of voltage source inverters. To this end, a new constraint is established for the two switching angles (α1, α2) to derive the new formula for the harmonics’ amplitude, which results in self-elimination of all triplen harmonics (e.g., 3rd, 9th, 15th, …). The fifth and seventh harmonic orders are mitigated through normal operation of the proposed SHM-PAM technique. It is also shown that the proposed technique is extendable to other multilevel voltage waveforms and a flowchart of self-elimination of all triplen harmonics has been presented. Mathematical analysis supported by experimental investigations show the desired performance of the proposed SHM-PAM algorithm on a two-cell single-phase cascaded H-bridge inverter as a typical five-level configuration in dealing with linear and nonlinear loads. Then, it is demonstrated that the maximum number of harmonic orders would be controlled with the minimum number of available angles in a low switching frequency voltage waveform. [ABSTRACT FROM AUTHOR]

Although high-frequency circulating current exists in parallel-operated inverters, it has not attracted as much attention as low-frequency circulating current, and thus has not been analyzed in detail previously. In this paper, a mathematical model and analysis are presented, which reveal the spectrum components and their changing trends of the circulating currents caused by carrier phase differences. The impact of carrier phase difference on high-frequency circulating current is also analyzed and verified. A closed-loop control scheme is proposed to suppress the switching frequency circulating current caused by carrier phase difference. In addition, the deadbeat and closed-loop control are combined to suppress the low- and high-frequency circulating currents simultaneously, to improve the overall performance of circulating current suppression. The effectiveness of the proposed scheme is verified by the simulation and experimental results acquired from a laboratory platform. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a five-level hybrid flying-capacitor (5L-HFC) inverter, of which structure stems from the conventional five-level active neutral-point-clamped (5L-ANPC) topology by dividing the dc-link stage into three series-connected capacitors. In this inverter, the voltage stress on the power switches connected to the dc link is reduced by a half compared with that of the 5L-ANPC topology, thus the lower number of equally voltage-rated power devices can be employed. Also, the power losses in the 5L-HFC inverter are more evenly distributed than in the 5L-ANPC. In order to balance the dc-link capacitor voltages, a third-order harmonic offset injection is applied. When a diode rectifier is used to supply the dc bus voltage, the balancing method is not effective if the modulation index is higher than 0.64. Thus, an auxiliary circuit is needed to support the balancing of the dc-link capacitor voltages. However, the unbalancing problem can be overcome in a full-range operation without the auxiliary circuit if the back-to-back configuration is utilized. Finally, simulation and experiment results have verified the performance of the 5L-HFC inverter with the proposed control method. [ABSTRACT FROM AUTHOR]

Owing to low cost, small size, and low weight, transformerless inverters became prominent in single-phase grid connected photovoltaic (PV) systems. Key issues pertaining to these inverters include suppression of common mode (CM) leakage current and improvement of conversion efficiency. Achieving higher efficiency in single-phase grid-connected photovoltaic systems depends on the number of stages involved in feeding power to the grid, predominantly, if the PV array voltage is less than the peak value of the grid voltage. In this paper, an integrated dc–dc converter based grid-connected transformerless PV inverter is proposed which is aimed at maintaining high efficiency, even if the PV array voltage falls below the peak value of grid voltage (efficient operation at an extended input voltage range). A modulation strategy is discussed in order to minimize the flow of CM leakage current. Further, the efficiencies of certain transformerless inverter topologies are analyzed and compared with that of the proposed topology. Detailed simulation studies are carried out in MATLAB/Simulink environment to verify the analysis. Experimental results for a scaled down laboratory prototype are included as a proof-of-concept to validate the claims. [ABSTRACT FROM AUTHOR]

This paper presents a new application of power and voltage balance control schemes for the cascaded H-bridge multilevel inverter (CHMI)-based solid-state transformer (SST) topology. To reduce load on the controller and simplify modulation algorithm, a master–slave control (MSC) strategy is designed for the dual active bridge (DAB) stage. The master controller executes all control and modulation calculations, and the slave controllers manage only device switching and protection. Due to the inherent power and dc-link voltage unbalance in cascaded H-bridge-based SST, this paper presents a compensation strategy based on three-phase dq decoupled current controller. An optimum zero-sequence component is injected in the modulation scheme so that the three-phase grid currents are balanced. Furthermore, to tightly regulate the output voltage of all the DAB modules to target value, a dynamic reference voltage method is also implemented. With this proposed control method, the three-phase grid currents and dc-link voltage in each module can be simultaneously balanced. Finally, simulation and experimental results are presented to validate the performance of the controller and its application to microgrid SST. [ABSTRACT FROM PUBLISHER]

This paper proposes a vector control strategy for independent control of two permanent-magnet synchronous motors (PMSMs) using a single four-leg inverter (4LI). An expanded two-arm modulation to obtain a balanced three-phase output voltage is described. This paper also proposes a method to compensate for the fluctuations in the neutral point voltage of two split capacitors in the dc link. The experimental results show that independent speed and position control of two PMSMs can be achieved using a single 4LI with the proposed vector control method. [ABSTRACT FROM AUTHOR]

This paper presents an optimized topology of 3-$\phi$ , multilevel inverter (MLI) configuration for five or higher level operation with reduced switch count. The proposed solution consists of two basic units (BUs) of multilevel converter and a T-structured 3-level inverter (3-LI). Both BUs are equally shared by the three phases maintaining symmetry among the phases. Moreover, for a higher level operation of the proposed MLI, the modifications required are at two BUs only and not at three legs of the inverter. It further helps in reducing the requirement of extra components for higher level operation compared to the conventional solutions. Furthermore, the topology also has the benefits of reduced switching and conduction loss. An algorithm is also devised to generate the switching pulses for the BUs and the 3-LI, using a carrier-based space vector modulation technique. Presented topology is compared with other existing topologies to prove its advantage. All the details regarding the operating modes and pulse width modulation techniques employed for the proposed system are given and supported by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

Adding the auxiliary switches to the conventional H-bridge inverter is an effective way to eliminate the leakage current for transformerless PV systems, such as H5, H6, etc. Inspired by the newly developed embedded-switch H6 topology, a novel embedded-switch inverter (ESI) is proposed in this paper for three-phase transformerless PV systems. First, the operation principle and characteristics of the proposed ESI are analyzed. Second, the common-mode model of the three-phase ESI is established, based on which the main factors that affect the leakage current are discussed. The finding reveals that the switching states with conventional modulation strategy result in high-frequency common-mode voltage, which is the source of leakage current. In order to solve the problem, a new modulation strategy is presented for ESI to eliminate the high-frequency leakage current. Finally, the time-domain simulation and the experimental tests are carried out. The results verify the effectiveness of the proposed solution. [ABSTRACT FROM AUTHOR]

Traditional model predictive control cost functions, when utilizing long prediction horizons ( $N\geq 10$) in power inverter applications, have demonstrated harmonic performances approaching that of schemes based on offline-generated optimal pulse patterns. However, long prediction horizons often prohibitively increase computational load. A different approach to maximizing harmonic performance is taken in this paper. It is shown that shaping the output voltage spectra using a simple feedback mechanism can significantly reduce the length of the required prediction horizon, facilitating a feasible computational load. When a short-horizon cost function is augmented by the feedback mechanism an excellent tradeoff between harmonic performance and switching loss is achieved, even with a prediction horizon of one. It is also shown that the feedback mechanism can be used to improve input reference tracking. Experimental verification of the proposed modulator is performed on a two-level three-phase inverter. [ABSTRACT FROM AUTHOR]

This paper presents a single-phase ac power supply circuit that based on modified voltage-fed quasi-Z-source inverter topology; it suits to the light or the heavy load and is fit for the resistive, inductive, or capacitive load. The topology, operating principle, voltage gain, control method, and its realization by DSP are described in this paper. The feasibility and rationality of the system is verified by the simulation and experimental results. [ABSTRACT FROM PUBLISHER]

Multilevel inverters are receiving more attentions nowadays as one of preferred solutions for medium- and high-power applications. As one of the most popular hybrid multilevel inverter topologies, the five-level active-neutral-point-clamped inverter (5L-ANPC) combines the features of the conventional flying-capacitor type and neutral-point-clamped (NPC) type inverter and was commercially used for industrial applications. In order to further decrease the number of active switches, this paper proposes a seven-switch 5L-ANPC (7S-5L-ANPC) topology, which employs only seven active switches and two discrete diodes. The analysis has shown a lower current rating can be selected for the seventh switch under high power factor condition, which is verified by simulation results. The modulation strategy for 7S-5L-ANPC inverter is discussed. A 1 kVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method. [ABSTRACT FROM AUTHOR]

A new concept of dual-dc-port asymmetrical multilevel inverter (DP-AMI), which is able to interface a low-voltage dc port, a high-voltage dc port, and an ac port simultaneously using only one topology, is presented in this paper. A systematic method to derive the DP-AMI is proposed. With the proposed DP-AMI, a low-voltage dc source, e.g., photovoltaic (PV) modules or battery, can directly supply power to the ac load within single-stage power conversion. Therefore, in comparison with a traditional two-stage dc/ac power conversion system, the power conversion stages are reduced and the voltage/current stress of the front-end dc/dc converter can be significantly alleviated, which can improve the overall conversion efficiency dramatically. Furthermore, by using the low-voltage dc source as a new voltage level, asymmetrical multiple voltage levels are generated by the proposed DP-AMI, which is beneficial for the reducing switching losses and the size/volume of the output filter. The topology derivation method of the DP-AMIs is presented. The operation principles, modulation schemes, and characteristics of one of the proposed DP-AMIs are analyzed in detail. A 1-kW prototype is built and tested to verify the effectiveness and advantages of the proposed method. [ABSTRACT FROM PUBLISHER]

Common-mode voltage (CMV) in voltage-source inverters (VSIs) has been well defined and is frequently referred to in the literature. While often referred to, there is no real consistency with respect to how the CMV properties of an individual modulation scheme are evaluated, lacking tools to assess the relative merits or disadvantages of a certain topology or modification of a control scheme. The way that it is analyzed is still mostly a matter of the different authors' foci. In this paper, we propose a metric for the analysis of the CMV, aiming to fill the aforementioned gap. Thereby, the CMV in VSIs is quantified by the number of possible levels and the step sizes between different levels, as well as the respective frequencies of occurrence. The first two are given by the number of levels and the number of phases of the inverter. Depending on the modulation (control) schemes, all possibly available levels or a few of these levels are present in the CMV. We illustrate the use of the tool by applying it to thoroughly study the CMV properties intrinsic to the topologies of multilevel multiphase single- as well as double-ended diode-clamped VSI drive systems. As part of this analysis, we uncover new relationships concerning the existence of zero CMV level. Furthermore, we exemplarily apply the developed tool to the assessment of the CMV properties of selected pulse width modulation (PWM) control schemes and translate the findings into an interpretation of the endangerment of a given drive to suffer damage from inverter-induced bearing currents. The theoretical findings are supported by measurements. This paper also reviews the literature on CMV in multilevel multiphase VSI systems. With the proposed metric in mind, the CMV being mostly discussed as an element of different foci becomes even clearer, confirming again the need for the development of such a tool. [ABSTRACT FROM AUTHOR]

This paper describes novel single-phase solutions with increased inverter voltage levels derived by means of a nonstandard inverter configuration and impedance source networks. Operation principles based on special modulation techniques are presented. Detailed component design guidelines along with simulation and experimental verification are also provided. Possible application fields are discussed, as well as advantages and disadvantages. Finally, future studies are addressed for the new solutions. [ABSTRACT FROM PUBLISHER]

The acceleration grid power supply (AGPS) is an important part of the neutral beam injector (NBI) system. With the increase in NBI power, the requirement for output voltage of the AGPS is becoming higher and higher, even reaching to 1000 kV. As the inverter-type high voltage power supply uses inverters located at the lower voltage side to regulate and cut off the output voltage, it is very suitable for high-voltage applications. The proposed scheme for the AGPS of the International Thermonuclear Experimental Reactor (ITER) NBI system comprises five stages, where each stage has an inverter-type power supply with an output voltage of 200 kV. This paper investigates the inverter-type power supply based on neutral point clamped three-phase three-level (TPTL) inverter and three-phase step-up transformer, which is equivalent to an insulated TPTL dc–dc converter connected with a dual dc link. In order to design a preferable controller for the inverter-type power supply, the topology and principles of the TPTL dc–dc converter with duty cycle modulation have been analyzed. It indicates that only when the converter operates at a large duty cycle, the output voltage ripple can be limited to ±5%. Hence, the small signal model of the converter at a duty cycle larger than 2/3 is established. Following the mathematical model, a single-loop PID controller has been designed and a 400 V/6 A prototype has been built. Simulation and experimental results verify the correctness of the theoretical analysis. The system achieves a lower output voltage ripple and fast dynamic response. [ABSTRACT FROM AUTHOR]

The conventional current-source inverter has two major problems: unidirectional power flow and voltage boost operation, which make it impossible to be used in many applications, such as hybrid electric vehicles and general-purpose variable-speed motor drives. Z-source inverters (ZSIs) can solve both problems. Quasi-ZSIs (qZSIs) were recently proposed as an important improvement to traditional ZSIs. Besides the advantages inherited from ZSIs, qZSIs also have several of their own merits. This paper presents a comprehensive study on the new features of current-fed qZSI, including the advantageous buck–boost function, improved reliability, reduced passive component ratings, and unique regeneration capability. The current-fed qZSIs are bidirectional with an additional diode, unlike the voltage-fed ZSI that needs a switch to achieve bidirectional power flow. A modified space vector pulse-width-modulation method is proposed, and the available operating regions for motoring and regeneration operation are analyzed in this paper. Since the current-fed qZSI has the same operation as the current-fed ZSI, many results of this paper are also applicable to the current-fed ZSI. A reverse-blocking insulated-gate bipolar-transistor-based current-fed qZSI prototype was developed in the laboratory. Simulation and experimental results are shown to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

When the faulty cells of a nonregenerative cascaded H-bridge inverter are bypassed, it is necessary to inject a zero-sequence voltage into the inverter phase voltages so as to achieve the maximum balanced line-to-line voltage. However, the injected zero-sequence voltage may lead to a back flow of real power (BFRP) in at least one phase so that the dc voltage will rise to an intolerable level. To solve the problem, this paper proposes a new method of generating zero-sequence voltages. This method can not only maximize the available output voltage but also suppress the BFRP effectively. The zero-sequence voltage is always limited to an appropriate range to achieve the maximum output voltage through linear modulation. Closed-loop control is used to minimize the fundamental component of the zero-sequence voltage so that the power is less likely to flow back. Compared with the conventional methods, the proposed method allows the inverter to drive a load with a lower power factor not inducing BFRP or degrading the output voltage capability. As a result, the probability of overvoltage on the dc side is reduced. The experimental results show that the proposed method is effective and feasible. [ABSTRACT FROM AUTHOR]

The two common three-leg, two-level voltage source inverters of a six-phase drive are able to produce 64 different switching states, representable as voltage space vectors in two orthogonal subspaces. The discrete output voltage of the inverter legs is usually controlled by means of a space vector modulation (SVM) technique, the aim of which is to produce the same volt-seconds as the continuous reference voltage vectors in both subspaces within a certain time frame (switching cycle). Using a simplified phase model of the machine consisting in each subspace of a voltage source and a leakage inductance, the phase currents are found to exhibit unwanted distortion harmonics. A proper sequence of voltage vectors has to be applied in order to reduce these harmonics. By allowing each inverter leg to change its output twice during the switching cycle (continuous modulation), 518400 different space vector sequences can be generated. This paper demonstrates that, among these sequences, only 11 need to be considered to modulate the reference vectors. Further simulation shows that, for a certain pair of reference vectors and leakage inductance ratio, only one of them reduces the distortion to a minimum. Due to the high computational effort, however, this optimization problem is not solvable online. To overcome this drawback, four different modulation strategies, the standard three-phase SVM, the fragmented sector mapping, the optimal interleaved and the approximated interleaved SVM, are derived from and compared with an offline optimization. Each strategy is evaluated regarding the resulting current distortion and the influence of the reference vectors as well as the inductance ratio. The harmonic current of these online modulation strategies is calculated in simulation and validated by experiments. Applying the proposed modulation techniques leads to a great reduction in the machine losses caused by switching. [ABSTRACT FROM AUTHOR]

This paper proposes a new topology for an enhanced-boost Z-source inverter (ZSI) with combined two Z-impedance networks. By two Z-impedance networks and low shoot-through duty cycle, the proposed inverter produces high output voltage gain. In traditional ZSIs for high boosting voltage, a low modulation index is required; hence, under these conditions, the output voltage will have low quality with high total harmonic distortion. Compared with the conventional high-boost ZSI topologies, the proposed inverter uses shorter shoot-through duration and a larger modulation index to improve the output waveform quality. Comparison between the proposed topology and previously proposed schemes, in terms of inductor numbers, voltage and current stresses on elements, sizes of inductors and capacitors, efficiency, and switching device product (SDP) factors of diodes, is made, and the results verify the priority of the proposed topology. The operating principle of the proposed topology is analyzed in detail. Both simulation and experimental results verify the high performance of the proposed inverter. [ABSTRACT FROM PUBLISHER]

In this paper, three overmodulation techniques for the three-to-five-phase indirect matrix converter (IMC) are proposed. The first technique utilizes only the adjacent large vectors in the sector in which the reference output voltage vector lies. The second technique improves on that by continuously adapting vector elimination in the d_2-q_2 vector space based on the output voltage requirements. The third technique utilizes the ripple in the dc link to further reduce the modulation index of the inverter stage during overmodulation. All three techniques increase the voltage transfer ratio of the three-to-five-phase IMC from 0.788 to 0.923, but with the addition of harmonics generated by a vector in the d_2-q_2 vector space of the inverter stage. Simulation and experimental results from a prototype three-to-five-phase IMC validate the three proposed overmodulation techniques. [ABSTRACT FROM AUTHOR]

This paper proposes a new topology named the active-switched-capacitor/switched-inductor quasi-Z -source inverter (ASC/SL-qZSI), which is based on a traditional qZSI topology. Compared to other qZSI-based topologies under the same operating conditions, the proposed ASC/SL-qZSI provides higher boost ability, requires fewer passive components such as inductors and capacitors, and achieves lower voltage stress across the switching devices of the main inverter. Another advantage of the topology is its expandability. If a higher boosting rate is required, additional cells can easily be cascaded at the impedance network by adding one inductor and three diodes. Both the simulation studies and the experimental results obtained from a prototype built in the laboratory validate proper operation and performance of the proposed ASC/SL-qZSI. [ABSTRACT FROM AUTHOR]

The quasi-Z-source cascaded multilevel inverter (qZS-CMI) presented many advantages over conventional CMI when applied in photovoltaic (PV) power systems. For example, qZS-CMI provides the balanced dc-link voltage and voltage boost ability, saves one-third modules, etc. However, current research studies only disclosed control of single-phase qZS-CMI-based PV power systems, and there was no literature related to control of three-phase qZS-CMI-based PV power systems. In this paper, for the first time, three-phase qZS-CMI's control is proposed and demonstrated for application to PV power systems. The models of PV-panel-fed qZS H-bridge module and qZS-CMI-based PV power system are built to accurately design control algorithms for each module and the whole system. The proposed control method includes the distributed maximum power point tracking for each module, dc-link peak voltage balance control for all modules, and grid-tie control for the whole system; moreover, a new multilevel space vector modulation method is proposed for the three-phase qZS-CMI. Simulation and experimental results on a test bench with a three-phase seven-level qZS-CMI-based PV power system verify the proposed control and modulation methods. [ABSTRACT FROM PUBLISHER]

This paper presents a novel direct current-fed interleaved phase-modulated single-phase unfolding inverter for fuel-cell applications. Two active-clamped zero-voltage switching current-fed half-bridge isolated converters are interleaved in parallel input and series output configuration. Phase modulation is proposed to control these two converter cells, which generate a rectified sinusoidal pattern at the dc link. A simple H-bridge unfolding dc–ac inversion is used to produce single-phase sine voltage at line frequency switching using square-wave control. This not only simplifies the inversion stage in terms of modulation but also reduces the switching losses. Direct front-end current-fed based unfolding inverter is not reported in literature yet. Detailed analysis and design of the proposed direct current-fed single-phase unfolding inverter has been presented. Simulation waveforms using PSIM 9.0.4 are given to verify the presented analysis and design. Experimental results on a laboratory prototype rated at 200 W are demonstrated to support the investigation, to validate the accuracy of the proposed analysis and design, and to test the performance. [ABSTRACT FROM PUBLISHER]

Common-mode voltages (CMVs) can lead to premature failure of the motor insulation system in medium-voltage current-source-fed drives. By analyzing the CMV values at all switching states under different operating conditions of a current-source-inverter (CSI)-based motor drive, this paper first indicates that the CMV peaks are produced by the zero states in most of the cases. The nonzero-state (NZS) modulation techniques employed in voltage-source converters are adapted for use in a space-vector-modulated current-source converter (CSC) to reduce the CMV magnitude. For NZS modulation in CSCs, the nearest three-state (NTS) modulation sequences are designed with good low-order harmonic performances in their linear modulation region of m _a ≥ 0.67 and with no increase in the device switching frequency. A combined active-zero-state (AZS) modulation technique is also proposed as compensation, for a lower modulation index in the range of 0.4–0.67, when a compromise is made between the dc-link current minimization and high input power factor control. The simulation and experimental results are provided to validate the CMV reduction effects and harmonic performances of the NTS and combined AZS modulation methods in CSI-fed drives. [ABSTRACT FROM AUTHOR]

Operating a dual three-level inverter system from a single dc link circuit is an economic solution for generating five-level output voltage waveforms and to double the output power compared to a single three-level inverter. Such an inverter system is used for feeding a drive motor with open stator windings. A mechanism is then required to reduce the common-mode voltage components of the motor voltages. This paper describes an offline optimization method that minimizes both the harmonic distortion of the motor currents and the common-mode voltage components. The optimization permits reduction of the switching frequency to a very low value of 200 Hz without compromising the harmonic distortion. High performance operation of the drive system at low switching frequency is experimentally demonstrated. [ABSTRACT FROM PUBLISHER]

In this paper, a novel single-phase five-level inverter is proposed using coupled inductors. This inverter can output five-level voltage with only one dc source. No split of the dc voltage capacitor is needed, totally avoiding the voltage balancing problem in conventional multilevel inverters. The level of the output voltage is only half of the dc-link voltage in all conditions, leading to much reduced dv/dt . This inverter is based on the widely used three-arm power module and the voltage stresses on all the power switches are the same, making it very easy to construct. Operation mechanism of this inverter is analyzed and the possible switching patterns are investigated. Based on these analyses, a novel optimized modulation scheme is presented. With this modulation method, no dc components exist in the inductor currents, which is very helpful for minimization of the inductors. Simulation and experimental results show the validity of the proposed inverter together with the optimized modulation scheme. [ABSTRACT FROM AUTHOR]

This paper presents an optimal control scheme for a multilevel inverter working for audio power amplification. The proposed control scheme comprises two loops of feedback around a sliding-mode quantizer. The double-loop feedback generates a continuous equivalent control signal, while the quantizer that operates in the sliding mode converts the equivalent control signal into a staircase voltage waveform used to drive a loudspeaker through an LC filter for audio signal tracking. The control scheme is optimized to reduce the frequency weighted tracking error and the equivalent control signal simultaneously, compromising between a satisfactory performance and a wide stable input range. With the proposed design, a nine-level class-D audio amplifier is built and tested, which exhibits high-robustness and high-quality audio reproduction. [ABSTRACT FROM AUTHOR]

There is a strong trend in the photovoltaic inverter technology to use transformerless topologies in order to acquire higher efficiencies combining with very low ground leakage current. In this paper, a new topology, based on the H-bridge with a new ac bypass circuit consisting of a diode rectifier and a switch with clamping to the dc midpoint, is proposed. The topology is simulated and experimentally validated, and a comparison with other existing topologies is performed. High conversion efficiency and low leakage current are demonstrated. [ABSTRACT FROM AUTHOR]

A novel H-bridge multilevel pulsewidth modulation converter topology based on a series connection of a high-voltage diode-clamped inverter and a low-voltage conventional inverter is proposed in this paper. A dc link voltage arrangement for the new hybrid and asymmetric solution is presented to have a maximum number of output voltage levels by preserving the adjacent switching vectors between voltage levels. Hence, a 15-level hybrid converter can be attained with a minimum number of power components. A comparative study has been carried out to present high performance of the proposed configuration to approach a very low total harmonic distortion of voltage and current, which leads to the possible elimination of the output filter. Regarding the proposed configuration, a new cascade inverter is verified by cascading an asymmetrical diode-clamped inverter, in which 19 levels can be synthesized in output voltage with the same number of components. To balance the dc link capacitor voltages for the maximum output voltage resolution as well as synthesize asymmetrical dc link combination, a new multi-output boost converter is utilized at the dc link voltage of a seven-level H-bridge diode-clamped inverter. Simulation and hardware results based on different modulations are presented to confirm the validity of the proposed approach to achieve a high-quality output voltage. [ABSTRACT FROM PUBLISHER]

The output voltage quality of some of the single-phase multilevel inverters can be improved when their dc-link voltages are regulated asymmetrically. Symmetrical and asymmetrical multilevel diode-clamped inverters have the problem of dc-link capacitor voltage balancing, especially when power factor of the load is close to unity. In this paper, a new single-inductor multi-output dc/dc converter is proposed that can control the dc-link voltages of a single-phase diode-clamped inverter asymmetrically to achieve voltage quality enhancement. The circuit of the presented converter is explained and the main equations are developed. A control strategy is proposed and explained in details. To validate the versatility of the proposed combination of the suggested dc–dc converter and the asymmetrical four-level diode-clamped inverter (ADCI), simulations and experiments have been directed. It is concluded that the proposed combination of introduced multioutput dc–dc converter and single-phase ADCI is a good candidate for power conversion in residential photovoltaic (PV) utilization. [ABSTRACT FROM PUBLISHER]