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This paper presents a different Finite Control Set – Model Predictive Control (FCS-MPC) for grid-connected three-phase bidirectional power inverters. These are typically used in dc or ac renewable-based microgrids (MGs), where bidirectional operation and fast dynamic response is required. The bidirectional grid-connected inverters are an essential part of MG, which inject energy into the ac grid or demand energy from it. The dynamic behavior of the system is a major concern since the current can suddenly change depending on the hierarchical controller. This paper proposes a different cost function using sliding mode theory, which offers a good dynamic response, reduced computational burden, and a parameter-free control model. The operation principle of the proposed controller is given and evaluated using a Hardware-In-the-Loop (HIL) system, but also experimentally with a 1kW laboratory prototype. The final results demonstrate the advantages of using this approach in grid-connected three-phase bidirectional power inverters in terms of dynamic response and reduced computational burden, making this solution technically attractive and viable. [ABSTRACT FROM AUTHOR]

The supply-side current of an inverter-fed induction motor (IM) is easily accessible and less affected by noises than the motor stator current. This paper proposes a novel sensorless speed estimation method for an IM using the spectrum of the supply-side current. However, due to the influence of fundamental supply frequency, it is difficult to carry out the speed detection straight from the supply-side current signal. In this paper, an analytic model for characterizing the supply-side current of an inverter-fed IM using the modulation theory and the switching function concept is developed. Then, the Hilbert transform is applied to extract the speed harmonic component from the supply-side current. Finally, an interpolated Goertzel algorithm is put forward to enhance the estimation precision of IM speed. The performance of the proposed sensorless speed estimation method is proved by the speed estimation results obtained from hardware experiments of an IM fed by an inverter under different load conditions. [ABSTRACT FROM AUTHOR]

Motors and inverters are increasingly being used in vehicles. As more vehicle components are being adopted, requirement for safety and installation space are increasing. Growing attention is being paid to the use of six-phase permanent magnet synchronous motors (PMSMs) and their parallel control by two inverters, because of their reduced size and enhanced safety. This paper proposes a pulsewidth modulation (PWM) control algorithm for a six-phase PMSM. In low-voltage vehicle components such as electric power steering, the current is usually acquired with resistors placed under the low-side switching devices. In the proposed control algorithm, the neutral voltage of the two inverters is shifted to either a lower or higher voltage within a certain range to allow for the signal conditioning time delay after the switching device turns on or off, and the time taken for the phase current to rise or settle. The paper proposes a novel PWM control algorithm that ensures that the on-time of the low-side switching devices satisfies the restriction on current sensing with resistors and reduces the current in the capacitor at the same time. The work contributes to reducing the current in a practical configuration involving low-voltage vehicle components. [ABSTRACT FROM AUTHOR]

Enhancement of dc bus voltage utilization for a five-level inverter with single dc source and capacitor-fed H-bridge (CHB) units is investigated in this paper. A carrier-based modulation technique is used for boosting the dc bus utilization, which is established by providing detailed mathematical analysis. The five-level inverter used here is realized by cascading a CHB unit to each phase of a three-level neutral point clamped inverter. The increase in dc bus voltage utilization owes to the pole voltage redundancies offered by CHB units. The floating capacitors of H-bridge units are balanced within a quarter fundamental cycle using the switching state redundancies of pole voltage levels. The aforementioned modulation technique allows the inverter to enhance the dc bus utilization from 0.577 $\text{V}_{\text{dc}}$ to 0.63 $\text{V}_{\text{dc}}$ under unity power factor. This enhancement is obtained in the linear modulation range without increasing the dc bus voltage, and thus, the inverter can operate without the presence of low-order harmonics in its phase voltages. The strength of this paper lies in its detailed mathematical analysis for finding out the limiting modulation index and power factor condition in the light of floating capacitor voltage balancing issue. Simulation as well as experimental verification of the modulation scheme is carried out on an induction motor drive under various operating conditions. It is shown that this carrier-based modulation technique is suitable for any single source inverter topology with one CHB unit per phase. [ABSTRACT FROM AUTHOR]

This paper proposes a novel method for instantaneous balancing of neutral-point (NP) voltages with stacked multilevel inverters (MLIs) for variable-speed drives. The stacked MLI uses series-connected dc sources and NPs (connecting points of dc sources) to obtain the desired levels. The balancing of NP voltages are obtained by using a low-voltage-capacitor-fed cascaded H-bridge (CHB) per phase of a symmetrical six-phase induction machine (IM), which ensures zero current drawn from NPs (at any given instant). Since no current is drawn from NPs, the single dc-link operation with stacked capacitors is also possible. The scheme is suitable for applications, where low-voltage dc sources and batteries are stacked to form a dc link. A variable-speed operation is done using a seven-level inverter scheme for a symmetrical six-phase IM, which is formed by three dc-link stacked capacitors cascaded with two low-voltage-capacitor-fed CHBs per phase. Furthermore, the method is extended for an open-end IM to obtain a seven-level common-mode eliminated space vector structure using a single dc link. The generalization of this method for any stacked $n$ -level inverter without NP voltage deviation is also presented in this paper. The experimental results and analysis are included to validate the proposed method. [ABSTRACT FROM AUTHOR]

Soft magnetic powder cores with their high saturation flux density and low core loss are excellent alternatives for filter inductors in inverter-based applications. However, their nonlinear current-dependent inductance characteristics pose a challenge for control of grid-connected inverter with LCL filter. In this paper, the variable inductance conundrum is discussed and a modified direct digital control method based on a variable-structure inductance estimation model that takes into consideration wide nonlinear variation in both inverter- and grid-side inductances is proposed. The proposed method is shown to have better grid-voltage harmonic rejection and improved stability margins. However, investigation of stability which is conventionally based on nominal values of filter inductors cannot predict instabilities over the entire range of inductance variation. Hence, a parametric approach to conventional stability methods with a parameter space defined by variation in actual and estimated inductance is explored in this paper. The effect of line impedance on stability is also investigated with impedance-based stability criterion by considering line inductance as an additional dimension in the parameter space. A pattern in stability margins is observed due to inductance variation, with inductance at its minimum being most vulnerable to instability. Experimental results measured from a 5 kW single-phase grid-connected inverter with various LCL filters have verified the feasibility of the proposed control method. The experimental results also match the analytical results with reasonable accuracy. [ABSTRACT FROM AUTHOR]

This paper proposes a new dc–ac converter with a reduced number of semiconductor switches and gate drive and control circuit components. A salient feature of this inverter is its pure sinusoidal line-to-line voltages with no need for output filter. Also, the proposed inverter improves the voltage utilization factor of the input dc supply compared to the four-switch three-phase inverter (first best topology in the literature from the number of switches point of view) and standard six-switch inverter with sine pulsewidth modulation. The proposed inverter is capable of operating with a wide range of output voltages from zero to the full value of the dc input voltage by appropriately altering the instantaneous duty cycle. A three-phase universal inverter with only three power switch has been proposed in this paper for the first time ever, to our knowledge. For the purpose of providing a good compromise between fast transient response and stability, a model predictive controller is proposed. All the design expressions have been derived. A comparison with other dc–ac converters is given to show the merits of the proposed converter. Finally, satisfactory circuit operation is confirmed by experimental results from a laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper proposes a high-efficiency single-phase T-type boundary conduction mode (BCM) microinverter. The conventional full-bridge BCM microinverter has achieved zero voltage switching (ZVS) and thereby improved the efficiency, but it suffers from high switching losses under light load conditions. The proposed T-type BCM microinverter reserves ZVS and uses a multilevel technique to further decrease the switching losses. The BCM operation with multilevel technique will have too low switching frequency when the grid voltage approaches half of the dc link voltage. To solve this problem, this paper adopts a third operation mode for the T-type switching leg to maintain the switching frequency above a minimum value. The corresponding mode transitions are also detailed to ensure a smooth operation. Because of the turn-offdelay of the freewheeling transistor, the actual lower current boundary deviates from the programmed one, which will distort output current. To address this issue, this paper also proposes a boundary compensation method. A prototype has been built for performance verification, which can test both full-bridge and T-type topology. Compared with the full-bridge BCM microinverter, the proposed T-type BCM microinverter has a higher efficiency over the whole load range. [ABSTRACT FROM AUTHOR]

This paper presents the digital implementation of a boundary controller with unipolar switching characteristic for single-phase voltage source full-bridge inverters. This paper expands the application of a second-order switching surface-based control method to unipolar switching of single-phase voltage source inverters (VSIs) using a finite-state machine. The finite-state machine has been formulated considering four different states of the inverter; positive,zero1, negative, andzero2. The second-order boundary control governs the current state of the system and provides proper switching action to keep the system within the desired reference. The control law is implemented digitally in F28m35x digital control card. A full-bridge inverter topology is used to achieve the three-level voltage switching. Various simulations and experiments were performed in a 550 VA, 120 V, 60 Hz VSI with a digitally implemented controller to verify the theoretical predictions. A high-quality voltage output was obtained for various loading conditions. The transient performance of the controller was investigated using a reference and load changes. A comparison of the implementation was made with the existing classical controllers to verify the fast-dynamic response of the system. [ABSTRACT FROM AUTHOR]

This paper proposes a novel discontinuous pulse-width modulation (DPWM) method to reduce the current harmonics and improve the system efficiency for a single-phase three-level neutral-point clamped inverter. In single-phase inverters, the unipolar pulse-width modulation (UP-PWM) method is commonly used. However, this method has the disadvantage of power losses due to numerous switching operations. Conventional DPWM methods reduce the power losses and improve efficiency but increase the current total harmonic distortion (THD). To overcome these weaknesses, this paper proposes a hybrid DPWM switching method combining two PWM methods: the UP-PWM method and the conventional DPWM method called one-pole clamped PWM method. Since the proposed DPWM method offers all the advantages of both PWM methods, the optimal performance—with regard to the power losses and current THD—is obtained. The combination of two PWM methods is investigated by analyzing the power losses and current THD. Based on the analysis, the process determining the optimal operating condition is introduced. The effectiveness of the proposed DPWM method is demonstrated through simulations and experiments. [ABSTRACT FROM AUTHOR]

This paper proposes a new high-efficiency photovoltaic (PV) converter for grid connection through a high-leg delta transformer. The converter is composed of a symmetrically connected boost converter and three half-bridge inverters. One of the three half-bridge inverters is connected to the boost converter, and the others are directly connected to the PV terminals. As a result, this circuit configuration enables to reduce the power losses in both boost converter and inverters. This paper also proposes a new cooperative control method between the symmetrically connected boost converter and inverter. The control method can reduce the average switching frequency to 75% of that in a conventional one, resulting in a great reduction in the switching power loss. Experimental results confirm that the proposed circuit configuration makes it possible to improve its European efficiency from 91.6% to 94.5%. Moreover, system performance is evaluated on the assumption of maximum power point tracking operation. [ABSTRACT FROM AUTHOR]

This paper presents an intelligent-based fault-tolerant system for a solar photovoltaic (PV) inverter. Artificial neural network based controller is used to monitor, detect, and diagnose the faults in solar PV panels, battery, semiconductor switches, and inverters. The cascaded multilevel inverter is connected across the combination of solar PV panel and battery for dc–ac conversion. The major advantage of the proposed topology is that it can deliver power from source to the load even under fault and partial shaded conditions. The paper also reviews on various faults in the solar PV energy conversion process and provides suitable solutions for each circumstance. Simulations are undertaken in MATLAB 2016a/Simulink and experimental investigation is carried out for a 3 kWp solar PV system. The results have proven that the system is capable to deliver power in spite of faulty environments. The comparison and discussion of the results were made to show the effectiveness of the proposed system. [ABSTRACT FROM AUTHOR]

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme. [ABSTRACT FROM AUTHOR]

This paper proposes a variable off-time control method for a single-phase microinverter operating in the discontinuous conduction mode (DCM) for efficiency improvement. First, the fixed off-time control method is analyzed. The concept is to fix the off-time of the active switch throughout a line cycle for all output powers and scale the on-time of the active switch to shape a sinusoidal output current. Then, based on the fixed off-time control method, a variable off-time control method is proposed to modulate the preset fixed off-time in order to decrease the switching frequency during ac line zero-crossings and light load conditions. Compared with existed fixed-frequency DCM control or boundary conduction mode control, the variable off-time control is more flexible to optimize the efficiency under different load conditions as the switching frequency range can be automatically adjusted according to the output power. The switching frequency is high at heavy loads to limit the maximum peak current and is low at light loads to increase the light load efficiency. In addition, a predictive on-time method is adopted to simplify inverter control and reduce hardware costs. The parameter design principle is detailed in this paper. A 300 W prototype is built to verify the performance of the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, the characteristics of ripple current of a multimegawatt drive system fed by a pulse-width modulation (PWM) inverter are investigated. Based on the investigation, a novel PWM scheme is devised to reduce the switching loss of the inverter under an identical amount of torque ripple of a motor. The proposed PWM is composed of two parts. The first is minimum torque ripple PWM (MTRPWM), which is optimized in terms of the minimum torque ripple in high modulation index (MI). The second determines the minimum switching frequency while holding the average torque ripple less than the allowable value under various operating conditions. It is termed reduced switching frequency PWM (RSFPWM). Consequently, by simply changing the PWM method from conventional fixed switching frequency continuous PWM to the proposed PWM, MTRPWM and RSFPWM, simulation results show that the switching loss of the inverter driving a 3.5 MW induction motor is reduced to 51.6% while keeping the torque ripple in the allowable boundary, where MI is 1.12. This approach is applied to small-scale experimental sets consisting of an interior permanent magnet synchronous machine (IPMSM) motor-generator set, and an induction machine MG set in an effort to verify the validity and feasibility of the proposed method. Based on these experimental results, the cost indexes of the IPMSM and the induction machine, as defined in this paper, decrease by up to 66% and 77%, respectively, when the proposed method is applied when MI is 1.12 compared with the outcome with the conventional PWM. [ABSTRACT FROM AUTHOR]

Fast-switching power converters are a key enabling technology for the more electric aircraft (MEA), but the generated electromagnetic interference (EMI) poses significant challenges to the electrification effort. To meet the stringent aerospace EMI standards, passive filters are commonly employed, despite the weight and size constraints imposed by the MEA. Alternatively, the EMI source, i.e., the high dv\text/ dt and di\text/ dt slew rates, can be addressed through waveform-shaping techniques. For example, while most soft-switching converters can reduce switching loss, they do so by switching the semiconductor devices in a slower and smoother manner, resulting in the attenuation of high-frequency harmonics. This paper examines the auxiliary commutated pole inverter (ACPI) topology, and its first contribution is the attenuation of the high-frequency content of its EMI source, that is, the output voltage, in a predictable manner, through the active control of the resonant circuit. This is achieved by first, discussing the time-domain characteristics of trapezoidal and S-shaped pulse-trains that lead to attenuated high-frequency harmonic content, and second, by analyzing the equivalent LC circuit of the ACPI. The design of the inverter is then focused on the active control of the resonant parameters, for a predetermined and enhanced output voltage high-frequency response. The second contribution of this paper is the comparison of the EMI performance of hard switching and of three soft-switching modes, fixed-timing control, variable-timing control, and capacitive turn-offs, and how this informs important metrics such as power efficiency, current stress, and implementation complexity. Finally, the third contribution is on the trade-offs that arise when the primary design goal is enhanced EMI performance as opposed to switching loss reduction. A 5-kW, 3-phase ACPI prototype is used for validating the high-frequency content attenuation at source. It is shown that the ACPI can achieve a 37 dB harmonic attenuation of its output voltage at 4 MHz, compared to a hard-switched inverter. [ABSTRACT FROM AUTHOR]

To support the development of high-frequency ac microgrids in terms of compact design, high-voltage gain and low total harmonic distortion (THD), a buck–boost dual-leg-integrated step-up inverter is proposed in this paper. The inverter is formed by integrating a buck–boost converter into a conventional single-phase full-bridge inverter by sharing the upper switch and the body diode of the lower switch in both bridge-legs. Consequently, the component count is significantly reduced over the step-up inverter counterparts. In addition, to address the drawbacks of hybrid modulation methods adopted by existing dual-leg-integrated inverters, such as double-variable control, and high THD of output voltage/current at high input voltage and heavy load conditions, unipolar frequency doubling sinusoidal pulse width modulation scheme is adopted in this inverter. As a result, the modulation ratio M becomes the only control variable to regulate the output voltage/current and the control is simplified. The THD of the proposed inverter output can remain low throughout the entire input voltage range and load power range. This paper presents the topology derivation procedure, operation principle, and steady-state characteristics of the proposed inverter. To validate the effectiveness of theory, experimental results of a 400 W hardware prototype, where the output voltage frequency is at 500 Hz, are reported. [ABSTRACT FROM PUBLISHER]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

This paper analyzes the combination in a cascaded H-bridge multilevel inverter (CHBI) based on transformers with the different turn ratios for increasing the voltage level and proposes the switching method for achieving the output voltage distribution among H-bridge cells (HBCs). The transformers used in this paper are connected to the output of the respective HBCs, and the secondary sides of all the transformers are connected in series for generating the final output voltage. Only one of the transformers, in particular, has a different turn ratio for increasing the output voltage level. In this paper, the possible turn ratio of the special transformer with a different turn ratio is discussed in detail, and a switching method based on the level-shifted switching method for the topology used in this paper is proposed. To verify the effectiveness of the proposed method, a three-phase 21-level CHBI is experimentally tested. [ABSTRACT FROM PUBLISHER]

This paper presents the tradeoff study of heat sink and output filter volume of a GaN HEMT based single-phase inverter. The selected topology is three-level active neutral point clamped (ANPC) inverter, and the main aim is to explore the benefits of the GaN HEMTs at 600 V blocking class on the system level efficiency, and power density under the wide range of operating conditions. The paper starts by introducing the inverter topology, selected pulse width modulation scheme and followed by the device features, static, and dynamic characterization and continues with presenting and discussing the results of extensive experimental and analytical characterization. After this, the impact of GaN HEMTs on inverter volume is discussed in terms of heat sink and output filter volume analysis under different switching frequency and heat sink temperature conditions. The calculation of heat sink volume and single stage LC output filter volume are presented with respect to experimental results of the single phase prototype. The findings from static, dynamic characterization, and single phase prototype results clearly show that GaN HEMT has excellent switching performance under wide load current and heat sink temperature conditions. The high performance of the inverter leads to reduction of the combined total volume, including output filter and heat sink volume. [ABSTRACT FROM AUTHOR]

This paper proposes a current-fed single-phase inverter without constant intermediate DC link. It eliminates electrolytic capacitor from the DC-link and introduces an intermediate pulsating DC bus. The proposed topology is modular with three full-bridges making it scalable for high-power applications. New pulsating-DC-modulation for back-end pulsating DC-link inverter and secondary modulation (SM) for front-end DC-to-pulsating DC converter is proposed. Soft-switching and device voltage clamping of both primary side and secondary side devices of front-end current-fed full-bridge converter is realized. A rotating partial hybrid pulsewidth modulation has been introduced. One leg of inverter is commutated at a low switching frequency, while the other leg is operated at a high switching frequency for partial period of a line frequency cycle. Thus, switching losses of the back-end inverter are considerably reduced. Rotating mechanism is used to equalize the switching losses of four switches of the inverter. This paper presents detailed operation and analysis of the topology with a proposed modulation scheme. Simulation and experimental results validate the effectiveness and accuracy of the proposed modulation scheme as well as soft-switching and performance of the converter. [ABSTRACT FROM PUBLISHER]

This paper presents a novel six-pulse low-frequency (LF) fluctuating high-voltage dc-bus-based power system architecture for fuel cell vehicles (FCVs) application. A novel hybrid modulation scheme consisting of six-pulse modulation at LF scale and modified secondary modulation and 33% pulse width modulation at high-frequency (HF) scale is proposed. Three-phase ac waveforms for the propulsion system of FCVs are generated from LF fluctuating high-voltage dc bus. The proposed modulation technique significantly reduces the switching losses of the bidirectional dual-stage inverter: 1) soft-switching of both sides of the front-end current-fed full-bridge converter is realized; and 2) at any moment, only one leg of back-end three-phase inverter is switched at HF, while the other two legs are kept in on or off states. This tremendously reduces the bidirectional inverter's switching losses and improves the system efficiency. The LF fluctuating high-voltage dc bus allows the elimination of large electrolytic dc-link capacitor, which contributes to a more reliable and compact design. This paper presents the operation, analysis, and design of a bidirectional inverter implementing the proposed hybrid modulation technique. Simulation results obtained from power electronics simulation software PSIM and experimental results from the lab prototype clearly validate the effectiveness of the proposed modulation technique. [ABSTRACT FROM PUBLISHER]

In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

This paper proposes an active switching harmonic current reduction method within the dc-link capacitor of two-level, three-phase, back-to-back converters. This method is based on the derived analytical solution for switching harmonic currents in the dc-link. It is shown that by controlling the pulse width modulation carrier waveform's phase angles, the harmonics in the second carrier band of the rectifier and the inverter can be synchronized such that cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. The feasibility of the proposed approach has been verified experimentally and results are presented in this paper. [ABSTRACT FROM PUBLISHER]

A novel hybrid pulse width modulation (PWM) technique is proposed in this paper for two parallel interleaved, two-level, three-phase voltage source inverters (VSIs). The two parallel interleaved VSIs are analyzed as a three-level (3L) inverter. A 3L inverter provides minimum line current ripple when nearest three voltage vectors are applied. In this paper, a novel carrier-based PWM technique is developed that ensures the application of nearest voltage vectors, keeping average circulating current to zero over a switching period. For carrier-based implementation of the proposed PWM, generalized common-mode (CM) offsets are derived in terms of maximum and minimum values of reference signals. Each 3L space-vector sector is divided into seven subsectors. For each subsector, a CM offset is calculated, addition of which to reference signals ensures the minimum line current ripple and zero average circulating current. Simulation and experimental results are provided to validate the proposed technique. [ABSTRACT FROM PUBLISHER]

For power converters with inductive loads, a freewheeling path is needed for the current due to reactive power. The MOSFET synchronous rectification (SR) is widely used to reduce the conduction loss during the freewheeling period. Due to the wide band gap of silicon carbide (SiC), the intrinsic body diode of SiC MOSFET exhibits a high voltage drop. Hence, an antiparallel SiC Schottky diode is normally implemented to eliminate its conduction. However, the external SiC Schottky diode is not fully utilized as it only works during the dead time. In this paper, the hard-switching SR is investigated in an SiC three-phase inverter and compared with a conventional inverter using freewheeling diode (FWD). An improved power loss model for the two inverters has been developed. It is found that the inverter using SR has higher efficiency due to the smaller switching loss. A 7-kW prototype of SiC three-phase inverter is built, which achieves a peak efficiency of 98.8% ($\pm$ 0.15%) and 98.5% ($\pm$ 0.15%) at 40 kHz using SR and FWD, respectively. This paper confirms that the SiC MOSFET is an ideal candidate for the SR. [ABSTRACT FROM PUBLISHER]

In this paper, direct torque control (DTC) of five-phase induction motor (FPIM) is implemented using three-level neutral point clamped (TL-NPC) inverter. One of the advantages of three-level inverter over two-level one for DTC operation is the low torque ripple. Also TL-NPC inverter through space vector modulation technique gives low $ dv/dt$ transition with better voltage waveform. By applying conventional lookup table for DTC, the TL-NPC inverter does not ensures lower $dv/dt$ transition. In this paper, a novel switching scheme for DTC of FPIM using TL-NPC inverter is proposed that ensures the low $ dv/dt$ transition and balancing of dc-link capacitor voltages of TL-NPC inverter. To form the lookup table for DTC operation, instead of using voltage vectors directly, virtual vectors (VVs) are utilized. Two switching states are used in one sample time to generate a VV in $\alpha \beta$ plane, which gives zero resultant voltage in $ xy$ plane. The switching strategy ensures low number of transitions to reduce the switching losses. The switching state redundancies are used in a novel way to balance the dc-link capacitor voltages without using any additional hardware. The proposed technique to balance the dc-link capacitor voltage gives lower switching frequency. The MATLAB/Simulink environment is used for the simulation and the results are validated through experiments. [ABSTRACT FROM AUTHOR]

This paper describes the modeling, analysis, and design of a complete (dc-to-dc) inductive wireless power transfer (WPT) system for industrial moving applications. The system operates at 6.78 MHz and delivers up to 150 W to a load moving along a linear path, providing a quasi-constant dc output voltage and maintaining a zero voltage switching operation, regardless of position and load, without any retuning or feedback. The inductive link consists of an array of stationary transmitting coils and a moving receiving coil whose length is optimized to achieve a constant coupling coefficient along the path. Each Tx coil is individually driven by a constant amplitude and phase sinusoidal current that is generated from a GaN-based coupled load-independent Class EF inverter. Two adjacent transmitters are activated at a given time depending on the receiver’s position; this effectively creates a virtual series connection between the two transmitting coils. The Rx coil is connected to a passive Class E rectifier that is designed to maintain a constant dc output voltage independent of its load and position. Extensive experimental results are presented to show the performance over different loading conditions and positions. A peak dc-to-dc efficiency of 80% is achieved at 100 W of dc output power and a dc output voltage variation of less than 5% is measured over a load range from 30 to $500~\Omega $ . The work in this paper is foreseen as a design solution for a high-efficient, maintenance-free, and reliable WPT system for powering sliders and mass movers in industrial automation plants. [ABSTRACT FROM PUBLISHER]

This paper proposes and validates model predictive control as an alternative control strategy for H-bridgeneutral-point-clamped (H-NPC) converters for single-phase grid-tied string photovoltaic (PV) systems. The presented control scheme achieves good quality current waveforms with unity power factor, dc-link voltage control, and neutral-point voltage minimization. Furthermore, the predictive controller has been further enhanced by including an average device switching frequency restriction and a $dv/dt$ mitigation. The main contribution of this paper is the avoidance of the potential leakage current due to parasitic capacitance of the PV modules by using a predictive model based control technique instead of modulated schemes and eliminating high-frequency common-mode voltage components. Experimental results during steady state and dynamic operation are presented to illustrate the behavior of the H-NPC converter commanded by the proposed control scheme. [ABSTRACT FROM AUTHOR]

Switching harmonic attenuation has always been challenging for inverters used in high-power conversion applications, where ratio of switching to fundamental frequency is low. Addition of multiple LC-trap filters is no doubt a feasible cost-effective method, which has increasingly been used, but generally susceptible to filter parameter variations and harmonic resonances. This paper hence presents an alternative active trap filter (ATF), based on a series-LC-filtered inverter, for attenuating switching harmonics in a flexible, while yet not cost burdensome, approach. A direct impedance synthesis method has also been proposed for the ATF to better enforce its active switching harmonic bypassing ability. Compared with conventional schemes for controlling active power filters, the proposed method is more readily implemented, since it requires neither current reference generation nor high-bandwidth current control loop. Moreover, the use of a series LC filter at its ac side helps the ATF to reduce its inverter voltage and power ratings. Compensated frequency range of the ATF can hence be enlarged by using a comparably higher switching frequency and a proper step-by-step design procedure to be presented in this paper. Simulation and experimental results have confirmed the design procedures, and hence expected performance of the ATF. [ABSTRACT FROM PUBLISHER]

In this paper, it is described how the circulating current flows between inverters that have isolated dc link such as cascaded H-bridge (CHB) topology when they are operating in parallel. In this case, zero sequence circulating current, which normally flows through shared dc link, cannot flow between inverters in parallel. However, circulating current is provoked by asynchronous switching instant of devices, difference of dc-link voltages of parallel inverters, and unbalanced impedance. The circulating current should be suppressed by a sharing inductor that is inserted between inverters. Generally, all of the inverters should synthesize the same output voltage reference for load current control to minimize the size of this sharing reactor. However, this conventional method cannot guarantee diminishing circulating current in the transient state and even in the steady state. In this paper, in order to reduce sharing reactance, after deriving circulating current model from general case of n-parallel operation, circulating current control method is devised based on the model. This proposed algorithm is applied to active front end five-level-CHB inverter system for medium voltage drive. Simulation and experimental results are provided to verify the effectiveness of the proposed control scheme. [ABSTRACT FROM AUTHOR]

This paper presents an improved direct torque control (DTC) method for an asymmetrical six-phase induction motor using a two-level six-phase inverter. As is well known, a simple extension of three-phase DTC technique to an asymmetrical six-phase motor, using large vectors only, introduces significant current harmonics of the order 6 n±1 (n = 1, 3, 5,…), which are mapped into the nonflux/torque producing (xy) plane. These harmonics cause only losses in the motor winding as they do not take part in torque production. Hence, a number of different improved DTC techniques have been developed in the past for multiphase motor drives. The paper takes one such DTC method as the starting point and improves it further by using the concept of virtual voltage vectors. Developed vector selection algorithm, based on two virtual voltage vectors, requires the information on position of the flux in the auxiliary (xy) subspace and provides stator current quality commensurate with the currently available best DTC algorithm for six-phase drives. However, use of two virtual voltage vectors enables a substantial reduction of the torque ripple, which is achieved by means of a five-level torque comparator. Extensive experimentation is performed and it is shown that the reduction of the current harmonics is in essence almost the same as in another recently developed DTC scheme, based on the use of a single virtual voltage vector. However, the achieved torque ripple reduction, which is verified experimentally, makes the scheme superior when compared to the existing approaches. At the same time, developed scheme retains qualities of conventional DTC schemes, such as simple structure and fast response. Its additional beneficial feature is the easiness of implementation. [ABSTRACT FROM PUBLISHER]

The objective of this paper is to propose a novel photovoltaic (PV) micro-inverter with PV current decoupling (PVCD) strategy to achieve maximum power point tracking (MPPT) performance without using large electrolytic capacitors. Conventionally, the grid-connected PV micro-inverter needs a large PV-side electrolytic capacitor to suppress the double-line frequency voltage ripple, which is caused by the injected ac grid power, to achieve the desired MPPT performance. However, the short lifetime electrolytic capacitor will reduce the PV micro-inverter's reliability dramatically. Therefore, different active power decoupling circuits (APDCs) have been proposed in published papers to reduce the required input capacitance so that the long lifetime film capacitor can be used to replace the electrolytic capacitor. Unlike the conventional APDC with charging and discharging modes operation, a novel PVCD strategy, which is based on the concept of current decoupling instead of power decoupling, is proposed to simplify the control mechanism of the PV micro-inverter. Furthermore, to accomplish the proposed current decoupling concept, a novel circuit topology for the PV micro-inverter is also proposed. With the proposed PVCD strategy, the current decoupling tank (CDT) inside the proposed PV micro-inverter can buffer the current difference between the constant current from the PV panel and the rectified sinusoidal current of the ac grid current. Therefore, the input capacitance on the PV-side can be reduced dramatically and the long lifetime film capacitor can be used to replace the electrolytic capacitor. The reliability of the PV micro-inverter with good MPPT performance can be increased. In this paper, the operation principle and the component design of the proposed PV micro-inverter with PVCD strategy will be presented. Simulation results and experimental results of a prototype 240 W PV micro-inverter is shown to verify the performance of the PV micro-inverter with PVCD strategy. [ABSTRACT FROM AUTHOR]

This paper proposes an effective sliding mode controller (SMC) for a grid-connected 7-level packed U-cell (PUC7) inverter. The aim is to design a simple controller that deals effectively with the complex control problem of the PUC7 inverter (multiobjective control problem). The selection of the control actions is achieved according to the system state error at every sampling time, regardless of the previous values, which makes the control technique model-independent. The control algorithm evaluates online two cost functions (one for each state error), which are derived on the basis of sliding mode theory, and it selects the optimal control input in order to satisfy the reaching conditions of the two cost functions. Compared with the existing solutions, the proposed SMC technique ensures lower average switching frequency by tuning the hysteresis bandwidth of the capacitor-voltage error. The fast implementation, needless of gains tuning, and simple design procedure are the main features of the proposed algorithm. Simulation and experimental results are presented to prove the effectiveness of the proposed technique in controlling the PUC7 inverter with high dynamic performance and robustness against disturbances and parameters mismatch. [ABSTRACT FROM AUTHOR]

Recent technical advances in control, protection and interconnection of distributed power generation units imply that it is practically viable and economically profitable to keep them as backup generators in isolated operating modes. Therefore, along with the development of islanding detection techniques, seamless operation in transition between islanded and grid connected modes is required and more sophisticated control strategies are needed to recognize the existing working condition and adjust the performance to meet the strict standards of grid interconnection. This paper presents a new adaptive control structure, based on internal model control (IMC), which uses multiple models and an inherent islanding detection method through an optimized switching mechanism to tune the operation of a three-phase inverter under transitions between islanded and grid-tied conditions. By applying a power synchronization method, the system emulates the operation of a synchronous machine which is needless to rely on a phase-locked loop to synchronize during the transitions. Hardware co-simulation environment in Simulink/PLECS and Xilinx System Generator have been utilized to evaluate the transient behavior of the controller in discretized domain and verify its robustness during parameter variations and load switching conditions. Various switching rules have been applied and a comparison of their effect in transient response is demonstrated. The results, taken from several case studies, confirm the significant robustness of the proposed control methodology. [ABSTRACT FROM AUTHOR]

In this paper, two single-phase single-stage split-inductor buck–boost inverters are proposed: type-I and II. The proposed type-I is unity power factor inverter, while the proposed type-II inverter is suitable for any power factor. Both topologies remove the shoot-through problem. Furthermore, the reverse recovery issues for all switches are eliminated; therefore, mosfets are used to obtain higher efficiencies. The proposed inverters operated at higher switching frequencies confer the additional benefit of smaller passive components. The current stresses of the two switches in the proposed type-I and II inverters are lower of the conventional boost inverter. The dead time can be eliminated at both the high and line switching frequencies. In addition, the inductor conduction loss is minimized to improve efficiency. Moreover, the voltage stresses of the two switches in the type-I inverter can be much lower of its counterpart boost inverter. Most importantly, unlike the conventional high-reliability inverters, the magnetic volume of the proposed high-reliability type-I and II inverters is same of its counterpart boost inverter. The experimental results obtained for 500 W, 110 Vrms, 60 Hz hardware prototypes verify the analysis. [ABSTRACT FROM AUTHOR]

This paper presents a reduced component count five-level inverter topology based on the stacked cell approach to multilevel inverters. The proposed topology utilizes the fundamental properties of three-phase voltages to reduce the number of switches and flying capacitors to cut size, weight and costs while facilitating higher reliability, simpler wiring and lesser electromagnetic interference. The operational aspects of the topology such as circuit structure, modulation and capacitor balancing are explained, followed by an account of device stresses and reliability. A discussion of certain additional features such as fault tolerant operation, loss steering and common-mode elimination addresses the usefulness of the topology in practical situations. A comparison of the proposed topology with existing methods in terms of several parameters is then used to highlight its merits and features. Finally, experimental results obtained using an induction motor drive incorporating the topology are given, so as to validate the feasibility of the proposed approach. [ABSTRACT FROM AUTHOR]

Reliability of power systems can be improved by the use of voltage source inverters (VSIs) with fast dynamic control, which can handle uncertainties induced by renewable energy resources and nonlinear loads. To ensure fast-dynamic response and simplified controller design, various model predictive control (MPC) methods are investigated in this paper. In the conventional MPC design for three-level VSIs, the cost function requires an additional term to ensure the balance of the neutral-point voltage (NP-V), which however can considerably impact the main goal of the MPC. To address this issue, an enhanced MPC using virtual space vectors is proposed, which allows the use of a significantly reduced weighting factor for the term in the cost function for NP-V balancing, while retaining fast-dynamic response. Additionally, the proposed MPC leads to reduced harmonic distortion in the VSI output voltage and current. Both simulation and controller hardware-in-the-loop studies are performed to demonstrate the effectiveness of the proposed enhanced MPC in an operating microgrid under both steady-state and fast-transient conditions. [ABSTRACT FROM AUTHOR]

This paper proposes a new inverter topology based on the active neutral-point-clamped (ANPC) converter with capability to integrate one energy storage system (ESS) per inverter leg with an independent state of charge control, so that each inverter leg has two dc ports and one ac port. The primary dc port is common to all inverter legs and it is connected to the main power source. The secondary dc port is suitable for ESS connection because of its two-quadrant operation, with bidirectional current capability, so that the ESS can be charged and discharged with regulated current. Integration of a secondary dc port with independent control also allows the use of different ESS technologies for each inverter leg to compose a hybrid ESS. Redundant switching states of the proposed structure are used to balance the energy exchanged between the secondary dc port and the dc bus capacitors. Theoretical propositions were experimentally validated through a 1-kW single-phase inverter with a secondary dc port connected to a 230-V ESS and ac port connected to an LC filter feeding a linear load. Low total harmonic distortion (THD) sinusoidal current is generated at the ac port while charging or discharging the ESS with a constant current. [ABSTRACT FROM AUTHOR]

In order to provide high and extendable power levels for inductive power transfer (IPT) system, a parallel multi-inverter system based on modular inverter is presented. Various power requirements can be implemented by an adjustment of the number of paralleled inverters, which provides a high modularity. A master−slave scheme is employed for the switching-driver signals of parallel inverters, where one acts as a leader while others act as followers. Despite the master−slave scheme, the proposed circuit topology has natural robustness because of the equality in terms of the hardware configuration of each modular inverter. For proper parameters, the output phase (current lagging corresponding voltage) of an inverter is lower than the average of output phase of all inverters, when its output voltage lags behind others, and vice versa. Based on this approach, PI controllers are designed to implement phase synchronization for output voltages of all inverters. An IPT prototype supplied by the proposed parallel multi-inverter with three inverters was designed, built, and tested. Experiments show that the proposed parallel multi-inverter system has not only good circulating current suppression capacity but also excellent performance of phase synchronization. The maximum dc−dc efficiency was 94% at a 35.1 kW receiving power. This paper is accompanied by a Matlab/Simulink file demonstrating phase synchronization control. [ABSTRACT FROM AUTHOR]

A gate driving for power devices is a key technology to further improve switching characteristics. With the help of digital gate driver IC, the switching behavior of power devices can be enhanced even under high-speed switching. In this paper, an evaluation platform for determining the optimal switching pattern of an active gate drive control is proposed for an inverter circuit. A high speed optimization system is built up to search for an advantageous switching pattern that reduces total switching loss of two power devices in an inverter circuit and constrains surge voltage simultaneously. The proposed online optimization demonstrates its feasibility for the full-bridge inverter circuit, which is rated at 500 V with digital active gate drive control. Experimental results show that the proposed optimization system is able to obtain optimal switching pattern from $64^{60}$ possible combinations of switching patterns within 15 min, which is 6 times faster than the previous study. Optimizations can also conducted under different load current conditions. Eventually, the obtained optimal pattern yields up to 42% reduction in the total switching loss when it constrains surge voltage to minimum compared with the conventional driving pattern. [ABSTRACT FROM AUTHOR]

In this paper, a new Lyapunov-based model predictive controller is proposed for a 7-level packed U-cell (PUC7) grid-connected inverter. A cost function of the proposed model predictive controller is designed from the system stability point of view, inspired by the Lyapunov control theory. The proposed controller eliminates the need for gains that are associated with cost function coefficients, as seen in classical model predictive control based controllers. Therefore, the control design problem is significantly simplified. In addition, the average switching frequency is also reduced, as shown in both simulation and experimental results, leading to a reduction in switching losses. Simulation and experimental tests, on a PUC7 lab prototype, demonstrate the excellent performance of the proposed control system, in terms of high disturbance rejection, robustness to parameter mismatches, and fast dynamic response. Such features qualify the proposed control strategy as a good candidate for grid-tied applications. [ABSTRACT FROM AUTHOR]

Three-level inverter has an outstanding performance and is more advantageous in the switching vector selection than two-level inverter. In particular, the neutral-point voltage unbalance and common-mode voltage (CMV) reduction of three-level inverter should be carefully regulated for the appropriate operation, both of which, however, are mutually coupled resulting that the conventional space vector modulation (SVM) scheme cannot deal with them properly. To overcome this limitation, this paper proposes an improved space vector modulation (ISVM) technique to reduce the CMV and neutral-point voltage imbalance simultaneously. The generating mechanism of neutral-point voltage oscillation is derived. Based on the analysis, the proposed ISVM method adopts four voltage vectors (large, medium, small, and zero vectors) with adjusted dwell times to eliminate the ac unbalance of the neutral-point voltage. Considering the occurrence of neutral-point voltage disturbances, the dc neutral-point unbalance voltage is controlled by selecting the P-type or N-type small vector and adjusting the dwell times of small vectors for neutral-point voltage recovery. In addition, a novel switching sequence arrangement method with the minimal number of switches transition in one switching cycles and between switching cycles is proposed to reduce the total switching loss. Theoretical analysis and verification results show that the proposed ISVM scheme can reduce the magnitude of CMV to half of value using the conventional SVM, and an accurate control of ac and dc unbalanced neutral-point voltage can be obtained. [ABSTRACT FROM AUTHOR]

The magnetic resonant wireless power transfer (WPT) system with a class E inverter has wide application in mid-range power transmission, especially for several megahertz scenario. However, it is cumbersome for the existing modeling and analysis methods to obtain the analytical solution to the system variables, which limits the evaluation of system characteristic. This paper proposes a nonlinear mathematical model for the WPT system with a class E inverter. The equivalent small parameter method (ESPM) is first adopted to solve the proposed six-order nonlinear model, and symbolic-form steady-state periodic solutions are yielded. During the whole solving process, only three iteration steps are needed for the proposed method. Compared with other existing modeling and analysis methods, the symbolic periodic results acquired by the ESPM exhibit sufficient accuracy by virtue of the combination of more higher harmonics. Meanwhile, the calculation complexity is simplified remarkably. Simulation and available experiments validate the effectiveness and accuracy of the proposed method. [ABSTRACT FROM AUTHOR]

In this paper, a generalized switching modification method is proposed to reduce the root-mean-square (rms) current flowing into a dc-link capacitor in a dc–dc–ac structure consisting of a boost converter and a three-phase inverter. To analyze the current flowing into the capacitor, we analyze the currents at the respective converter and inverter sides. Based on this analysis, we derive an analytical method to find the modification time between the converter and inverter pulsewidth modulation (PWM) carriers through a Fourier series and approximation to facilitate real-time implementation. Real-time implementation of the modification time calculated by the derived method is described. To verify the validity of the proposed method, experimental results are presented based on a 1-kVA dc–dc–ac prototype. The proposed method has a better capacitor rms current reduction performance than the conventional method in various inverter power factors and PWM strategies. Especially, it has an excellent performance in mid-power factor level (0.95–0.1). [ABSTRACT FROM AUTHOR]

In this paper, a new space vector pulse width modulation method to extend the linear modulation range of a cascaded five level inverter topology with a single dc supply is presented. Using this method, the inverter can be controlled linearly and the peak phase fundamental output voltage of the inverter can be increased from 0.577 to 0.637 V\text{dc} without increasing the dc bus voltage and without exceeding the induction motor voltage rating. This new technique makes use of cascaded inverter pole voltage redundancy and property of the space vector structure for its operation. Using this, the induction motor drive can be operated till the full speed range (0–50 Hz) with the elimination of lower order harmonics in the phase voltage and phase current. The five-level topology presented in this paper is realized by cascading a two-level inverter and two full bridge modules with floating capacitors. The inverter topology and its operation for extending the modulation range is analyzed extensively. Simulation and experimental results for both steady-state and dynamic operating conditions are presented in this paper. [ABSTRACT FROM AUTHOR]

In this paper, an improved direct torque control (DTC) technique of a two-level inverter-fed five-phase induction motor (FPIM) drive for low-speed operation is presented. The operation of the FPIM with distributed winding requires the elimination of third-harmonic voltage, which, if not taken care of, would generate distorted stator current. For this, the concept of virtual vectors (VVs) is utilized. Before selecting the VVs for the DTC operation, a theoretical analysis is carried out to find the effects of these VVs on the torque and flux response of the FPIM under different speed and loading conditions. It is found that the rotor speed plays a crucial role in the selection of VVs. A particular VV has different effects on the torque change as speed varies. This analysis helps in the selection of VVs, hysteresis torque bandwidth, flux bandwidth, and efficient formation of sectors. Furthermore, in this paper, the performance of the FPIM during low-speed operation is improved by avoiding the demagnetization of the stator flux. To achieve this, a new modified lookup table is proposed. Superiority of the proposed method over the reported approaches is illustrated by experimental results. [ABSTRACT FROM PUBLISHER]

Increasing demands for power supplies have contributed to the population of high-frequency ac (HFAC) power distribution system (PDS), and in order to increase the power capacity, multilevel inverters (MLIs) frequently serving as the high-frequency (HF) source-stage have obtained a prominent development. Existing MLIs commonly use more than one voltage source or a great number of power devices to enlarge the level numbers, and HF modulation (HFM) methods are usually adopted to decrease the total harmonic distortion (THD). All of these have increased the complexity and decreased the efficiency for the conversion from dc to HF ac. In this paper, a nine-level inverter employing only one input source and fewer components is proposed for HFAC PDS. It makes full use of the conversion of series and parallel connections of one voltage source and two capacitors to realize nine output levels, thus lower THD can be obtained without HFM methods. The voltage stress on power devices is relatively relieved, which has broadened its range of applications as well. Moreover, the proposed nine-level inverter is equipped with the inherent self-voltage balancing ability, thus the modulation algorithm gets simplified. The circuit structure, modulation method, capacitor calculation, loss analysis, and performance comparisons are presented in this paper, and all the superior performances of the proposed nine-level inverter are verified by simulation and experimental prototypes with rated output power of 200 W. The accordance of theoretical analysis, simulation, and experimental results confirms the feasibility of proposed nine-level inverter. [ABSTRACT FROM AUTHOR]

Three-phase voltage-source inverters typically feature a significant amount of dc energy storage to maintain a stiff dc bus. In these cases, the dc-link capacitor is sized to store enough energy to maintain several tens of cycles of ac output at the rated power. In this paper, we propose to reduce the size of the dc-link capacitor dramatically to store enough energy to provide just one high-frequency switching cycle of the ac output power. The dc bus is no longer stiff, and hence, classical sinusoidal pulse-width modulation cannot be used. However, the stored energy modulation (SEM) proposed herein synthesizes high-quality sinusoidal output voltage waveforms, even with such tiny dc-link capacitors. In SEM, the switching intervals of the interconnecting switches are carefully determined nonlinear functions of various operating parameters such as reactive component sizing, switching frequency, load levels, etc. This paper presents the analytical and detailed design development of the SEM approach along with circuit simulation, experimental results, and comparative evaluation of a dc-to-three-phase system example. [ABSTRACT FROM PUBLISHER]