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Compared with neutral-point-clamped (NPC) inverters, active NPC (ANPC) inverters enable a substantially increased output power and an improved performance at zero speed for high-power electrical drives. This paper analyzes the operation of three-level (3L) ANPC inverters under device failure conditions, and proposes the fault-tolerant strategies to enable continuous operating of the inverters and drive systems under single and multiple device open- and short-failure conditions. Therefore, the reliability and robustness of the electrical drives are greatly improved. Moreover, the proposed solution adds no additional components to standard 3L-ANPC inverters; thus, the cost for robust operation of drives is lower. Simulation and experiment results are provided for verification. Furthermore, a comprehensive comparison for the reliability function of 3L-ANPC and 3L-NPC inverters is presented. The results show that 3L-ANPC inverters have higher reliability than 3L-NPC inverters when a derating is allowed for the drive system under fault-tolerant operation. If a derated operation is not allowed, the two inverters have similar reliability for device open failure, while 3L-NPC inverters have higher reliability than 3L-ANPC inverters for device short failure. [ABSTRACT FROM AUTHOR]

A novel switched-capacitor inverter is proposed. The proposed inverter outputs larger voltage than the input voltage by switching the capacitors in series and in parallel. The maximum output voltage is determined by the number of the capacitors. The proposed inverter, which does not need any inductors, can be smaller than a conventional two-stage unit which consists of a boost converter and an inverter bridge. Its output harmonics are reduced compared to a conventional voltage source single phase full bridge inverter. In this paper, the circuit configuration, the theoretical operation, the simulation results with MATLAB/SIMULINK, and the experimental results are shown. The experimental results accorded with the theoretical calculation and the simulation results. [ABSTRACT FROM PUBLISHER]

This paper presents a novel matrix converter with one ac input and two ac outputs. The presented topology is based on the traditional indirect matrix converter, but with its rear-end six-switch inverter replaced by a compact nine-switch inverter. With only three extra switches added, the proposed converter can produce two sets of three-phase ac outputs, whose amplitudes, frequencies, and phases can appropriately be regulated. Features such as sinusoidal input and outputs, unity input power factor and minimum commutation count are all retained by the proposed topology, despite having an additional output. Its modulation is realized by the computationally less intensive carrier-based method, whose unique carrier requirements can easily be managed within a programmable logic device. Mathematical proof for validating sinusoidal input and outputs achieved by this modulation technique is also discussed, before being verified in simulation and experimentally, together with other findings. [ABSTRACT FROM AUTHOR]

In this paper, a real-time circulating current reduction method for parallel harmonic-elimination pulsewidth modulation (HEPWM) inverters is proposed. HEPWM techniques are often used in high-capacity inverters. For instance, in a hybrid microgrid, the inverters are employed to transfer power between the dc and ac buses. If the inverters are in parallel operation, the zero-sequence path can be established, and the zero-sequence circulating current will circulate among the inverters. The proposed method installs a cascade null-vector control system behind the conventional three-phase HEPWM modulator. The proposed null-vector control system can be disabled to save switching losses when the zero-sequence circulating current is small, whereas it can be enabled when the zero-sequence circulating current becomes large. The proposed method does not affect the line-to-line voltage waveforms of HEPWM inverters, and it can easily enable/disable the null-vector control system to provide bumpless transfer. Compared with the conventional HEPWM with zero-sequence harmonics elimination, the proposed method can provide an extra 15% modulation index range. Results that were obtained from both simulation and experiments confirmed the performance and effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper extends the impedance-source (Z-source) inverters concept to the transformer-based Z-source (trans-Z-source) inverters. The original Z-source inverter (ZSI) employs an impedance network of two inductors and two capacitors connected in a special arrangement to interface the dc source and the inverter bridge. It has buck and boost function that cannot be achieved by traditional voltage-source inverters and current-source inverters. In the proposed four trans-Z-source inverters, all the impedance networks consist of a transformer and one capacitor. While maintaining the main features of the previously presented Z-source network, the new networks exhibit some unique advantages, such as the increased voltage gain and reduced voltage stress in the voltage-fed trans-ZSIs and the expanded motoring operation range in the current-fed trans-ZSIs, when the turns ratio of the transformer windings is over 1. Simulation and experimental results of the voltage-fed and the current-fed trans-ZSIs are provided to verify the analysis. [ABSTRACT FROM AUTHOR]

This paper presents the real-time implementation and experimental performances of the wavelet-modulation technique for single-phase voltage-source (VS) inverters. The wavelet-modulation technique is realized through constructing a nondyadic-type multiresolution analysis, which supports sampling of a sinusoidal reference-modulating signal in a nonuniform recurrent manner, then reconstructing it using the inverter-switching actions. The required nonuniform recurrent sampling is carried out by using dilated and translated sets of wavelet basis functions, which are generated by the scale-base linearly combined scaling function. The reconstruction of the sampled signal is accomplished by using dilated and translated sets of wavelet basis functions, which are generated by the scale-base linearly combined synthesis scaling function. The dilated and translated sets of wavelet basis functions used in the reconstruction are employed as switching signals to activate the inverter-switching elements. The wavelet-modulation technique is implemented in real time by using a digital signal processing board to generate switching pulses for a single-phase VS H-bridge (four-pulse) inverter. Experimental performances of the single-phase inverter, which is operated by the wavelet-modulation technique are investigated while supplying linear, dynamic, and nonlinear loads with different frequencies. Experimental test results show that high magnitude of fundamental components and significantly reduced harmonic contents of the inverter outputs can be achieved using the wavelet-modulation technique. The efficacy of the developed modulation technique is further demonstrated through performance comparisons with the pulsewidth- and random-pulsewidth-modulation techniques for similar loading conditions. [ABSTRACT FROM AUTHOR]

This paper presents an optimal control scheme for a multilevel inverter working for audio power amplification. The proposed control scheme comprises two loops of feedback around a sliding-mode quantizer. The double-loop feedback generates a continuous equivalent control signal, while the quantizer that operates in the sliding mode converts the equivalent control signal into a staircase voltage waveform used to drive a loudspeaker through an LC filter for audio signal tracking. The control scheme is optimized to reduce the frequency weighted tracking error and the equivalent control signal simultaneously, compromising between a satisfactory performance and a wide stable input range. With the proposed design, a nine-level class-D audio amplifier is built and tested, which exhibits high-robustness and high-quality audio reproduction. [ABSTRACT FROM AUTHOR]

A high-performance pulsewidth modulation (PWM) algorithm with reduced common-mode voltage (CMV) and satisfactory overall performance is proposed for three-phase PWM inverter drives. The algorithm combines the near-state PWM (NSPWM) method that has superior overall performance characteristics at high modulation index, and MAZSPWM, a modified form of the active zero-state PWM method (AZSPWM1), which is suitable for low modulation index range of operation. Since AZSPWM1 has line-to-line voltage pulse reversals with small zero-voltage time intervals, in its naive form, it causes overvoltages, in particular in long-cable motor drive applications. Obtained by reorganizing the duty cycles of the utilized voltage vectors of AZSPWM1, MAZSPWM has sufficiently long zero-voltage time intervals between pulse reversals such that during pulse reversals, overvoltages are avoided. The combined algorithm performs satisfactorily throughout the inverter operating range and the transition from NSPWM to MAZSPWM and vice versa is seamless. The performance of the proposed algorithm is proven by theory, computer simulations, and detailed laboratory experiments. The paper also shows that the proposed reduced CMV PWM algorithm is effective in reducing the motor leakage current, and it is most beneficial when a small common-mode inductor is included in the drive. [ABSTRACT FROM AUTHOR]

A multilevel inverter topology for seven-level space vector generation is proposed in this paper. In this topology, the seven-level structure is realized using two conventional two-level inverters and six capacitor-fed H-bridge cells. It needs only two isolated dc-voltage sources of voltage rating Vdc/2 where Vdc is the dc voltage magnitude required by the conventional neutral point clamped (NPC) seven-level topology. The proposed topology is capable of maintaining the H-bridge capacitor voltages at the required level of Vdc/6 under all operating conditions, covering the entire linear modulation and overmodulation regions, by making use of the switching state redundancies. In the event of any switch failure in H-bridges, this inverter can operate in three-level mode, a feature that enhances the reliability of the drive system. The two-level inverters, which operate at a higher voltage level of Vdc /2, switch less compared to the H-bridges, which operate at a lower voltage level of Vdc/6, resulting in switching loss reduction. The experimental verification of the proposed topology is carried out for the entire modulation range, under steady state as well as transient conditions. [ABSTRACT FROM AUTHOR]

The hysteresis modulation for power electronic converters is attractive in many different applications because of its unmatched dynamic response and wide command-tracking bandwidth. Its application and benefits for two-level converters are well understood, but the extension of this strategy to multilevel converters is still under development. This paper summarizes and reviews the various hysteresis modulation approaches available in the literature for multilevel converters. The pros and cons of various techniques are described and compared for tracking the reference signal in order to attain an adequate switching optimization, excellent dynamic responses and high accuracy in steady-state operation. By using the recently developed multilevel hysteresis modulation approaches, the advantages of using several accessible dc potentials in a multilevel inverter have been fully exploited. All of these hysteresis modulation approaches are tested for tracking a current reference when applied to a five-level inverter. The relevant simulation and experimental results are also presented. This study will provide a useful framework and point of reference for the future development of hysteresis modulation for multilevel converters. [ABSTRACT FROM AUTHOR]

There is a strong trend in the photovoltaic inverter technology to use transformerless topologies in order to acquire higher efficiencies combining with very low ground leakage current. In this paper, a new topology, based on the H-bridge with a new ac bypass circuit consisting of a diode rectifier and a switch with clamping to the dc midpoint, is proposed. The topology is simulated and experimentally validated, and a comparison with other existing topologies is performed. High conversion efficiency and low leakage current are demonstrated. [ABSTRACT FROM AUTHOR]

A novel H-bridge multilevel pulsewidth modulation converter topology based on a series connection of a high-voltage diode-clamped inverter and a low-voltage conventional inverter is proposed in this paper. A dc link voltage arrangement for the new hybrid and asymmetric solution is presented to have a maximum number of output voltage levels by preserving the adjacent switching vectors between voltage levels. Hence, a 15-level hybrid converter can be attained with a minimum number of power components. A comparative study has been carried out to present high performance of the proposed configuration to approach a very low total harmonic distortion of voltage and current, which leads to the possible elimination of the output filter. Regarding the proposed configuration, a new cascade inverter is verified by cascading an asymmetrical diode-clamped inverter, in which 19 levels can be synthesized in output voltage with the same number of components. To balance the dc link capacitor voltages for the maximum output voltage resolution as well as synthesize asymmetrical dc link combination, a new multi-output boost converter is utilized at the dc link voltage of a seven-level H-bridge diode-clamped inverter. Simulation and hardware results based on different modulations are presented to confirm the validity of the proposed approach to achieve a high-quality output voltage. [ABSTRACT FROM PUBLISHER]

The output voltage quality of some of the single-phase multilevel inverters can be improved when their dc-link voltages are regulated asymmetrically. Symmetrical and asymmetrical multilevel diode-clamped inverters have the problem of dc-link capacitor voltage balancing, especially when power factor of the load is close to unity. In this paper, a new single-inductor multi-output dc/dc converter is proposed that can control the dc-link voltages of a single-phase diode-clamped inverter asymmetrically to achieve voltage quality enhancement. The circuit of the presented converter is explained and the main equations are developed. A control strategy is proposed and explained in details. To validate the versatility of the proposed combination of the suggested dc–dc converter and the asymmetrical four-level diode-clamped inverter (ADCI), simulations and experiments have been directed. It is concluded that the proposed combination of introduced multioutput dc–dc converter and single-phase ADCI is a good candidate for power conversion in residential photovoltaic (PV) utilization. [ABSTRACT FROM PUBLISHER]