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A novel bipolar current source driver (CSD) for power MOSFETs is proposed in this paper. The proposed bipolar CSD alleviates the gate current diversion problem of the existing CSDs by clamping the gate voltage to a flexible negative value (such as -3.5 V) during turn-off transition. Therefore, the proposed driver is able to turn off the MOSFET much faster with a higher effective gate current. The idea presented in this paper can also be extended to other CSDs to further improve the efficiency with high output currents. The experimental results verify the benefits of the proposed CSD. For buck converters with 12 V input at 1 MHz switching frequency, the proposed driver improves the efficiency from 80.5% using the existing CSD to 82.5% (an improvement of 2%) at 1.2 V/30 A, and at 1.3 V/30 A output, from 82.5% using the existing CSD to 83.9% (an improvement of 1.4%). [ABSTRACT FROM AUTHOR]

The solid-state transformer (SST) is an alternative for existing power transformer due to its advantage in low volume, bidirectional power flow, power factor control, and fault management capability. In this paper, a three-stage cascaded-type SST, which utilizes the cascaded seven-level rectifier as the interface with a 7.2 kV distribution system, is presented. In the described system, dc voltage balancing of the cascaded seven-level rectifier is a necessity for stable operation. Previous PI-based voltage balancing control has intrinsic disadvantage in compromise between fast regulation and PI saturation. Besides, the addition of a voltage balancing controller may also change the system loop and bring unexpected performance. This paper aims at giving an alternative view of voltage balancing mechanism in a cascaded multilevel converter. A novel 3-D space modulation technique with voltage balancing capability is proposed for a cascaded seven-level rectifier stage of SST. By choosing the most suitable switching pairs for dc voltage balance, this method has a very good voltage balancing capability that can realize fast regulation of dc voltages in all operation modes, including unity power factor operation, capacitive operation, and inductive operation. Simulation and experimental results in a scaled-down system are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a new space-vector pulsewidth modulation (SV-PWM) strategy for a three-level neutral point clamped inverter. The presented SV-PWM strategy makes it possible to control the neutral point voltage by optimum choice of switch sequence for any position and length of output voltage vector. The proposed solution takes into consideration the unbalance of the dc-link voltages. It also analyzes the influence of vector sequences on the predicted unbalance of the dc-link voltage. The solution allows selecting optimum vectors and their on-time durations in order to reduce quickly the dc-link voltage unbalance. The calculation of the space vector area proposed in this paper takes into consideration voltage unbalance and its influence on the length and position of vectors. The proposed approach assures properly generating the voltage output vectors, even in the case of the existing large voltage unbalance in the dc-link. The results of the experimental investigation of the proposed modulation strategy are presented in this paper. [ABSTRACT FROM PUBLISHER]

Multilevel power electronic converters have gained popularity in high-power applications due to their lower switch voltage stress and modularity. Cascaded H-bridge converters are a promising breed of multilevel converters which generally require several separate dc voltage sources. By utilizing the redundant switching states, it is possible to replace the separate dc voltage sources with capacitors and keep only the one with the highest voltage level. Redundancy in the charge and discharge modes of the capacitors is assumed to be adequate for their voltage regulation. However, the effects of the output current of the converter as well as the time duration of the redundant switching states have been neglected. In this paper, the impacts of the connected load to the cascaded H-bridge converter as well as the switching angles on the voltage regulation of the capacitors are studied. This paper proves that voltage regulation is only attainable in a much limited operating conditions that it was originally reported. In addition, based on the analysis of the converter, a simplified formula is found which can be used to find those modulation indices that regulate the voltage of the capacitor. This formula can be used in harmonic minimization problems while capacitor voltage regulation is ensured. Simulation and laboratory results are provided to confirm the analysis. [ABSTRACT FROM PUBLISHER]

A family of isolated buck–boost dc/dc converter for wide input-voltage range is proposed in this paper, and the full-bridge (FB) boost converter, being one of the typical topologies, is analyzed. Due to the existence of the resonant inductor (including the leakage inductor), the FB-boost converter can only adopt the two-edge-modulation (TEM) scheme with the FB cell being leading-edge modulated and the boost cell being trailing-edge modulated to minimize the inductor current ripple over the input-voltage range, and a phase-shift-control-scheme-based TEM with the use of the market available controller IC such as UC3895 is proposed, which realizes phase-shifted control for the FB cell to achieve zero-voltage switching. In order to improve the reliability and efficiency of the FB-boost converter, a three-mode dual-frequency control scheme is proposed, in which the FB-boost converter operates in boost, FB-boost and FB modes in low, medium and high input voltage regions, respectively, and for which the expression of the inductor current ripple is derived in this paper. As the input voltage in the FB-boost mode is close to the output voltage, the inductor current ripple in this mode is much smaller than that in the other modes, and the switching frequency of the boost cell in this mode can be lowered to one-(2N+1)th of the preset switching frequency to reduce the switching loss, and hence, to improve the efficiency. A 250–500 V input, 360 V output, and 6 kW rated power prototype is fabricated to verify the effectiveness of the design and control method. The average efficiency over the input-voltage range is 96.5%, and the highest efficiency attained is 97.2%. [ABSTRACT FROM AUTHOR]

This paper presents a single-phase power factor corrector based on a tapped-inductor buck–boost converter. This paper suggests simplified models of the power stage under current-mode control and derives small-signal transfer functions of both the current and voltage control loops. Design rules for implementation of the proposed power factor corrector (PFC) are also suggested. The proposed PFC features low dc bus voltage, arbitrary lower than the peak line voltage. The proposed PFC is suitable for applications in computers and communications, where dc isolation can be provided by the downstream dc/dc converters. Simulation and experimental results are also reported and stand in good agreement with theoretical expectations. [ABSTRACT FROM AUTHOR]

This paper proposes a new circuit topology for a multilevel pulse width modulation (PWM) rectifier. The proposed method forms a new circuit by combining a diode clamp-type topology with a flying capacitor-type topology. The proposed circuit uses only 12 switches, despite the use of a five-level three-phase PWM rectifier. Further, the proposed circuit can obtain good performance, same as a conventional multilevel circuit. This paper describes about the features of the proposed topology; the control strategy and the loss analysis that is estimated by a circuit simulator. In addition, the basic operation of the proposed method is confirmed by simulation and experimental results. The proposed converter achieved total harmonic distortion of 3.4% for the input current and efficiency of 97.4% for a 1 kW class experimental setup. [ABSTRACT FROM AUTHOR]

This paper describes a modified phase-shifted carrier-based pulsewidth-modulation (PSC-PWM) scheme for modular multilevel converters (MMC). In order to reduce the average device switching frequency, a reduced switching-frequency (RSF) voltage balancing algorithm is developed. This paper also proposes a circulating current suppressing controller (CCSC) to minimize the inner circulating current in an MMC. Based on the double line-frequency, negative-sequence rotational frame, the three-phase alternative circulating currents are decomposed into two dc components and are minimized by a pair of proportional integral controllers. Simulation results based on a detailed PSCAD/EMTDC model prove the effectiveness of the modified PSC-PWM method and the RSF voltage-balancing algorithm. The proposed CCSC not only eliminates the inner circulating current but also improves the quality of the converter ac output voltage. A simple loss evaluation demonstrates that the RSF voltage-balancing algorithm and the CCSC reduce the converter power losses. [ABSTRACT FROM AUTHOR]

Most variable-speed ac generation systems use back-to-back converters to supply electrical energy, with fixed electrical frequency and voltage, to a stand-alone load or grid. Matrix converters (MCs) are a good alternative to back-to-back converters because they have several advantages in terms of size and weight. Therefore, MCs can be advantageously used in any variable-speed generation system where high efficiency, reliability, small size, and low weight are considered important factors. Nevertheless, to interface an MC-based generation system to an unbalanced 3\phi stand-alone load, a four-leg MC is required to provide a path for the zero-sequence load current. Space-vector-modulation (SVM) algorithms for the operation of four-leg MCs have been proposed in the literature. However, these modulation methods have high computational burdens, and they are difficult to implement, even in fast DSP-based control platforms. Therefore, only simulation results have been reported in these publications. In this paper, an SVM algorithm is optimized and experimentally tested. Moreover, the harmonics produced in the input current when a four-leg MC is feeding an unbalanced or nonlinear load are also mathematically analyzed in this paper, with experimental verification being provided. [ABSTRACT FROM AUTHOR]

In many modern energy conversion systems, a dc voltage, which is provided from a sustainable energy source or energy storage device, must be boosted and converted to an ac voltage with a fixed amplitude and frequency. In this paper, a switching pattern based on the concept of the conventional space-vector pulsewidth-modulated (SVPWM) technique is developed for single-stage, three-phase boost-inverters using the topology of current-source inverters. The six main switching states, and two zeros, with three switches conducting at any given instant in conventional SVPWM techniques are modified herein into three-charging states and six discharging states with only two switches conducting at any given instant. The charging states are necessary in order to boost the dc input voltage. The developed switching pattern was experimentally verified through a laboratory-scaled three-phase 500-W boost inverter and the results are presented in this paper. [ABSTRACT FROM AUTHOR]

The conventional current-source inverter has two major problems: unidirectional power flow and voltage boost operation, which make it impossible to be used in many applications, such as hybrid electric vehicles and general-purpose variable-speed motor drives. Z-source inverters (ZSIs) can solve both problems. Quasi-ZSIs (qZSIs) were recently proposed as an important improvement to traditional ZSIs. Besides the advantages inherited from ZSIs, qZSIs also have several of their own merits. This paper presents a comprehensive study on the new features of current-fed qZSI, including the advantageous buck–boost function, improved reliability, reduced passive component ratings, and unique regeneration capability. The current-fed qZSIs are bidirectional with an additional diode, unlike the voltage-fed ZSI that needs a switch to achieve bidirectional power flow. A modified space vector pulse-width-modulation method is proposed, and the available operating regions for motoring and regeneration operation are analyzed in this paper. Since the current-fed qZSI has the same operation as the current-fed ZSI, many results of this paper are also applicable to the current-fed ZSI. A reverse-blocking insulated-gate bipolar-transistor-based current-fed qZSI prototype was developed in the laboratory. Simulation and experimental results are shown to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

Resistance emulation using one cycle control (OCC) has been used extensively in single-phase full-bridge boost rectifiers. This paper proposes a new control strategy called dual comparison OCC (DC-OCC), which eliminates the limitations of OCC. The advantages of the proposed control strategy is that it ensures the average current is equal to grid voltage scaled by emulated resistance, in each switching cycle. This eliminates issues such as dc offset due to the peak current comparison in OCC. It also ensures that there is no distortion in current when the converter is lightly loaded. It is analytically shown that the proposed DC-OCC does not have the light load instability concerns of conventional OCC. The proposed method is also shown to achieve unipolar pulse-width modulation without sensing the grid voltage resulting in lower effective switching frequency. The proposed control requires only one additional comparator and additional logical elements for implementation. Detailed simulation and experimental studies are carried to validate the proposed control and the high performance that can be obtained. [ABSTRACT FROM PUBLISHER]

This paper proposed a direct power control strategy for three-phase two-level voltage-source rectifiers based on extended-state observation. Active and reactive powers are directly regulated in the stationary reference frame. Similar to the family of predictive controllers whose inherent characteristic is highly dynamic behaviors, the proposed control strategy can present comparably enhanced transient performance. Furthermore, excellent steady-state power performance can also be observed when the proposed control scheme is adopted. In addition, another attractive feature lies in its robust performance, facilitating the successful suppression of performance deterioration caused by parameter variations and model inaccuracy. Detailed frequency-domain analysis is provided to verify its effectiveness. Experimental comparisons are also carried out among the finite control set model direct power control strategy, the vector-oriented control scheme and the proposed strategy, which demonstrate the superiority of the proposed scheme. [ABSTRACT FROM PUBLISHER]

In this paper, a cascaded H-Bridge (CHB)-multilevel converter (MC)-based photovoltaic (PV) system with no voltage or current sensors at the dc-side is proposed. Eliminating the dc-side sensors simplifies the hardware, leading to lower cost and higher reliability of the PV system. A novel scheme estimating the capacitors’ voltages from the ac output voltage of the inverter is developed. The scheme allows replacing all dc-side voltage sensors by a single-voltage sensor at the ac-side of the converter. Furthermore, the dc current sensors, conventionally required for the maximum power point tracking (MPPT), are also eliminated. Instead, the outputs from the capacitors’ voltage control systems are utilized for the MPPT. The effectiveness of the proposed dc-side sensorless system is experimentally demonstrated on a 2-kW single-phase seven-level CHB converter-based PV system. [ABSTRACT FROM PUBLISHER]

This paper presents a new dual-switch control structure for an ac/dc noninverting cascaded buck–boost power factor correction converter. The proposed converter operates at a discontinuous capacitor voltage mode providing an inherent high-power factor and a zero voltage turn-off switching. Additionally, the proposed control structure enables for a nondistorted sinusoidal current for a wide range of output voltage levels. Unlike the conventional methods, a mode detector is not required and consequently there is no hard transition between buck and boost modes. Although both converter switches are controlled, only one feedback control loop is required to obtain the desired power flow at a unity power factor. The principle of operation, theoretical analysis, simulation, and experimental results of a 1.6-kW prototype grid-connected converter are presented. The results confirmed the validity of the proposed system under various operating conditions. [ABSTRACT FROM PUBLISHER]

Semiactive quadrupler rectifiers (SAQRs) are proposed in this paper to serve as the secondary rectification circuits, which make the secondary-side voltages to be controllable and help reduce current stress and conduction losses. An interleaved isolated boost converter is developed based on the proposed SAQRs. By utilizing the pulse-width modulation (PWM) plus phase-shift (PPS) control strategy, the primary- and secondary-side voltages are well matched to reduce the current values and circulating conduction losses. With the proposed SAQRs, the voltage gain is extended and the voltage stresses on power devices and passive components used in rectification circuits are reduced to the half of the high output voltage. Hence, the efficiency is improved by using a transformer with a smaller turns ratio and reduced parasitic parameters, and by employing low-voltage rating devices with better switching and conduction performance. With optimal design, lower voltage, and current stresses on the primary-side switches, minimized input current ripple can be realized. Moreover, the zero-voltage turn on switching of the active switches and the zero-current turn off switching of the diodes can be achieved over a wide load and voltage range by the proposed SAQR-based converter and the control strategy. Meanwhile, the higher voltage gain, the lower voltage, and the current stresses on power devices can be obtained with the proposed SAQR-based converter compared with passive quadrupler rectifier-based converter. The feasibility and effectiveness of the proposed SAQRs and the derived converter are verified by a 380-V output prototype. [ABSTRACT FROM PUBLISHER]

In this paper, a model-predictive control (MPC) has been designed and implemented on the packed U-cell (PUC) inverter, which has one isolated dc source and one capacitor as an auxiliary dc link. The MPC is designed to regulate the capacitor voltage at the desired magnitude to have seven voltage levels at the output of the inverter. Since grid-connected application is targeted by this application, the inverter should be capable of supplying requested amount of active and reactive power at the point of common coupling (PCC) as well. Therefore, MPC should also consider the line-current control to monitor the exchange of reactive power with the grid while injecting appropriate active power at low total harmonic distortion (THD). Various experimental tests including change in dc-source voltage, active power variation, and operation at different power factor (PF) have been performed on a laboratory prototype to validate the good performance obtained by the proposed MPC. The dynamic performance of the controller during sudden changes in dc capacitor voltage, supply current, and PF demonstrates the fast and accurate response and the superior operation of the proposed controller. [ABSTRACT FROM PUBLISHER]

Compared with constant duty cycle-controlled discontinuous conduction mode (DCM) boost power factor (PF) correction (PFC) converter, constant duty cycle-controlled quadratic DCM–DCM boost PFC converter features with much lower second-order line frequency output voltage ripple, and however, it suffers from low PF. To increase PF of quadratic DCM–DCM boost PFC converter, a variable duty cycle control technique for quadratic DCM–DCM boost PFC converter is presented in this paper. An approximation equivalent for the variable duty cycle is employed to simplify the implementation circuit. The corresponding expressions of PF and output voltage ripple are analyzed. For input voltage range of 100–240 Vac, quadratic DCM–DCM boost PFC converter with variable duty cycle control benefits with very high PF, and tradeoff between PF and output voltage ripple of this converter is analyzed. Experimental results from 100-W prototypes are given to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

This paper presents different state feedback approaches of finite control set model predictive control (FCS-MPC) applied to a grid-connected voltage-source converter (VSC) with an LCL filter. Besides converter-side current feedback, two multivariable control approaches and line-side current control are introduced and compared based on theoretical and experimental evaluation. As the LCL filter introduces an additional resonance frequency to the system, the use of different active damping (AD) methods in combination with FCS-MPC is discussed. Furthermore, practical control implementation issues are discussed. The presented methods reveal the great potential, high dynamic performance, and flexibility of FCS-MPC, enabling multivariable control as well as both reduced switching losses and low harmonic current distortion at the same time. Eventually, the feasibility of the theoretical control concepts is shown in a laboratory environment. [ABSTRACT FROM AUTHOR]

A novel high step-up dc–dc converter with a quasi-active switched-inductor structure for a renewable energy system is presented in this paper. The proposed converter is composed of two coupled inductors which can be integrated into one magnetic core, two capacitors, two active switches, and three diodes. The primary sides of coupled inductors are charged in parallel by the input source, and the secondary sides of coupled inductors are discharged in series with the input source and two capacitors to achieve high step-up voltage gain with an appropriate duty ratio. The two sets of diode–capacitor circuits not only help to lift the voltage conversion gain but also alleviate voltage spike affected by the leakage inductance to limit the voltage stress across the power switch effectively. Therefore, the two low on-state resistance switches can be adopted to reduce conduction loss. Furthermore, the two diodes have no reverse-recovery problem due to turn off naturally, the reverse-recovery problem of the output diode is also alleviated by the leakage inductor and lower part count is needed; therefore, the power conversion efficiency can be further improved. The operating principles and steady-state analyses are discussed in detail; then, the performance of the proposed converter is compared with existing converters. Finally, a prototype is established in the laboratory, and the experimental results are given to verify the correctness of the analysis. [ABSTRACT FROM AUTHOR]

When the faulty cells of a nonregenerative cascaded H-bridge inverter are bypassed, it is necessary to inject a zero-sequence voltage into the inverter phase voltages so as to achieve the maximum balanced line-to-line voltage. However, the injected zero-sequence voltage may lead to a back flow of real power (BFRP) in at least one phase so that the dc voltage will rise to an intolerable level. To solve the problem, this paper proposes a new method of generating zero-sequence voltages. This method can not only maximize the available output voltage but also suppress the BFRP effectively. The zero-sequence voltage is always limited to an appropriate range to achieve the maximum output voltage through linear modulation. Closed-loop control is used to minimize the fundamental component of the zero-sequence voltage so that the power is less likely to flow back. Compared with the conventional methods, the proposed method allows the inverter to drive a load with a lower power factor not inducing BFRP or degrading the output voltage capability. As a result, the probability of overvoltage on the dc side is reduced. The experimental results show that the proposed method is effective and feasible. [ABSTRACT FROM AUTHOR]

The flying capacitor multilevel inverter (FCMLI) is one of the well-known structures of multilevel inverters having attracted considerable attention because of its merits. In spite of its many advantages, it has some limitations such as high volume and complicated control method because of its bulky capacitors and their voltage balancing requirement. Moreover, the high number of power semiconductors required makes this structure susceptible to failure. To increase the ratio of the number of levels to the number of components, an uneven distribution of capacitor voltages has been suggested in previous reports; however, this approach complicates the control method. Up to now, almost all presented methods suffer from high computational load and/or structure-dependent algorithm. In this paper, a simple state-based and structure-independent method is proposed for capacitor voltage regulation. The proposed method is straightforward and can perform online computation of switching sequences in a computationally efficient manner without any need for stored information or look-up tables. The method is conveniently extendible to any number of cells and levels in an FCMLI structure with arbitrary dc link voltage distribution schemes. Simulation and experimental results show the effectiveness and simplicity of this method. [ABSTRACT FROM PUBLISHER]

A pulse skipping modulation (PSM) technique improves the light load efficiency in a dc–dc converter by selectively skipping a few clock pulses. However, in existing PSM schemes, the number of charge and/or skipped cycles cannot be predefined. Therefore, it is difficult to predict the ripple parameters and ensure a stable periodic behavior. Further, it becomes difficult to further minimize power losses under light load conditions. This paper proposes a voltage-mode digital pulse skipping modulator which uses a digital pulse-width-modulator (PWM) as a building block, thus making it easy to operate the system in both PWM and PSM modes. Unlike in existing PSM schemes, the sequence and the count of charge and skip cycles can be fully prespecified in the proposed scheme, with the number of skip cycles optimally chosen to maximize the efficiency. Stability analysis is carried out using discrete-time modeling, which provides guidelines to ensure a stable periodic operation with predictable ripple parameters. Small-signal modeling and design of the proposed PSM scheme are discussed. A prototype buck converter was fabricated and tested. The proposed control scheme is implemented using an FPGA device, and the experimental results fully support the analytical predictions. [ABSTRACT FROM PUBLISHER]

Majority of spectral spreading techniques employ chaos-based pulsewidth-modulation (PWM) schemes in a switching dc–dc converter, in which neither dynamic performance nor ripple parameter can be correctly predicted so as for efficiency. Periodic frequency modulation using a triangular carrier wave can achieve custom spectral spreading and harmonic reduction. This paper proposes a periodic bifrequency digital PWM (BF-DPWM) technique in a dc–dc converter, which uses two discrete frequencies f1 and f2 as guided by a modulating signal fm. Fourier analysis shows that f1 and f2 do not exist; however, they contribute to power spectrum of fm. This method achieves considerable harmonic reduction and improved DPWM resolution with an insignificant ripple impact, compared to a dither-based periodic modulation scheme. Design guidelines using simulation study are presented. A buck converter prototype has been made, and different control schemes are implemented using a field-programmable gate array device. Test results show that the BF-DPWM has insignificant impacts on transient performance. Finally, the proposed scheme is extended to the triangular-wave modulation scheme, which results in further harmonic reduction. [ABSTRACT FROM PUBLISHER]

Voltage-balancing control in a modular multilevel converter (MMC) impacts not only the voltage difference among submodule capacitors, but also the power device switching patterns. As a result, MMC possesses a nondeterministic switching pattern and its switching frequency is no longer an independent parameter. This paper theoretically investigates how voltage-balancing control influences the switching frequency in the MMC. Equations describing the relationship between the submodule capacitor unbalanced voltage and converter switching frequency are derived. Since unbalanced voltage also impacts the submodule capacitor ripple voltage and voltage/current harmonics, the design interaction between switching frequency and submodule capacitance, as well as the selection of unbalanced voltage are further investigated. Both simulation and experimental verifications are provided. [ABSTRACT FROM PUBLISHER]

This paper presents the transient dc bias and the current impact effects of a high-frequency-isolated bidirectional dc–dc converter (IBDC) in practice because the theoretical premise in the steady process cannot be satisfied strictly in the transient process. The transient characterizations of IBDC under the steady phase-shift (SPS) strategy are analyzed comprehensively, and the corresponding model is modified for all of the transient processes in the same and different power flows. Due to the existence of the dc bias, the current model in the transient process is different from the traditional model in the steady process, and the models are different with different operating conditions. On this basis, a transient phase-shift (TPS) strategy is proposed to improve the transient performance of the SPS strategy. Unlike in the SPS strategy, the voltages of the transformer are symmetrical in the TPS strategy, which causes that the voltage–time product of the transformer voltages is zero during a switching period, then eliminates the transient dc bias and improves the current impact, and further increases the response speed of the transient process effectively. Finally, comprehensive experiments verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

This paper presents a control method for efficiency improvement of the LLC resonant converter operating with a wide input-voltage and/or output-voltage range by means of topology morphing, i.e., changing of power converter's topology to that which is the most optimal for given input-voltage and/or output-voltage conditions. The proposed on-the-fly topology-morphing control maintains a tight regulation of the output during the topology transitions so that topology transitions are made without noticeable output-voltage transients. The performance of the proposed topology morphing method is verified experimentally on an 800-W LLC dc/dc converter prototype designed for a 100-V to 400-V input-voltage range. [ABSTRACT FROM PUBLISHER]

This paper proposes and evaluates an active voltage-balancing method for stacked multicell converters (SMCs) using phase-shifted pulse width modulation. The method is easy to implement and can be applied to SMCs with any number of levels. The proposed method balances the voltages of the capacitors by modifying the duty cycle of each switch of the SMC using a proportional controller. The direction of the output current and the crossed effect among the duty cycles of the switches is considered and used to improve capacitor voltage balance. The performance of the proposed voltage-balancing method is verified experimentally for different loads, such as linear and nonlinear loads, and under transient conditions. [ABSTRACT FROM PUBLISHER]

A capacitor voltage-balancing method for a nested neutral point clamped (NNPC) inverter is proposed in this paper. The NNPC inverter is a newly developed four-level voltage-source inverter for medium-voltage applications with properties such as operating over a wide range of voltages (2.4–7.2 kV) without the need for connecting power semiconductor in series and high-quality output voltage. The NNPC topology has two flying capacitors in each leg. In order to ensure that the inverter can operate normally and all switching devices share identical voltage stress, the voltage across each capacitor should be controlled and maintained at one-third of dc bus voltage. The proposed capacitor voltage-balancing method takes advantage of redundancy in phase switching states to control and balance flying capacitor voltages. Simple and effective logic tables are developed for the balancing control. The proposed method is easy to implement and needs very few computations. Moreover, the method is suitable for and easy to integrate with different pulse width modulation schemes. The effectiveness and feasibility of the proposed method is verified by simulation and experiment. [ABSTRACT FROM PUBLISHER]

In single-phase photovoltaic (PV) system, there is double-frequency power mismatch existed between the dc input and ac output. The double-frequency ripple (DFR) energy needs to be buffered by passive network. Otherwise, the ripple energy will flow into the input side and adversely affect the PV energy harvest. In a conventional PV system, electrolytic capacitors are usually used for this purpose due to their high capacitance. However, electrolytic capacitors are considered to be one of the most failure prone components in a PV inverter. In this paper, a capacitance reduction control strategy is proposed to buffer the DFR energy in single-phase Z-source/quasi-Z-source inverter applications. Without using any extra hardware components, the proposed control strategy can significantly reduce the capacitance requirement and achieve low input voltage DFR. Consequently, highly reliable film capacitors can be used. The increased switching device voltage stress and power loss due to the proposed control strategy will also be discussed. A 1-kW quasi-Z-source PV inverter using gallium nitride (GaN) devices is built in the lab. Experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM PUBLISHER]

Aiming to improve the performance features of conventional two-level dual-active-bridge (DAB) converters, this paper presents a three-level neutral-point-clamped (NPC) DAB dc–dc converter. A general modulation pattern is initially defined, the dc-link capacitor voltage balancing is analyzed in detail, and a proper balancing control is designed. Then, a set of decoupled optimization problems is formulated as a function of the available modulation degrees of freedom to minimize the predominant converter losses. Finally, a simple and practical specific modulation strategy is provided, resembling the optimum solutions. The good performance of the proposed three-level NPC DAB converter operated with the proposed modulation strategy and voltage balancing control is verified through simulation and experiments. The capacitor voltage balancing can be guaranteed for all operating conditions. In addition, it is concluded that the multilevel topology provides benefits compared with the conventional two-level DAB converter. [ABSTRACT FROM PUBLISHER]

This paper presents a novel modulation strategy for n-phase neutral-point-clamped (NPC) converters. The proposed modulation strategy is able to control and completely remove the low-frequency neutral-point (NP) voltage oscillations for any operation point and load types. Even when unbalanced and/or nonlinear loads are considered, the NP voltage remains under total control. Consequently, the strategy is very attractive for n-phase active filters. In addition, it enables the use of low-capacity film capacitors in NPC converters. The proposed modulation takes the carrier-based modulation strategy as a basis. It is formulated following a generalized approach that makes it expandable to n-phase NPC converters. In addition, the NP voltage is controlled directly using a closed-loop algorithm that does not rely on the use of the linear control regulators or the additional compensators used in other modulation algorithms. Therefore, no tuning of parameters is required and it performs optimally for any operating conditions and kind of loads, including unbalanced and nonlinear loads. Although the high-frequency harmonic content of the output voltages may increase, the weighted total harmonic distortion generated by the proposed strategy is similar to that of a standard sinusoidal pulse width modulated strategy. The proposed modulation algorithm has been tested in a four-leg NPC converter prototype performing as a three- and four-phase system and operating with balanced and unbalanced loads. [ABSTRACT FROM AUTHOR]

This paper proposes a two-level voltage controller for large-scale power systems. The aim of the controller is to maintain a near-optimal voltage profile in the transmission network by coordinating discrete reactive power (var) control devices in the system. The controller is targeted for implementation in electric power transmission utility companies where most of the voltage controls are coordinated by switching of discrete var devices such as shunt capacitor and reactor banks and transformer banks load tap changers (LTCs). By effectively dividing the controller responsibilities between local substation controls and a central coordinator at control center level, the design is aimed at voltage control of large-scale power systems. At local level, the substation controllers maintain their respective substation bus voltages by local power-flow-like computations using mostly local PMU measurements. The central coordinator computes and provides the voltage set-points to the substation controllers and also coordinates by enabling or disabling the local controllers as needed. The controller is being designed towards prototype implementation in Southern California Edison (SCE), starting with local controllers at specific substations in the first stage. It is tested on real-time dynamic models and large-scale power-flow simulations of SCE transmission network. [ABSTRACT FROM AUTHOR]

Smart grid technologies are expected to increase system efficiency and reliability using advancement in automation, communication, computation, and optimization. Several control algorithms have been developed or enhanced for operation and control of smart distribution grid. In recent years, volt/var control (VVC) algorithms have been proposed for energy saving in distribution systems due to advancement provided by smart grid automation and control. VVC helps to lower distribution feeder voltage to decrease energy consumption. However, quantification of this impact is hard due to several external factors such as weather and end users' behavior. On the other hand, existing evaluation methods of VVC algorithms are either not suitable for long-term study or intrusive. This paper addresses these issues by proposing a new technique to estimate “distribution system demand without smart grid implementation” utilizing “data measured from system with smart grid implementation.” Interdependence of voltage and load is considered based on estimated load characteristic. Our key contribution is developing a method for quantifying the real-time energy saving of smart grid automation and control focused on VVC and implementing in an electric utility in eastern Washington, USA. The algorithm is developed using both commercial and open-source software. [ABSTRACT FROM AUTHOR]

A novel complementary phase disposition pulsewidth modulation method for the modular multilevel converter (MMC) with a limited number of submodules is proposed in this paper. Compared with the previous works, more practical issues have been considered, and the corresponding solutions have been provided. First, a new preset PWM signal mapping sequence and an improved virtual loop mapping (VLM) are used in the modulation. This method not only achieves a favorable capacitor voltage balance in the symmetry system but lowers the switching frequency of MMC's devices. Second, to further reduce the switching frequency, the unbalance margin of capacitor voltages is adopted to achieve the switching between the VLM and the selective VLM (SVLM). Moreover, the system robustness has been improved by considering the situation of symmetry losing, like cell fails; in these cases, the capacitor voltages of the upper and lower arms are balanced through the collaboration of the SVLM and the reconfigurable VLM. Finally, the effectiveness of the proposed method has been verified with simulation and experimental studies. [ABSTRACT FROM AUTHOR]

This paper proposes a hybrid modulation strategy for asymmetrical cascaded multilevel converters operating under normal and faulty conditions on power cells. The proposed algorithm explores the advantages of both space vector (SV) and carrier-based modulation approaches. An SV is used for higher voltage cells to properly choose their voltage vectors in a way such as to avoid converter saturation, particularly under fault conditions. A generic algorithm to identify the domains of higher voltage vectors in which a reference lies, without the need for separation lines, is proposed. Then, to simplify the implementation of the algorithm, carrier-based modulation is employed for lower voltage cells, which switch with pulsewidth modulation. This suppresses the need for defining multiple switching sequences for different operational conditions, and it avoids converter saturation as much as possible, particularly under fault conditions on power cells. Simulation and experimental results for normal and faulty operational conditions are given, validating the theoretical analysis and demonstrating the good performance of the proposed hybrid modulation approach. [ABSTRACT FROM AUTHOR]

For discontinuous conduction mode (DCM) dc–dc converters with digital sensorless current mode (DSCM) control, an observed current error occurs, owing to a low-accuracy current observer. Moreover, a reference current error occurs due to a low-accuracy current controller or a finite dc gain of current loop. Conventionally, the observed current is compensated to increase current regulation accuracy, whereas the reference current error is neglected. However, for charge balance principle (CBP)-based DSCM (CBP-DSCM) control, this paper proves that the reference current should be compensated in a same quantity to that of observed current. Otherwise, single or unequal compensation leads to output voltage steady-state error. For this reason, a dual current error compensation strategy for CBP-DSCM control is proposed. It compensates the errors in a same quantity through a current error observer, which considers parasitics and calculates the current errors without approximation. To verify the proposed strategy, small-signal models with parasitics for both the converter and the controller are constructed by differential functions of key variables. Furthermore, converter stability is analyzed at typical operation condition, while the stability at various operation conditions is verified through robustness analysis. Finally, simulations and experimental results verify the analysis and the improved transient response of the converter. [ABSTRACT FROM AUTHOR]

This paper investigates a dynamic voltage restorer (DVR) composed of two conventional three-phase inverters series cascaded through an open-end winding (OEW) transformer, denominated here DVR-OEW. The DVR-OEW operating with either equal or different dc-link voltages is examined. The proposed topology aims to regulate the voltage at the load side in the case of voltage sags/swells, distortion, or unbalance at the grid voltage. A suitable control strategy is developed, including space-vector analysis, level-shifted PWM and its equivalent optimized single-carrier PWM, as well as the operating principles and characteristics of the DVR. Comparisons among the DVR-OEW and conventional configurations, including a neutral-point clamped converter-based DVR, are furnished. The main advantages of the DVR-OEW compared to the conventional topologies lie on: 1) reduced harmonic distortion, 2) reduced converter losses, and 3) reduced voltage rating of the power switches. Simulated and experimental results are presented to validate the theoretical studies. [ABSTRACT FROM AUTHOR]

This paper introduces the application of a switched-diode-capacitor voltage accumulator (SDCVA) on conventional boost converter. This study aims to obtain two different kinds of multi-input step-up converters with high voltage gains, low component stresses, low ripples, simple control, and high conversion efficiencies: one is based on the parallel SDCVA and the other based on the serial SDCVA. The double-input step-up converter based on the parallel SDCVA and the double-input step-up converter based on the serial SDCVA are, respectively, taken as an example to do theoretical analysis, including operating principles and performance analyses when they work individually and simultaneously. The two proposed converters are implemented with a voltage closed-loop control at the switching frequency of 30 kHz. Experimental results obtained from the implemented prototypes are provided to validate the feasibility and effectiveness of the proposed converters. [ABSTRACT FROM AUTHOR]

In many grid-connected applications, a dc/dc switching converter is usually connected between the PV modules and the inverter. This paper presents an improved procedure to design a sliding controller for the PV system, which drives the PV voltage to follow a reference provided by an external MPPT algorithm and mitigates the perturbations caused by the irradiance changes and oscillations in the bulk voltage. By considering that the switching surface is the linear combination of the input capacitor current and the PV voltage error, the proposed design exhibits advantages in comparison with existing solutions that rely in the linearization of inner current loop dynamics. The proposed integral procedure, by taking also into account the effects in the closed-loop system dynamics of a reference filter, ensures a stable sliding regime in all the desired operation range of the system, while the settling time and overshoot of the PV voltage required by an MPPT algorithm are provided. Differently from a previous similar but less rigorous approach, the switching function and reference filter parameters are obtained by numerically solving a set of nonlinear equations. Simulations and experiments were used to demonstrate the efficiency of the proposed solution in presence of environmental and load perturbations. [ABSTRACT FROM PUBLISHER]

A new control technique for two-stage server power is proposed in this paper. The proposed technique will significantly reduce power consumption under the light-load condition. The basic idea of the proposed control technique is to control both the dc-link voltage of the power factor corrector (PFC) stage and the switching method of the full-bridge stage. Under the light-load condition, the output voltage of the PFC stage is no more fixed and is dynamically adjusted to significantly reduce the switching losses. Moreover, under the light-load condition, the full-bridge stage is with pulsewidth-modulation (PWM) and burst-mode control to reduce the circulating current losses. The former approach will reduce the switching losses due to the reduction of voltage across the power devices. The latter approach will dramatically reduce the circulating current losses caused by the phase-shift control method since phase-shift switching control is replaced by PWM switching control. Moreover, due to the reduction of the dc-link voltage, the switching losses for PWM and burst-mode control can be further reduced, as compared to those for fixed dc-link voltage. Experimental results of 480-W server power are presented. It is shown that the efficiency of the two-stage power converter can be improved up to 8% and 3.9% under light-load and 10% load conditions for \mboxinput voltage=110\ \mboxV, respectively. For the 220-V input voltage, the efficiency improvement using the proposed method is 6.4% and 4.2% under light-load and 10% load conditions, respectively. [ABSTRACT FROM PUBLISHER]

The discontinuous current mode boost power factor (PF) correction converter features a zero-current turn-on for the switch, no reverse recovery in diode, and constant frequency operations. However, when the duty cycle is constant in a line cycle, the input current contains rich third harmonic which has a phase difference of π with respect to the fundamental component. The harmonic results in not only a lower PF but also larger peak and RMS current values of the main power components, which lead to a higher conduction and switching turn-off loss. In this paper, a variable duty cycle control scheme is proposed to make the input current contain only third harmonic which is in phase with fundamental component, while remaining the same PF at a certain input voltage as that of constant duty cycle control. A method of fitting the duty cycle is further proposed for simplifying the circuit implementation. The efficiency is improved as the critical inductance increases and the peak and RMS current values consequently decrease. The proposed method also achieves an output voltage ripple or the output storage capacitance reduction. The experimental results from a prototype of 120 W are given to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a capacitor voltage balancing control applicable to any multilevel dc–ac converter formed by a single set of series-connected capacitors implementing the dc link and semiconductor devices, such as the diode-clamped topology. The control is defined for any number of dc-link voltage levels and converter legs (for single-phase and multiphase systems), guaranteeing the capacitor voltage control for any modulation index value and load (from idle mode to full power). The associated control loop small-signal transfer function is presented, from which optimum compensator design guidelines are derived. The improvement in control performance is verified through simulation and experiments comparing with a previous balancing control strategy in a four-level three-phase dc–ac conversion system. The satisfactory control performance is also verified through simulation in a four-level five-phase dc–ac conversion system. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) becomes attractive for high-voltage and high-power applications due to its high modularity, availability, and power quality. The voltage balance issue of capacitors is very important in the MMC, and balancing of the capacitor voltage is increasingly difficult as the switching frequency is reduced. In this paper, a voltage-balancing method is proposed for the MMC switched at grid frequency with reduced losses and does not rely on the arm current. By assigning the low-frequency pulses with different pulsewidths, the capacitor charge transfer in the MMC can be controlled for keeping the capacitor voltage balancing in the MMC. Simulations and experimental studies of the MMC are conducted, and the results confirm the effectiveness of the proposed capacitor voltage-balancing method. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel modulation technique and a new balancing control strategy for a single-phase five-level flying-capacitor (FC)-based active-neutral-point-clamped (ANPC) converter. The proposed modulator can control the FC voltage to follow the requested reference value and simultaneously generate the required ac output voltage regardless of the values of the dc capacitor voltages of the converter. By implementing this method, smaller values of the dc-link capacitor and FC can be used even in applications that could experience ripple or transient in the capacitor voltage. In a single-phase five-level ANPC converter applications, where the capacitors can experience pulsation power and dc-link balancing issues, such as grid-connected photovoltaic system, the selection of the reference voltage value for the FC can play an important role to balance the average values of the dc-link capacitor voltage. The proposed new control strategy uses a new reference voltage for the FC to be applied by the new modulator to have an average balanced dc-link voltages as well as an ac output voltage with good power quality. Simulation studies and experimental results demonstrate the effectiveness of the proposed modulation technique and control strategy even with relatively small dc capacitors to produce high-quality output voltage and current waveforms while maintaining an average balanced dc-link voltages. [ABSTRACT FROM PUBLISHER]

This paper presents a power factor correction (PFC)-based bridgeless Luo (BL-Luo) converter-fed brushless dc (BLDC) motor drive. A single voltage sensor is used for the speed control of the BLDC motor and PFC at ac mains. The voltage follower control is used for a BL-Luo converter operating in discontinuous inductor current mode. The speed of the BLDC motor is controlled by an approach of variable dc-link voltage, which allows a low-frequency switching of the voltage source inverter for the electronic commutation of the BLDC motor, thus offering reduced switching losses. The proposed BLDC motor drive is designed to operate over a wide range of speed control with an improved power quality at ac mains. The power quality indices thus obtained are under the recommended limits of IEC 61000-3-2. The performance of the proposed drive is validated with test results obtained on a developed prototype of the drive. [ABSTRACT FROM PUBLISHER]

Five-level active neutral-point clamped (5L-ANPC) converter is an attractive topology for high-power medium-voltage motor drives. This paper presents a capacitor voltage-balancing method for the 5L-ANPC converter, including the voltage balancing of dc-link capacitors and flying capacitors. In order to ensure that the series-connected or high-voltage switches of the 5L-ANPC converter are operated at fundamental frequency and the other switches are operated at a constant switching frequency, phase-shifted pulse width modulation is used to control this converter. The relationship between the average neutral-point current and zero-sequence voltage is investigated, and an optimum zero-sequence voltage is calculated to regulate the neutral-point potential. The voltage across the flying capacitor is also regulated by adjusting the switching duty cycles of two PWM signals, which varies the operation time of redundant switching states in each switching period. Simulation and experimental results are presented to verify the validity of this method. [ABSTRACT FROM AUTHOR]

This paper introduces a digitally controlled single-phase rectifier with power factor correction (PFC) based on a modified three-level boost converter topology. In comparison with the conventional boost-based systems, the new PFC rectifier has about three times smaller inductor and significantly lower switching losses. The improvements are achieved by replacing the output capacitor of the boost converter with a nonsymmetric active capacitive divider, with a 3:1 division ratio, and by utilizing the downstream converter stage for the capacitive divider's center-tap voltage regulation. The nonsymmetric voltage divider and applied switching sequence effectively provide four-level converter behavior using the same number of components as three-level converters. As a result, a 66% reduction of the inductor compared to the conventional boost-based PFC and a 33% compared to the standard three-level solutions operating at the same effective switching frequencies are also achieved. Experimental results obtained with a 400 W, 200 kHz, universal input voltage (85 Vrms-265 Vrms) PFC prototype demonstrate three times smaller inductor current ripple than that of the conventional boost converter allowing for the same inductor reduction. Efficiency improvements of up to a 6% are also demonstrated. [ABSTRACT FROM AUTHOR]

V2Ic is a ripple-based control with an excellent performance for load transients and reference voltage tracking because it exhibits a feedforward of the load current and the error of the output voltage. However, if V2Ic is modulated with constant frequency, constant on-time or constant off-time, its dynamic response is hindered by delays in the response. This paper proposes a technique that synchronizes the clock of the converter to initialize the duty cycle when a worst-case load transient occurs using the current through the output capacitor to detect load transients. It is exemplified on a V2Ic control but it is applicable to most of controllers as it only acts on the modulator. [ABSTRACT FROM AUTHOR]

This paper proposes a predictive control method with zero-sequence voltage injection to efficiently reduce the switching losses of three-phase voltage source inverters (VSIs). In the proposed predictive control method, three-phase future voltage references modified by a zero-sequence voltage injection are generated to clamp one of the three legs with the largest load current. Furthermore, the future zero-sequence voltage, which is produced online with the future voltage and current references in every sampling period, optimally adjusts the clamping duration on each leg, depending on the load angle. In addition, the proposed method selects the zero vector on the basis of the polarity of the future zero-sequence voltage to reduce the switching losses. Using a predefined cost function, the proposed predictive control scheme chooses one optimal voltage state closest to the future voltage references modified by the zero-sequence voltage injection. Therefore, the proposed predictive control method can perform load current control and minimize the switching losses of the VSI under any load condition regardless of the load angle. [ABSTRACT FROM AUTHOR]