Search

Since the DC-link of the dual-inverter two-stage matrix converter (TSMC) has no energy storage element, its grid-side current waveform is closely related to the load-side condition. The conventional modulation strategy of the dual-inverter TSMC is only the stack of the double inverters, without considering the cooperation between both modulation strategies. Thus, the fluctuations in the grid-side currents synthesized by both load-side currents will be obvious. To solve this problem, this paper analyzes the effect of the current pulse position on the grid-side current waveform quality, and relevant relationship between the pulse position and current harmonics is obtained according to Fourier transform. On this basis, the harmonic attenuation strategy for the dual-inverter TSMC is proposed. In the proposed strategy, the grid-side current harmonic is reduced based on the optimal duty-cycle combination, obtained from the harmonic optimization problem. The simulation and experimental results are provided to verify that the theoretical analysis of grid-side current harmonic content is consistent with the actual condition, and the proposed modulation strategy can effectively reduce the grid-side current harmonic. [ABSTRACT FROM AUTHOR]

This paper proposes a two-degree-of-freedom (2DoF) interleaving scheme based on phase-disposition (PD) PWM for minimizing the high-frequency zero-sequence circulating current (ZSCC) in modular interleaved three-level converters. The method incorporates an internal interleaving by phase-shifting the carriers in each individual converter, and an external interleaving by phase-shifting the carriers of the different converters. A general harmonic distribution analysis which is valid for all types of voltage source converters is carried out to simplify the evaluation of the proposed method. A comprehensive evaluation of the proposed method shows that the PD-2DoF interleaving scheme produces the lowest ZSCC maximum value as compared to existing approaches. Moreover, it can achieve comparable performances as existing methods do in terms of output quality and common mode voltage magnitude, showing a great potential for practical implementation. Simulation and experimental results are obtained to demonstrate the performance of the proposed method. Generalization of the 2DoF interleaving scheme to high-level converter is also discussed in this paper. [ABSTRACT FROM AUTHOR]

A novel pulsewidth modulation (PWM) scheme for the decoupled and coordinated control of two parallel connected split-phase induction machines is discussed in this paper for the first time. Both the motors are operated from a single six-phase voltage source inverter which acts as a power source, and two switched capacitor-fed auxiliary inverters to limit the flow of nontorque producing currents in each motor. Both the motors can be operated at its full rated power with low switching frequency, and decoupled control for full power range can be achieved with the proposed topology. This is possible because the individual machines do not carry the load/harmonic currents of other machine (unlike the conventional series or parallel connected systems). The converters can be modulated using sine-triangle PWM or space vector pulsewidth modulation (SVPWM). Furthermore, two different schemes of SVPWM techniques are proposed and compared in this paper. Exhaustive experimental results for all the modulation schemes are provided for steady state and transient operating conditions including start-up to validate the proposed topology and modulation schemes. [ABSTRACT FROM AUTHOR]

This paper investigates a Vienna rectifier as a charger for series-connected battery packs. Focusing on carrier-based pulsewidth modulation (CBPWM), the ripple current flowing through the neutral point (NP) results in the voltage oscillation if the loads are resistive. To reduce the ripple of average NP current with mitigated distortion under balanced and unbalanced dc-link voltages conditions, a novel CBPWM with segmented component injection scheme (SCIS) is proposed in this paper. After dc component injection, continuous intervals for optimized component injection and clamping intervals for compensation component injection are identified. Optimized components are calculated originally based on unbalanced factor to make the average NP current zero-size in one switching period. Moreover, unique compensation components generate suitable NP current to shape the sinusoidal input currents according to the circuit analysis. In consequence, the SCIS not only keeps the input current with low-harmonic distortion, but also minimizes the oscillation of dc-link voltage under balanced and unbalanced conditions. In addition, the value of the NP current during the clamping intervals is analyzed under various operating conditions. The effectiveness and the performance of the proposed SCIS are verified by simulation and experiments. [ABSTRACT FROM AUTHOR]

This paper presents a neutral-point deviation and ripple compensating control method applied to a three-level neutral-point-clamped (NPC) converter. The neutral-point deviation and its harmonic components are analyzed with a focus on the average current flowing through the neutral-point of the dc link. This paper also proposes a control scheme compensating for the neutral-point deviation and dominant harmonic components under generalized unbalanced grid operating conditions. The positive and negative sequence components of the switching functions and ac input currents are employed to accurately explain the behavior of three-level NPC converter. Simulation and experimental results are presented to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

The supply-side current of an inverter-fed induction motor (IM) is easily accessible and less affected by noises than the motor stator current. This paper proposes a novel sensorless speed estimation method for an IM using the spectrum of the supply-side current. However, due to the influence of fundamental supply frequency, it is difficult to carry out the speed detection straight from the supply-side current signal. In this paper, an analytic model for characterizing the supply-side current of an inverter-fed IM using the modulation theory and the switching function concept is developed. Then, the Hilbert transform is applied to extract the speed harmonic component from the supply-side current. Finally, an interpolated Goertzel algorithm is put forward to enhance the estimation precision of IM speed. The performance of the proposed sensorless speed estimation method is proved by the speed estimation results obtained from hardware experiments of an IM fed by an inverter under different load conditions. [ABSTRACT FROM AUTHOR]

When the permanent magnet synchronous motor (PMSM) works in the high-speed region with low carrier ratios, the performance of the rotor flux observer has a great influence on the loading capacity and stability of the speed sensorless vector control system. The problem of the adaptive compensation flux observer (ACFO) of the PMSM at low carrier ratios is analyzed in this paper, and an ACFO with a feedback delay component is presented. After retuning the PI regulator parameters, the new expression related to carrier ratio is obtained, which can improve the performance of the flux observer at low carrier ratios and make the torque and current loop response faster. Meanwhile, the stability of different Euler approaches of the integrator for ACFO in the discrete domain is analyzed, and a new Euler with a coefficient is proposed to combine the merits of the backward Euler and the trapezoid Euler. It shows better performance at low carrier ratios. Finally, the effectiveness of the discrete ACFO is verified by experiments. [ABSTRACT FROM AUTHOR]

This paper presents Space Vector Modulation (SVM) sequences that reduce Common Mode Voltage (CMV) in Dual Three-phase Asymmetrical Induction Motor (DTAIM). At first, two existing SVM techniques such as Reference SVM (RSVM) and CMV1 are studied. Additionally, three new switching sequences are developed as CMV2, CMV3 and DCMV3, which reduce peak magnitude of CMV by 66.8% in comparison with RSVM technique. In SVM techniques, to obtain least CMV, zero vectors are usually replaced by two opposite large Active voltage Vectors (AV) with equal time duration. In such topologies like CMV1, total six AVs are utilized to synthesize the reference vector. The proposed SVM technique CMV2 utilizes only five large AVs to synthesize the reference vector and reduces CMV. Selection of five neighbouring AVs is reflected in reduction of harmonic flux trajectories and stator current ripple in proposed techniques. Additionally, two more switching sequences (CMV3 and DCMV3) are developed related to utilization of specific zero voltage vectors in all sectors (7 and 56) that produce zero CMV. These two switching sequences also provide easy implementation feature during the development of c-code program. In this study, CMV and stator current ripple are considered as performance parameters for different SVM techniques. All SVM techniques are analysed by analytical results, computer simulations, and using prototype test setup of DTAIM fed by Dual Three-phase Voltage Source Inverters (DTVSIs). [ABSTRACT FROM AUTHOR]

This paper deals with the estimation of parameters of a Thevenin equivalent in an AC grid. We consider the practically relevant case of measurements coming from a grid-connected inverter. Our focus is on non-intrusive measurements, as we postulate and later experimentally observe transients that occur in normal operation as the primary source of information. We notice that even during quiet, after work hours there are typically enough variations in the grid to enable successful convergence of our procedure. For completeness, we also consider the artificial case of no external variations and show that injection of very small current perturbations suffices for convergence. Our procedure is based on real-time monitoring of the estimated determinant of the regression matrix. Regression matrix properties are also used to evaluate the integrity of the estimates and to initiate a brief sequence of perturbation in rare cases of the exceptionally restful grid. The estimation algorithm is simple enough to be implementable on standard industrial controllers, yet robust and reliable in terms of speed of convergence. [ABSTRACT FROM AUTHOR]

This paper presents an investigation into sideband vibro-acoustics suppression of the permanent magnet synchronous motor (PMSM), associated with several periodic signal-based dithering modulations. Mathematical derivations of four typical periodic signal-based schemes are deduced with the power spectral density (PSD) method. The individual modulation parameters, such as bandwidth and modulation ratio, are determined the values to minimize the sideband vibro-acoustics. The frequency distributions of the sideband components are discussed by the analytical derivations. The relationship between the electromagnetic components and mechanical responses is reconstructed by coupling with temporal features. For verification, the experimental tests with a prototype PMSM are introduced under different operational conditions. According to the results and figures, both magnitude suppression and frequency distribution are accurately correlated with sideband harmonic components as well as vibro-acoustic responses. This investigation thus clearly holds promise for the evaluation and optimization in powertrain used by electric vehicles. [ABSTRACT FROM AUTHOR]

This paper proposes a single-phase ac–dc–ac converter composed of a transformer and two three-leg converters connected in series. The proposed converter allows to supply the load with a voltage with constant amplitude and frequency, and to operate with the grid current with low harmonic distortion and high power factor. In addition, the converter can be used to mitigate fundamental overvoltage and voltage harmonics at the grid. The system model, regions of operation, a power flow analysis, and a method to regulate the dc-link voltages using the voltage vector redundancies are given. In the first version of this paper, two pulsewidth modulation (PWM) techniques (including space vector PWM) and a control system were provided. The proposed topology is compared with two conventional systems in terms of operation range, harmonic distortions, and semiconductor losses. Simulation and experimental results are provided to validate the feasibility of the system. [ABSTRACT FROM AUTHOR]

In a three-stage cascaded modular solid state transformer (CMSST), unbalanced dc bus voltages at the output of cascaded multilevel rectifier is a common issue due to inevitable parameter mismatch in stage-2. To balance the dc bus voltages, either voltage balance control (VBC) in stage-1 or power balance control (PBC) in stage-2 is necessary. In this paper, an in-depth theoretical analysis to investigate the input power quality of the CMSST in the presence of voltage and PBC schemes is presented. The grid-side multilevel voltage of the CMSST is analyzed to highlight the limitation of using VBC in stage-1. It is then mathematically proven that the switching frequency based harmonics in the grid current are significantly reduced by using the PBC in stage-2. Simulation studies of a 3.3-kV, 50-kVA CMSST are carried out using the PLECS software to substantiate the proposed analysis. Experimental verifications are performed on a 750-VA single-phase CMSST laboratory prototype for a 20% parameter mismatch in stage-2. It is found that the grid current total harmonic distortion (THD) is reduced from 6.65% to 3.8% at 50% load by using PBC in stage-2. This paper provides guidelines for the designer to choose appropriate balance controllers for the CMSST. [ABSTRACT FROM AUTHOR]

The six-phase asymmetrical induction motors (SPIMs) are employed for high power medium voltage drive due to its attractive features of reduced stator copper loss, lower torque pulsation, higher torque per ampere, and higher reliability. In this paper, analysis of carrier-comparison-based pulse width modulation (PWM) techniques namely sinusoidal PWM and double zero-sequence injection PWM are carried out from a space vector perspective. Furthermore, new space vector pulsewidth modulation (SVPWM) techniques are developed by modifying the switching sequences of carrier-based PWM techniques. A comprehensive analysis of these PWM techniques is carried out in terms of harmonic flux trajectories, squared harmonic flux, and harmonic distortion factor (HDF). As a result, modified SVPWM technique namely 6ΦSVM3 is found superior to aforesaid PWM techniques, which significantly reduces HDF and provides lower current total harmonic distortion (THD). The experimental results of aforementioned PWM techniques are obtained and verified from six phase asymmetrical induction motor fed by dual two-level 3ΦVSIs. This paper is also accompanied by a video file of experimental test setup recorded while 6ΦSVM2 is running on SPIM. [ABSTRACT FROM AUTHOR]

The circulating current of modular multilevel converter (MMC) has a great impact on the power losses, the submodule (SM) capacitor voltage ripples, and the rating of power devices. Existing analysis of circulating current has considered the capacitor voltage and the modulation signal. In this paper, the effect of semiconductor devices on the circulating current is further presented. In order to realize the different circulating current injection targets under different conditions, a unified online calculation scheme by using the instantaneous information of MMC is proposed in this paper to generate the circulating current injection references. It avoids detecting the amplitude and phase of the output current or using an extensive lookup table. Besides, a mathematical analysis model is built and it reveals the impact on the capacitor voltage ripple and the rms value of arm current with different injection references, thus guide the determination of the injection ratio. Experimental results based on a three-phase MMC prototype with six SMs per arm are presented to demonstrate the analysis of circulating current and the proposed circulating current injection references generating method is verified by different circulating current control targets with different loads. [ABSTRACT FROM AUTHOR]

Induction motor drives operated with a low ratio of the switching frequency to the fundamental frequency (i.e., pulse number) are prone to have high magnitudes of low-order torque harmonics. This paper proposes a method to analytically evaluate the harmonic torque spectrum based on the pulsewidth-modulated voltage waveforms for low pulse number operation. The predicted torque harmonic spectra for different pulsewidth-modulated waveforms are validated through simulations and experiments. This paper also reports optimal switching angles to minimize the total rms value of torque harmonics of order 6, 12, 18 $,\dots,$ $6(N-1)$ , considering the number of switching angles per quarter ($N$) to be 4 and 5. Compared to sine triangle pulsewidth modulation and selective harmonic elimination pulsewidth modulation with the same pulse number, the proposed optimal switching angles significantly reduce the total rms value of all harmonic torques of order lower than $6N$. Extensive simulation and experimental results on a 3.7-kW induction motor drive are presented to demonstrate the superior performance of the proposed optimal pulsewidth modulation. [ABSTRACT FROM AUTHOR]

Grid-interactive inverters allow distributed generation units to provide various ancillary services in microgrids. As the linear modulation region of inverters is restricted by the dc-bus voltage, providing ancillary services may drive the fundamental positive-sequence inverter voltage to the overmodulation region. Therefore, to operate in the linear modulation region the maximum active- and reactive-power of the inverter may have to be reduced unless pulsewidth modulation (PWM) references are adjusted. In this paper, an atypical PWM method is proposed for maximizing dc-bus utilization of grid-interactive two-level voltage source inverters (2L-VSI) providing ancillary services. Two important ancillary services, i.e., negative-sequence compensation and harmonic compensation are considered in this paper. The proposed method increases the maximum active- and reactive-power that a 2L-VSI can deliver when providing ancillary services by injecting a common-mode component in the references computed based on instantaneous reference magnitudes. The validity of the proposed technique is verified through simulation, as well as experimental data obtained using a 208-V three phase grid-connected 2L-VSI. [ABSTRACT FROM AUTHOR]

This paper proposes a novel discontinuous pulse-width modulation (DPWM) method to reduce the current harmonics and improve the system efficiency for a single-phase three-level neutral-point clamped inverter. In single-phase inverters, the unipolar pulse-width modulation (UP-PWM) method is commonly used. However, this method has the disadvantage of power losses due to numerous switching operations. Conventional DPWM methods reduce the power losses and improve efficiency but increase the current total harmonic distortion (THD). To overcome these weaknesses, this paper proposes a hybrid DPWM switching method combining two PWM methods: the UP-PWM method and the conventional DPWM method called one-pole clamped PWM method. Since the proposed DPWM method offers all the advantages of both PWM methods, the optimal performance—with regard to the power losses and current THD—is obtained. The combination of two PWM methods is investigated by analyzing the power losses and current THD. Based on the analysis, the process determining the optimal operating condition is introduced. The effectiveness of the proposed DPWM method is demonstrated through simulations and experiments. [ABSTRACT FROM AUTHOR]

This paper presents a quantitative analysis of the losses of the hybrid cascaded modular multilevel converter (HC-MMC). Regulation of full-bridge (FB) submodule-capacitor voltages in an HC-MMC requires dedicated strategies that affect the voltage harmonics generated by the converter's main power stage and hence its switching patterns and losses. This paper uses an electromagnetic transient simulator (PSCAD/EMTDC) to estimate the semiconductor losses using the switches’ turn-on and turn-off characteristics. The paper examines the losses of a 45-MW HC-MMC for two recently introduced voltage-regulation methods based upon the modified sinusoidal pulse width modulation (PWM) and an existing method based upon the trapezoidal PWM. Losses of a conventional FB-MMC that offers dc-fault blocking capability are also investigated and compared with those of HC-MMC. The loss comparison results indicate that: first, the two voltage-regulation methods for HC-MMC based upon the modified sinusoidal PWM result in markedly lower semiconductor losses than the trapezoidal PWM method; second, compared with the original HC-MMC, a mixed submodule HC-MMC may lower the semiconductor losses at certain operating points with proper addition of mixed submodules; and finally, HC-MMC may have up to 9.0% lower semiconductor losses (relative) than the conventional FB-MMC. [ABSTRACT FROM AUTHOR]

This paper analyzes the performances of different carrier phase-shifting pulse width modulation (PWM) techniques to be used with a multilevel cascaded H-bridge converter in case of unbalanced operational conditions. In fact, in many practical applications, the ideal condition of equal dc voltages and equal reference signals for each H-bridge cannot be achieved. In such conditions, the conventional carrier phase-shifting PWM technique loses its harmonic canceling capabilities and then the multilevel ac voltage harmonic quality is deeply affected. To overcome this limit of the original technique, different variations have been proposed. All of them still rely on the carrier phase-shifting concept and propose to use a different value of the shifting angle for each carrier (unlike the original technique) whenever unbalanced operational conditions occur. In this paper, the three main solutions proposed over the last years to extend the capabilities of the carrier phase-shifting PWM technique are compared. The analysis is focused on a three-cell cascaded H-bridge converter. Simulation and experimental results are presented. [ABSTRACT FROM PUBLISHER]

This paper presents a novel multilevel radio frequency (RF) pulsewidth modulation (PWM) method for all-digital transmitters (ADTx) that actively eliminates the selected harmonics of RF-PWM. Compared with existing multilevel RF-PWM techniques, this method uses several adaptive thresholds and controls the pulsewidth of the corresponding subpulses to make the selected harmonics cancel each other out and keep the fundamental frequency component proportional to input envelope. For the third-harmonic elimination, the corresponding five-level RF-PWM scheme presented in this paper shows that it can significantly relax the filtering requirements and improve the wideband performance of the ADTx. The proposed scheme is verified by extensive simulations and offline measurements. The simulations show good potential for high-frequency operation up to gigahertz ADTx. The measured results show that the third-harmonic suppression of the proposed scheme has increased with the decreasing of the time resolution for digital implementations. For a 3.80-dB peak-to-average power ratio (PAPR) QPSK signal and a 6.04-dB PAPR 16QAM signal at 200-MHz carrier, the proposed scheme can achieve above −51- and −48-dBc third-harmonic suppression, respectively, when the time resolution is 50 ps and relative time resolution is 1%, and improves above 30 dBc to the existing schemes. [ABSTRACT FROM AUTHOR]

High-frequency components of acoustic noise radiated by the electric powertrain make the subjective perception of electric vehicles worse than expected under certain operating conditions. In order to investigate the influence of acoustic components on sound quality, a pulse width modulation (PWM)-fed electric powertrain is studied in this paper. First, the acoustic noise of the electric powertrain is collected in a semianechoic chamber. Then, two types of acoustic components of the electric powertrain, namely harmonic order noise and switching noise, are distinguished through the analyses of supplied current from the inverter and gear vibration. Furthermore, the relationship between subjective perception and spectral characteristics of the noise is discussed, based on which sensitivity is established. Subsequently, the contributions of acoustic components to psychoacoustical parameters are determined. After that, a sound quality model of the acoustic noise radiated by the electric powertrain is established. The comparison between jury test and prediction shows that the established model can be used for sound quality evaluation of the electric powertrain. Finally, the influences of harmonic order noise and switching noise on subjective perception are discussed. The main original contribution of this paper concerns the influences of harmonic order noise and switching noise radiated by PWM-fed electric powertrain on sound quality. [ABSTRACT FROM PUBLISHER]

This paper presents the study of an offline flyback-based light-emitting diode (LED) driver with reduced storage capacitance. An approach called active ripple compensation was used for minimizing the converter bulk capacitance. This technique is oriented to voltage-controlled pulse width modulation converters and is based on the modulation of the duty cycle, which allows for the reduction of the filtering capacitance by increasing the harmonic content of the input current up to the limits established by the standards. By means of the design procedure presented in this paper, the amount of capacitance reduction and input current distortion can be fully controlled and theoretically predicted. In addition, no extra sensors are required to implement the proposed technique, apart from the LED current sensor already available in most LED drivers. Experimental results from a 50-W laboratory prototype supplied from a 220-V 60-Hz grid were carried out. The results were compared with the conventional approach, attesting the superior performance of the proposed methodology. [ABSTRACT FROM AUTHOR]

Neutral-point-clamped (NPC) multilevel inverter fed high power drives operating at low switching frequency are prone to low-order torque pulsations. For a case of N switching angles per quarter, apart from maintaining the fundamental component, (N-1) voltage harmonics can be eliminated. Consequently, \fracN-12 or lower number of torque harmonics could be eliminated. This paper proposes an optimal pulse-width modulation (PWM), which minimizes the combined root mean square (RMS) value (\tau RMS ) of torque harmonics of order lower than $6N$ at any modulation index (M$) for an induction motor drive fed from an NPC three-level inverter. This paper considers cases of two, three, and four switching angles per quarter cycle of the pole voltage. Compared with synchronized sine-triangle PWM and selective harmonic elimination (SHE) PWM, the proposed PWM reduces the first (N-1$ ) torque harmonics (i.e., \tau _6 ) over a wide speed range. Simulation and experimental results are presented on a 3.7-kW open-loop constant volts-per-Hertz induction motor drive. [ABSTRACT FROM PUBLISHER]

This paper presents the design process of a sensorless-oriented interior permanent magnet synchronous motor (IPMSM). The motor uses spatial saliency for the position-sensorless traction drive in a hybrid electric vehicle (HEV). The sensorless control consists of two signal-injection techniques to achieve wide-torque-range operation at low speed. Realization of a stable sensorless drive necessitates a design capable of expanding the transition region between the two techniques. This paper describes our proposed design methods that can achieve the self-sensing capability while retaining the required torque-speed capability. Finite element analysis is used to evaluate both the self-sensing capability and the torque-speed capability. Under the restricted specifications of dimensions and requirements, the 350 N·m-36 kW IPMSM is optimally designed for HEV applications. The validity of the proposed design method and the expected drive characteristics are experimentally verified by using the prototype. [ABSTRACT FROM PUBLISHER]

This paper proposes an active switching harmonic current reduction method within the dc-link capacitor of two-level, three-phase, back-to-back converters. This method is based on the derived analytical solution for switching harmonic currents in the dc-link. It is shown that by controlling the pulse width modulation carrier waveform's phase angles, the harmonics in the second carrier band of the rectifier and the inverter can be synchronized such that cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. The feasibility of the proposed approach has been verified experimentally and results are presented in this paper. [ABSTRACT FROM PUBLISHER]

This paper proposes a comprehensive analytical LCL filter design method for three-phase two-level power factor correction rectifiers (PFCs). The high-frequency converter current ripple generates the high-frequency current harmonics that need to be attenuated with respect to the grid standards. Studying the high-frequency current of each element proposes a noniterative solution for designing an LCL filter. In this paper, the converter current ripple is thoroughly analyzed to generalize the current ripple behavior and find the maximum current ripple for sinusoidal pulse width modulation (PWM) and third-harmonic injection PWM. Consequently, the current ripple is used to accurately determine the required filter capacitance based on the maximum charge of the filter capacitor. To choose the grid-side inductance, two methods are investigated. First method uses the structure of the damping to express the grid-side filter inductance as a function of the converter current ripple. Reducing the power loss in the filter and optimizing the grid-side filter inductance is the main focus of the second method which is achieved by employing line impedance stabilization network (LISN). Accordingly, two LCL filters are designed for a 5 kW silicon-carbide-based three-phase PFC. Various experimental scenarios are performed to verify the filters attenuation and performance. [ABSTRACT FROM PUBLISHER]

High dc voltage utilization is one of the important requirements in a three-phase inverter. Under some carrier-based pulse width modulations (PWMs), the dc voltage utilization can reach the same maximum as that under the space vector modulation. But the third harmonic component of common-mode voltage (CMV) will be increased markedly while using these carrier-based PWMs in inverters. To improve the situation, this paper proposes that a midpoint-fluctuation carrier (MFC) scheme should be used in the three-phase inverter. The MFC is formed by adding a midpoint-fluctuation signal on the standard symmetrical triangular carrier. By analyzing the linear modulation region of the midpoint-fluctuation signals, a minimum fluctuant signal in the linear modulation region is designed in the paper. Compared with the use of other conventional schemes in the three-phase inverter, the use of minimum MFC scheme has higher fundamental amplitude in the output line voltage and smaller magnitude of the third harmonic in the CMV. The feasibility and validity of the MFC are proved by experiment results in a three-phase inverter. [ABSTRACT FROM PUBLISHER]

This paper presents a new feed-forward strategy for suppressing low-order harmonic circulating currents in pulsewidth-modulated (PWM) based modular multilevel converters (MMCs). The approach is based on the new average model approach established in this paper, which identifies cross-coupling interactions between the system-level and submodule elements using decomposed dependent sources. As well as improving the damping of the system, the major advantage of this approach is that it maintains the natural DC bus balance property of a PWM modulated MMC by considering the upper and lower arms together (unlike existing feed-forward schemes which treat each MMC arm independently). Moreover, unlike existing direct control resonant strategies, which require careful gain tuning and are highly dependent on the ac system frequency, the proposed approach achieves wideband circulating current ripple suppression without requiring knowledge of the circulating current harmonic frequencies and needs only a simple proportional–integral (PI) controller to regulate the circulating current dc component for power balance. This makes it particularly suitable for use in multifrequency or variable-frequency ac systems. Extensive simulation and matching experimental results, including steady-state and transient responses compared against existing circulating current suppression approaches, validate the effectiveness and benefits of this new feed-forward compensation technique. [ABSTRACT FROM PUBLISHER]

This paper analyzes synchronization strategy for cascaded H-bridge multilevel inverter (CHBMLI) topologies with a carrier-based sinusoidal phase-shifted pulse width modulation (PSPWM) technique. In the PSPWM technique, a separate carrier is used for each H-bridge (HB). The carriers are generally phase shifted from each other by π /x rad (x = No. of HBs) for unipolar PWM. With the carrier frequency being an integer (odd/even) multiple of the fundamental frequency, it is observed that the positions of zero crossings of the carriers with respect to the zero crossings of voltage references play an important role for maintaining quarter-wave symmetry among multilevel inverter pole voltage waveforms. This paper analytically shows the conditions for half-wave symmetry and quarter-wave symmetry and experimentally verifies those conditions for the PSPWM technique with a five-level CHBMLI laboratory prototype. [ABSTRACT FROM PUBLISHER]

The performance of modular multilevel converters (MMCs) in medium-voltage applications, where the number of required submodules is not high, can be improved utilizing low switching frequency modulations such as (2N+1) selective harmonic elimination-pulse width modulation (SHE-PWM), which provides tight control of lower order harmonics and low switching losses. This paper proposes a calculation method, which is based on a novel formulation, to solve the SHE-PWM problem. In particular, MMCs with (2N+1) phase output voltage levels are considered, obtaining a (2N+1) SHE-PWM waveform. This method utilizes a unique system of equations that is valid for any possible waveform. Therefore, it is able to calculate simultaneously, without predefined waveforms, both the switching patterns and the associated firing angles that solve the (2N+1) SHE-PWM problem. Consequently, the search process is simplified and optimized. Furthermore, this paper also proposes a circulating current control technique, which can be applied along with (2N+1) SHE-PWM without disturbing the phase output voltage. Simulation results and experimental tests obtained with a single-phase laboratory prototype prove the validity of the novel (2N+1) SHE-PWM implementation method and the proposed circulating current control technique. [ABSTRACT FROM PUBLISHER]

This paper discusses and compares phase-shifted pulse-width modulation (PS-PWM) and level-shifted PWM (LS-PWM) in a modular multilevel single-delta bridge-cell (SDBC) inverter for utility-scale grid-tied photovoltaic applications. This three-phase SDBC inverter provides the capability of operating even under power-distribution imbalances not only among three clusters, but also among cascaded bridge cells in each cluster. The main focus of this research lies in analyzing the capability of operation under severe power-distribution imbalances and presenting power-balancing methods based on zero-sequence current injection, which result in an extended power-balancing capability. This paper highlights that LS-PWM is superior to PS-PWM in both power-balancing capability and harmonic performance at the ac side of the SDBC inverter when operating under power-distribution imbalances. Experimental results obtained from a three-phase 10-kW downscaled system show good agreement with those from the theoretical analysis. [ABSTRACT FROM AUTHOR]

The selective harmonic current mitigation pulsewidth modulation (SHCM-PWM) technique can be used in cascaded multilevel converters to extend the harmonic reduction spectrum, reduce the coupling inductance and increase the efficiency. The offline SHCM-PWM technique has small number of switching transitions as its switching angles can only change once in a fundamental cycle and relatively long time delays because it uses FFT. As a result, its dynamic response has a lot to desire. As it will be proven in this paper, in four-quadrant power converters, to have a good transient dynamic response, both active and reactive power must be controlled at least two times in a fundamental cycle. In this paper, a hybrid modulation technique is introduced. The proposed technique uses SHCM-PWM under steady state and phase-shift PWM (PSPWM) under transient. In addition, in order to extend the modulation index range and ensure that SHCM-PWM can process four-quadrant active and reactive power, the constraints of the switching angles for the SHCM-PWM are modified. Simulations and experiments are conducted on a seven-level cascaded H-bridge converter to verify the proposed technique. [ABSTRACT FROM PUBLISHER]

Wide bandgap semiconductor switches have been increasingly utilized to improve the power density and efficiency of power converters, as such devices are able to operate at very high frequencies, e.g., up to 100 MHz, with reduced power losses. However, such a high-frequency operation may impose a challenge to the digital control system, and the system clock frequency should be up to 100 GHz in high-precision applications, which is difficult to realize in low-cost microprocessors. Instead of using extremely high-frequency clocks, preprocessing-based solutions that utilize digital pulse-width-modulated (DPWM) dither techniques can also enhance the DPWM resolution with moderate frequency clocks. Unfortunately, this is usually achieved at the expense of introducing low-frequency harmonics, which may complicate system controller and output filter design. In this paper, an optimal dither technique is proposed to enhance the resolution of DPWM power converters. The concepts of positive dither and negative dither are first proposed in this paper. Furthermore, vector-diagram-based analysis indicates that with proper utilization of positive dithers and negative dithers and carefully selected dither sequences, the lowest order harmonic introduced by the conventional dither technique can be completely eliminated when the dither period is multiples of six switching periods. In other cases, the proposed optimal dither technique can produce minimized lowest order harmonic. Finally, experimental results obtained from a Gallium Nitride (GaN) devices-based synchronous buck converter validate the feasibility of the proposed dither technique. [ABSTRACT FROM PUBLISHER]

Under the unbalanced condition of grid voltages, the second-order harmonic voltage ripple will appear on the DC bus of the three-phase PWM rectifier due to the existence of the negative sequence voltages. In addition, the total harmonic distortion (THD) of the grid currents will increase correspondingly. In this paper, the coupling mechanism between the DC bus voltage ripple and the grid harmonic currents is revealed. Based on the situation above, a grid harmonic current suppression method is proposed. Compared with existing methods, the proposed method has the advantages in the following three aspects. Firstly, the proposed method does not require either the extraction of positive/negative sequence or the positive/negative sequence current control, which can highly reduce the complexity of the system. Secondly, the grid current harmonics can be reduced by an improved proportional quasi resonant (IPQR) controller. Thirdly, the IPQR controller has little effect on the parameter design of the control system, which facilitates the control design. Finally, the experiments show the accuracy of the theoretical analysis and the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

The advancement in modulation strategies brings emergent solutions to suppress the leakage current in three-phase two-level transformerless grid-connected voltage source inverters (VSIs). However, most of the techniques are analyzed based on reduced common-mode voltage pulsewidth modulation (PWM) in motor drivers but fail to satisfy the specific requirement of grid-connected applications, such as wider power factor operation and lesser current distortion. To overcome such substantial drawbacks, this paper proposes a novel scalar PWM method for transformerless grid-connected VSIs. First, presented through a generalized scalar approach with unified zero-sequence voltage generation, the method is simple to implement and favored in practice. Besides, systematic and comprehensive mathematical analysis is illustrated to exhibit the validity of implemented method in reducing leakage current and shows its advantages over whole power factor range in terms of dc-link current harmonic, output current quality, and switching losses. Finally, simulations and experimental results are carried out to verify the effectiveness and superiority of the proposed method. [ABSTRACT FROM AUTHOR]

Negative- and zero-sequence internal currents of a modular multilevel converter (MMC) under unbalanced ac-grid conditions can increase the peak voltage of the submodule (SM) capacitors, which should be kept below a maximum voltage limit. This paper investigates the impact of offset pulsewidth modulation (OPWM) and zero-sequence voltage injection on reducing peak SM capacitor voltages of the MMC during unbalanced ac-grid conditions. It is demonstrated that OPWM extends the operating range of the MMC for a given set of restrictions, as it leads to a reduction of capacitor voltage in every phase by utilizing all the SMs in the arms. Zero-sequence voltage injection further reduces the maximum SM capacitor voltage among three phases under certain conditions. Simulation results from an 800-MVA MMC-based high-voltage direct current transmission system demonstrate the effect of OPWM in the operation of the converters and the efficacy of the method compared to standard modulation methods. [ABSTRACT FROM AUTHOR]

Cascaded multicell converter (CMC) is one of the effective solutions for medium-voltage high-power drives. The inability to regenerate power back to the source is one of the limitations of this converter. The regeneration capability is obtained by using a pulsewidth-modulated active rectifier instead of a conventional three-phase passive rectifier in each cell. However, due to their two-level voltage operation at the input side, an inductor is required for each cell to filter out the switching frequency components from the input current. This paper proposes a new configuration of regenerative CMC based on coupled inductor to achieve multilevel voltage at the transformer secondary terminals. This allows us to operate the rectifier devices at reduced switching frequency. The coupled inductor reduces the total harmonic distortion (THD) of the transformer secondary current and thus the transformer size. The size of the filter inductor and the transformer ratings are compared. The operating principle and the detailed analysis are presented. A technique to bypass a faulty module is proposed. The working of the converter is verified through simulation and experimental studies. [ABSTRACT FROM AUTHOR]

In motor drive system, ear-piercing acoustic noise caused by high-frequency vibration from motor becomes unacceptable in sensitive environments, due to the application of pulsewidth modulation (PWM) and consideration of switching losses. In this paper, a novel method which associates a presented dual three-phase permanent magnet synchronous motor (PMSM) called dual-branch three-phase PMSM with carrier phase-shift technique is implemented to completely reduce odd-order PWM frequency vibration. The proposed motor has two no phase-shift three-phase windings, whose coils wind on the same teeth; it is driven by paralleled inverters with magnetically coupled inductors. With carrier phase shifting $\pi $ , the odd-order carrier frequency current harmonics with the identical amplitude in two windings are opposite in phase, and therefore the produced magneto-motive-force (MMF) harmonics in the air gap offset with each other. The experimental results are provided to verify the validity of the proposed method in vibration reduction. Compared with the previous work of vibration reduction for dual three-phase PMSMs, the proposed method can achieve total elimination of odd-order PWM frequency vibration. [ABSTRACT FROM AUTHOR]

In voltage-source converter (VSC) systems, utilization of filter inductors with deep saturation characteristics is often advantageous due to the improved size, cost, and efficiency. However, with the use of conventional current regulation (CCR) methods, the inductor saturation results in significant dynamic performance loss and poor steady-state current waveform quality. This paper proposes the inverse dynamic model (IDM)-based compensation method to overcome these performance issues. The method converts the nonlinear inductor of the plant to a fictitious linear inductor such that linear current regulators can perform satisfactorily. In conjunction, identification of L–R parameters is performed to obtain IDM of the system within an acceptable range of sensitivity yielding satisfactory performance. The performance issues of CCR methods with saturable inductor are demonstrated by simulations and experiments. Then, the proposed method is experimentally verified on a single-phase 1.5-kW grid-connected VSC. The performance improvement over the CCR methods is verified by a detailed comparison of experimental waveforms. [ABSTRACT FROM AUTHOR]

In the conventional direct power control (DPC) methods, the grid currents are highly distorted, and substantial ripple is present in the dc-bus voltage under unbalanced and distorted grid conditions. Various improved DPC methods have been proposed to address these problems, but these methods are generally complicated and not easy to use because of the complex controlling structures, need for considerable tuning, and so on. This paper proposes an improved DPC method obtained by simply adding a compensation term to the original power references. The compensation power is obtained by analyzing the power ripple in the input line inductance based on extended power theory. The reference voltage vector is subsequently calculated from the new power reference and synthesized by space vector modulation. To improve the robustness of the proposed DPC against inductance variations, an online inductance identification technique based on the gradient correction method is proposed and combined with the proposed DPC. The presented simulation and experimental results demonstrate that the proposed method can achieve sinusoidal grid currents and significantly reduce the dc-voltage ripple even with mismatched inductance under unbalanced and distorted grid conditions. [ABSTRACT FROM AUTHOR]

The pole-phase modulated induction motor (PPMIM) drives facilitate the extended range of speed-torque characteristics, which is an essential requirement for traction and electric vehicle applications. For getting the wider speed-torque variations, $15-\Phi $ PPMIM drive is analyzed, which is capable to operate at 2-pole 15-phase, 6-pole 5-phase, and 10-pole 3-phase modes. In these pole-phase operations, in high-phase and low-pole mode of operation, the increment in the linear modulation range with space vector pulsewidth modulation (SVPWM) is not significant. In the low-phase and high-pole mode of operation, there will be higher torque ripples due to the higher magnitude of space harmonics. In this paper, these issues are addressed by using carrier phase-shifted SVPWM (CPS-SVPWM) and phase grouping concepts. In low-pole operation, the linear modulation is enriched by using conventional $3-\Phi $ SVPWM to drive 15-phase machine by appropriately reorganizing the phase winding connections. Similarly, in 6-pole 5-phase mode of operation, the linear modulation range of PPMIM drive is enriched by using $5-\Phi $ SVPWM. It is known that in high-pole mode of PPMIM drive operation, each effective phase is formed by the multiple number of equal voltage potential coils (EVPCs), which are electrically in phase. The carriers of these EVPCs per phase are phase shifted by an appropriate angle to minimize the harmonics in the effective phase voltage, which results in better torque ripple profile. In addition, the detailed comparison of three possible different CPS-SVPWMs is presented, with their pros and cons for selecting the proper carrier phase shift angle. The performance of the proposed scheme has been validated by ANSYS Maxwell two-dimensional as well as laboratory prototype on 5-hp, $15-\Phi $ PPMIM drive. [ABSTRACT FROM AUTHOR]

AC current regulators are susceptible to controller windup, i.e., the condition in which the controller dynamic states ramp the controller output up to very large values when the commanded reference cannot be achieved because of inverter saturation. Recovering from saturation can take considerable time once the linear mode has been restored, which degrades the current regulator's transient performance and can also impact on its stability. This paper proposes an improved formulation using the concept of signal conditioning, where windup is avoided by feeding the controller states entirely from the constrained inverter pulsewidth modulation command. Unlike previous approaches, this technique has the benefit of a simplified realization, since the controller transfer functions do not require algebraic reformulation. This makes it particularly suitable for multiple cascaded resonators used in harmonic compensation systems. The technique has been validated using simulation and experimental investigations for a grid-connected inverter. [ABSTRACT FROM AUTHOR]

When many distributed parallel inverters are integrated into grid without switching sequence coordinated control capability, the high-frequency harmonics will accumulate randomly at the point of common coupling. Global synchronous pulsewidth modulation (GSPWM) method can significantly attenuate the accumulated switching ripples by intentionally assuming an intelligent optimization algorithm and a communication system. To avoid the dependence on low-latency communication system, this paper proposes a novel phase-locked loop based PWM carrier synchronization (PLL-CS) method for GSPWM system, where the switching sequences can be effectively synchronized as expected without using low-latency synchronization signals. By doing so, the operational reliability of the whole GSPWM system can be significantly improved, while the additional hardware cost of GSPWM can be dramatically reduced, which can enhance the implementation adaptability of GSPWM method. Experimental results have verified the performance of the proposed PLL-CS GSPWM method. [ABSTRACT FROM AUTHOR]

One important characteristic of modular multilevel converter (MMC) is the existence of circulating current, which consists of a dc component and a series of undesirable even-order (predominantly second-order) harmonics. However, only the dc part of the circulating current is required for power balance, the ac harmonics are unwanted. These undesirable harmonics should be suppressed to reduce device stress and power losses. Most state-of-the-art circulating current suppression techniques employ separate controllers to generate the arm reference voltage for circulating current suppression. This paper proposes an alternate approach, eliminating the need of any additional control loop. Generation of undesirable circulating current is prevented inherently in the modulation stage. Reduced switching frequency sorting algorithm based modulation framework is employed to ensure reduced switching loss. Suitability of the proposed method is validated by experiments performed on a three-phase laboratory prototype of MMC. Steady state and transient operation of the MMC in grid-connected condition is studied. [ABSTRACT FROM AUTHOR]

It is well known that spatial field harmonics will cause high eddy current losses in surface-mounted permanent magnets (PMs) especially for the fractional-slot PM motors. However, the influence of temporal current harmonics, especially of the high-order temporal harmonics caused by pulsewidth modulation voltages from an inverter, lacks attentions. This paper studies the eddy current losses of the PMs caused by high-order current harmonics. In order to simplify the calculation and save computation time, analytical methods are used to predict the current harmonics caused by the PWM inverter, and the armature reaction field, the eddy current density, and losses in the PMs generated by the current harmonics. Finite element analysis, coupling simulation, and experimental studies are used to verify the analytical results. The study results show that the high-order current harmonics cause much higher eddy current losses than those caused by slotting and fundamental current even though the amplitudes of the high-order current harmonics are much lower. [ABSTRACT FROM AUTHOR]

This paper investigates acoustic noise when an electric motor is fed with three-phase pulsewidth-modulated (PWM) currents with varying modulation indices. The procedure involves using a data-driven process to create a design space for different geometries of an interior permanent magnet synchronous motor. The motor structures are then analyzed using a finite-element analysis package to extract knowledge related to the sound pressure levels from the PWM excitation. It is demonstrated that sampling the air-gap space at a single time instant, which is a routine procedure in acoustic noise calculations, can result in an inaccurate estimation of the sound pressure levels, especially when the noise source is PWM motivated. Multiple-time sampling over the electrical period is proposed as a better approach for analyzing the sound pressure levels, irrespective of the type of supply current quality. [ABSTRACT FROM AUTHOR]

This paper presents a novel approach to derive a pulsewidth modulation (PWM) technique for the generalized multi-phase drive. This novel approach is called a phase traversing principle. The given phase traversing principle is applied to the proposed PWM technique for five-phase open-end winding induction motor drive fed from a single dc source. The proposed PWM technique has the benefits of phase clamping, symmetrical operation of inverters, and common-mode current (CMC) elimination. Thus, it reduces the switching losses and also minimizes the issue of the CMC. The symmetrical operation of dual inverters further helps in the even distribution of losses. Also, the proposed PWM technique gives a good harmonic performance. The performance of the proposed PWM technique is analyzed using the switching loss function and harmonic flux trajectory methods. The first analysis gives justification of the reduced switching losses. While the second analysis gives the deviations in the motor flux with respect to variation in. modulation indices The proposed PWM technique is verified with both simulation and hardware results. [ABSTRACT FROM AUTHOR]

This paper provides robust $\mathcal {H}_{\infty }$ state feedback controllers suitable for implementation in three-phase grid-connected converters. This control strategy is known to provide optimal rejection of disturbances, but usually leads to high control gains, that may be difficult to be implemented in practice. To mitigate this problem, a linear matrix inequality condition based on slack variables is proposed, which allows to impose bounds on the control gains in a less conservative way than conventional quadratic stability. The performance is proven to be superior to similar $\mathcal {H}_{\infty }$ state feedback controllers in the literature, providing an upper bound for the converter output admittance and experimental grid currents complying with the IEEE Standard 1547. [ABSTRACT FROM AUTHOR]

In domestic induction heating applications, the modulation technique applied to the inverter has a high influence on the acoustic noise emissions. These noise emissions must be avoided, since they may be audible and annoying to the final user. This paper analyzes the acoustic noise emissions that appear when a series half-bridge resonant inverter is operated with a phase-accumulator-based modulator. This modulation technique has the advantage of operating in the frequency domain, and it is compared with the classical pulsewidth modulator regarding the audible noise generated. The frequencies of the tones in the acoustic noise spectrum are theoretically calculated from the parameters of the phase-accumulator-based modulator. The spectral flatness measure is used to quantify the number of cases in which tones are generated by the modulation. Two techniques are applied to the phase-accumulator-based modulator, and their effect is tested. Theoretical results are experimentally verified. [ABSTRACT FROM AUTHOR]

This paper proposes a new pulse amplitude width modulation (PAWM) procedure for cascaded H-bridge multilevel inverters fed by dc voltage sources with unequal amplitudes. With proposed procedure, the generated output voltage is obtained modulating a sinusoidal reference signal at the desired fundamental frequency with equally spaced switching angles. It has been analytically demonstrated that, under these assumptions, all harmonics except those of order $n=2kl\pm 1$ , $k=1,2,\ldots$ are deleted from the output voltage waveform. After a detailed description of the method and a comparative analysis with others existing in the literature, its harmonics elimination capability has been experimentally verified with 5-, 7-, 9-, and 11-level cascaded H-bridge inverters, moreover, it has been mathematically demonstrated that it reduces total harmonic distortion below 5% with a 17-level inverter and it is capable of eliminating the first 49 harmonics considered by standards with a 27-level inverter. [ABSTRACT FROM AUTHOR]