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This paper proposes a novel discontinuous pulse-width modulation (DPWM) method to reduce the current harmonics and improve the system efficiency for a single-phase three-level neutral-point clamped inverter. In single-phase inverters, the unipolar pulse-width modulation (UP-PWM) method is commonly used. However, this method has the disadvantage of power losses due to numerous switching operations. Conventional DPWM methods reduce the power losses and improve efficiency but increase the current total harmonic distortion (THD). To overcome these weaknesses, this paper proposes a hybrid DPWM switching method combining two PWM methods: the UP-PWM method and the conventional DPWM method called one-pole clamped PWM method. Since the proposed DPWM method offers all the advantages of both PWM methods, the optimal performance—with regard to the power losses and current THD—is obtained. The combination of two PWM methods is investigated by analyzing the power losses and current THD. Based on the analysis, the process determining the optimal operating condition is introduced. The effectiveness of the proposed DPWM method is demonstrated through simulations and experiments. [ABSTRACT FROM AUTHOR]

Neutral-point-clamped (NPC) multilevel inverter fed high power drives operating at low switching frequency are prone to low-order torque pulsations. For a case of N switching angles per quarter, apart from maintaining the fundamental component, (N-1) voltage harmonics can be eliminated. Consequently, \fracN-12 or lower number of torque harmonics could be eliminated. This paper proposes an optimal pulse-width modulation (PWM), which minimizes the combined root mean square (RMS) value (\tau RMS ) of torque harmonics of order lower than $6N$ at any modulation index (M$) for an induction motor drive fed from an NPC three-level inverter. This paper considers cases of two, three, and four switching angles per quarter cycle of the pole voltage. Compared with synchronized sine-triangle PWM and selective harmonic elimination (SHE) PWM, the proposed PWM reduces the first (N-1$ ) torque harmonics (i.e., \tau _6 ) over a wide speed range. Simulation and experimental results are presented on a 3.7-kW open-loop constant volts-per-Hertz induction motor drive. [ABSTRACT FROM PUBLISHER]

The performance of modular multilevel converters (MMCs) in medium-voltage applications, where the number of required submodules is not high, can be improved utilizing low switching frequency modulations such as (2N+1) selective harmonic elimination-pulse width modulation (SHE-PWM), which provides tight control of lower order harmonics and low switching losses. This paper proposes a calculation method, which is based on a novel formulation, to solve the SHE-PWM problem. In particular, MMCs with (2N+1) phase output voltage levels are considered, obtaining a (2N+1) SHE-PWM waveform. This method utilizes a unique system of equations that is valid for any possible waveform. Therefore, it is able to calculate simultaneously, without predefined waveforms, both the switching patterns and the associated firing angles that solve the (2N+1) SHE-PWM problem. Consequently, the search process is simplified and optimized. Furthermore, this paper also proposes a circulating current control technique, which can be applied along with (2N+1) SHE-PWM without disturbing the phase output voltage. Simulation results and experimental tests obtained with a single-phase laboratory prototype prove the validity of the novel (2N+1) SHE-PWM implementation method and the proposed circulating current control technique. [ABSTRACT FROM PUBLISHER]

This paper proposed a novel hybrid random pulsewidth modulation (HRPWM) technique based on the modified space vector PWM for three-phase voltage source inverters to eliminate the PWM acoustic noise. Due to PWM technique and switching losses considerations, ear-piercing high-frequency noise from motor is common. The proposed HRPWM technique is able to remove the high-frequency unpleasant acoustic noise more effectively than the conventional RPWM with lower switching losses and shorter random frequency range. In addition, the PWM harmonics in phase voltage and phase current are reduced significantly. The HRPWM method is simple to implement and does not employ additional circuits in drive system. Finally, the effectiveness of the proposed approach has been confirmed by detailed experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a five-phase dual random space vector pulsewidth modulation (FPDR-SVPWM) strategy with an optimized probability density function (PDF) for a five-phase voltage-source inverter, and its performance and evaluation are also analyzed. Based on the nearest four vectors modulation method, the FPDR-SVPWM strategy, combined with random switching frequency and random zero vector, is investigated to significantly reduce the amplitude of high-order harmonics near the switching frequency and its integer multiples. For the nonsinusoidal power supply, third harmonic injection is introduced in this modulation strategy as well. Considering the effect of random numbers on the performance, an optimized Beta distribution is studied in detail. In order to analyze harmonic dispersion degree qualitatively and quantitatively, the power spectral density and the harmonic spread factor are both employed to assess the performance of the FPDR-SVPWM strategy. A series of results of simulation in MATLAB and experiments based on field programmable gate array demonstrate that the proposed modulation strategy is correct and valid, and it distributes high-order harmonics into a wide range without affecting the fundamental wave and third harmonic. [ABSTRACT FROM AUTHOR]

Many publications have been presented on the modulation and control of the modular multilevel converter, some of which are based on phase-shifted carrier modulation. This paper presents an analysis of how the switching frequency affects the capacitor voltages, circulating currents, and alternating voltages using phase-shifted carrier modulation. It is found that switching frequencies that are integer multiples of the fundamental frequency should be avoided as they can cause the capacitor voltages to diverge. Suitable switching frequencies are derived for which the arm and line quantities will be periodic with symmetric operating conditions in the upper and lower arms. Thus, the practical outcome of this paper is a detailed description of how the switching frequency should be chosen in order to achieve advantageous operating conditions. The theoretical results from the analysis are validated by both simulations and experimental results. [ABSTRACT FROM AUTHOR]

Impedance network inverters are the best alternatives for voltage-source and current-source inverters. The boosting capability and the shoot-through solution of such converters make them excellent solutions for various applications. Nevertheless, hard switching forces the converter to operate in low switching frequency, which results in a bulky impedance network. Moreover, the coupling between the shoot-through duty cycle and the inverter modulation index makes a tradeoff between the voltage gain and the modulation index (output voltage harmonics). This paper presents a novel dual switching frequency modulation to mitigate the switching losses of the converter, which results in a more compact impedance network. The proposed method combines a high-frequency pulse width modulation with a low-frequency sinusoidal pulse width modulation (SPWM). Therefore, the switching losses decrease considerably with respect to the conventional simple boost modulation. In addition, the impedance network design frequency remains high, and the network size decreases obviously. The proposed approach removes the interdependence between the shoot-through duty cycle and the inverter modulation index. A comparison between the proposed method and the conventional simple boost method is performed to show its advantages over the conventional method. Finally, experimental results are presented to validate the performance of the proposed method. [ABSTRACT FROM PUBLISHER]

This paper presents a model predictive switching pattern control (MPSPC) for a current-source converter (CSC), which achieves superb low-order harmonics elimination performance in steady state and improved transient responses. Based on a proposed space-vector-based selective harmonic elimination (SHE) method and prediction of load current at the next sampling instant, MPSPC prefers to following a precalculated SHE-pulse width modulation (PWM) pattern in steady state, and governing the CSC through a model predictive control (MPC) approach during transients. In comparison with existing schemes, the advantages of MPSPC are threefold: First, quantization error, introduced by a constant sampling frequency in MPC and degrading steady-state low-order harmonic elimination, is mitigated in the proposed scheme. Second, there is no weighting factor in the cost function, as used in existing schemes. Finally, MPSPC is totally realized based on one-step prediction, which simplifies the structure of the scheme. Both simulation and experimental results verify the steady state and dynamic performance of MPSPC with different SHE-PWM patterns. [ABSTRACT FROM AUTHOR]

A new zero-sequence circulating current (ZSCC) reduction method for multimodule voltage source inverters (MVSIs) consisting of P three-phase inverters that are connected in parallel is proposed in this paper. Four-switch inverter modules are used instead of the conventional six-switch modules to reduce the cost. In this paper, the effectiveness of the proposed ZSCC reduction method is studied using selective harmonic elimination pulse width modulation. The proposed ZSCC reduction method can remove about P times the number of harmonics using the same switching frequency as compared to more conventional methods, as explained later in this paper. The concepts discussed in the paper are confirmed with results obtained from an MVSI experimental prototype. [ABSTRACT FROM AUTHOR]

PWM techniques for a full-bridge dc/dc converter are investigated and a new random PWM technique is proposed in this paper. Three PWM techniques with constant switching frequency are discussed and the related random PWM techniques which spread the harmonic clusters and give constant average inductor current to reduce the output voltage ripple are discussed. The pros and cons of three constant switching frequency PWM techniques and the related random counterparts are investigated. Experimental results show that there is a significant efficiency drop of the random PWM technique due to significant increase of switching counts. Therefore, this paper presents a new random PWM technique to significantly reduce the harmonic intensity while not causing relevant impact on the efficiency. An FPGA-based digital-controlled isolated full-bridge dc/dc converter prototype is built to verify the performance of conventional and proposed PWM techniques. The specifications of the converter include the following: input voltage = 400 V, output voltage = 12 V, output power = 528 W, and switching frequency = 100 kHz. Measured efficiency and harmonic spread factor will be used for the evaluation of these PWM techniques. [ABSTRACT FROM AUTHOR]

This paper investigates the suitability of selective harmonic elimination (SHE) for low-loss multimegawatt grid-connected photovoltaic (PV) inverters. The proposed system is able to meet utilities regulations, IEEE and IEC standards. In an attempt to substantiate the potential superiority of SHE over carrier-based or space-vector pulsewidth modulation (PWM), this paper demonstrates that SHE may allow grid-connected PV inverters to be controlled using a switching frequency of less than 1 kHz, while the inverter is still able to provide necessary operation features such as independent control of active and reactive powers and operation control simplicity. For system validation, experimental results with SHE are compared to the case when the inverter is controlled using third-harmonic injection PWM, with a 2-kHz switching frequency. Furthermore, the paper proposes a new implementation technique for SHE that utilizes the third harmonics to spread the switching angles over 90° instead of being located in a narrow range as generated when using conventional techniques, along with increases in modulation index. The advantages of the proposed technique include simplicity in implementation and flexibility in PWM waveforms. Simulation and experimentation demonstrate agreement, which validates the practicability of the proposed system. [ABSTRACT FROM AUTHOR]

During the design phase of a modular multilevel converter (MMC), an accurate loss evaluation of the submodule (SM) plays an important role. In this paper, a method based on the analytical description of the MMC key waveforms that allows to directly obtain the average semiconductor and capacitor losses that each SM will experience is introduced, under different operating conditions or control schemes. To verify the proposed concept, the results are compared with the losses obtained from a switched model with closed-loop control, where the analytical MMC key waveforms are approached in steady state. The proposed method provides a great flexibility and a significant reduction of the simulation/computational time otherwise needed to evaluate SM losses under various operating conditions. [ABSTRACT FROM PUBLISHER]

One of the problems of the pulse-width-modulation (PWM)-controlled ac machines is the acoustic noise that could become unacceptable when used in sensitive environments. Random PWM (RPWM) in industrial and commercial adjustable-speed drives (ASD) results in the partial transfer of power from the discrete spectrum (narrowband noise) of the output voltage to the continuous spectrum (wideband noise), with advantageous effects on reducing the acoustic noise in the motor drive system. In this paper, the theoretical power spectrum analysis as the basis for RPWM is presented. Five state-of-the-art RPWM strategies, their voltage, current, and acoustic noise spectra characteristics are quantitatively evaluated. The PWM schemes and theoretical analysis are validated through a 2.2-kW 380-V 50-Hz ASD induction machine experimental setup. The results provide valuable data for practicing engineering community to choose the best option in real-world applications. [ABSTRACT FROM PUBLISHER]

The device switching frequency of current source converters (CSCs) in high-power medium-voltage (MV) drive applications is normally around 500 Hz. Conventional space vector modulation (SVM) features fast dynamic response but its output contains low-order harmonics with high magnitudes. In this paper, a natural-sampling-based SVM (NS-SVM) scheme is proposed to substantially suppress the low-order harmonics in practical CSC-based drives. This study proposes an equivalent discretization of NS-SVM wherein natural sampling pulse width modulation performance can be achieved with regular sampling frequency (same as a conventional SVM) instead of a high or even infinite sampling frequency. Equations for natural-sampling-based dwell time calculations for each selected vector are developed. The corresponding simplified but precise enough equations are derived on the basis of the Newton–Raphson algorithm to achieve fast online digital implementation. The proposed NS-SVM features superior low-order harmonic performance and inherits the high dynamic response and low sampling frequency of conventional SVM. Simulations and experiments are provided to verify the proposed NS-SVM scheme. [ABSTRACT FROM AUTHOR]

Interleaving of voltage-source converter (VSC) legs enables higher output currents per phase, effectively increasing the power rating without increasing semiconductor ratings. However, the interleaved operation results in circulating currents between each phase converter legs as well as a zero-sequence circulating current (ZSCC), which become quite prominent when the converters operate with low switching frequencies. This paper demonstrates the interleaved operation of three-level converters under selective harmonic elimination pulsewidth modulation (SHE-PWM). A controller for the circulating current within the legs of each phase is also proposed. The controller is used in combination with optimally selected SHE-PWM patterns to generate the maximum number of voltage levels and minimize the peak value of the circulating current. Simulation and experimental results show the interleaved operation and the effect of SHE-PWM pattern selection in the overall system. [ABSTRACT FROM PUBLISHER]

In this paper, three control schemes with variable switching frequencies are proposed and analyzed for the paralleled voltage source inverters (VSIs) fed permanent magnet synchronous motor (PMSM) drive. The proposed schemes could be applied in the low-speed operation region of high-power drive system, where the frequency modulation index is high. First, the field-oriented control (FOC) with phase-shifted chaotic space vector modulation (SVM) under synchronous frame and the FOC with phase-shifted chaotic sinusoidal pulse width modulation under stationary frame is proposed for the paralleled VSIs fed PMSM drive. The proposed phase-shifted chaotic PWM schemes not only eliminate specific switching harmonics completely but also suppress all remaining switching harmonic peaks in the spectrum. The avoidance of inherent circulating current is also considered in designing these two schemes. Second, the direct torque control (DTC) for the paralleled VSIs fed PMSM drive is proposed with circulating current suppression. Besides inheriting the advantages of DTC, the output currents of paralleled VSIs are kept balanced. The working principles of these three methods are presented in detail. Experimental results on a laboratory prototype are given to verify the validity of the three proposed control schemes for the paralleled VSIs fed PMSM with variable switching frequencies. [ABSTRACT FROM PUBLISHER]

The analysis and assessment of the pulsewidth modulation (PWM) techniques is commonly based on the comparison of the total harmonic distortion (THD) results. THD is usually calculated by application of the Fourier transformation and by taking a limited number of harmonics into the consideration. In this paper, derivation of analytical formulas for the phase voltage THD is presented. The considered system is a symmetrical multiphase star-connected load, supplied from a multilevel pulsewidth-modulated voltage-source inverter (VSI, three-phase case is also covered). The solution is based on the Parseval's theorem, which links frequency spectrum and time domain through the average power (i.e., root-mean-square (rms) squared value) of the signal. The assumption throughout the derivations is that the ratio of the switching to fundamental frequency is high. Derivations are based on the integration of the power of the PWM signal in a single switching period over the fundamental period of the signal. Only ideal sinusoidal reference voltages are analyzed, and no injection of any type is considered. Formulas for phase voltage THD for any number of phases are derived for two- and three-level cases, for the most commonly used carrier-based methods. Comparison of the analytically obtained curves with simulation and experimental results shows a high level of agreement and validates the analysis and derivations. [ABSTRACT FROM AUTHOR]

Operating a dual three-level inverter system from a single dc link circuit is an economic solution for generating five-level output voltage waveforms and to double the output power compared to a single three-level inverter. Such an inverter system is used for feeding a drive motor with open stator windings. A mechanism is then required to reduce the common-mode voltage components of the motor voltages. This paper describes an offline optimization method that minimizes both the harmonic distortion of the motor currents and the common-mode voltage components. The optimization permits reduction of the switching frequency to a very low value of 200 Hz without compromising the harmonic distortion. High performance operation of the drive system at low switching frequency is experimentally demonstrated. [ABSTRACT FROM PUBLISHER]

Sliding mode control (SMC) is recognized as robust controller with a high stability in a wide range of operating conditions, although it suffers from chattering problem. In addition, it cannot be directly applied to multiswitches power converters. In this paper, a high performance and fixed switching frequency sliding mode controller is proposed for a single-phase unipolar inverter. The chattering problem of SMC is eliminated by smoothing the control law in a narrow boundary layer, and a pulsewidth modulator produces the fixed frequency switching law for the inverter. The smoothing procedure is based on limitation of pulsewidth modulator. Although the smoothed control law limits the performance of SMC, regulation and dynamic response of the inverter output voltage are in an acceptable superior range. The performance of the proposed controller is verified by both simulation and experiments on a prototype 6-kVA inverter. The experimental results show that the total harmonic distortion of the output voltage is less than 1.1% and 1.7% at maximum linear and nonlinear load, respectively. Furthermore, the output dynamic performance of the inverter strictly conforms the standard IEC62040-3. Moreover, the measured efficiency of the inverter in the worst condition is better than 95.5%. [ABSTRACT FROM AUTHOR]

Bitstream-based control, which uses one-bit-wide signals to control power electronics applications, is a new approach for controller design. Bit-Stream signals can be directly applied to control electronic devices, but the high-frequency nature of bitstream signals can lead to excessive switching losses. Thus, it is essential to downsample bitstream signals to reduce switching losses to acceptable levels. This paper presents a novel modulator, which downsamples high-frequency bitstreams to low-frequency switching signals that are suitable for driving two-level half-bridge or three-level full-bridge inverters. Methods for compensating for switch dead time and balancing switching losses of the inverter legs are presented, and the performance of the proposed modulators are compared to the standard pulse width modulation strategies. Simulation and experimental results of a 2-kW single-phase inverter show that the proposed bitstream modulators consume fewer logic resources, produce spread-spectrum output currents, and can deliver lower total harmonic distortion than similar fixed-frequency pulse width modulators. [ABSTRACT FROM AUTHOR]

This paper describes a two-phase separately randomized pulse position pulsewidth modulation scheme that can obtain the randomization effect on the switching noise spectra over the entire modulation index ( M) range. In the proposed scheme, the zero vector is selected as V(1 1 1) when M ≥ 0.7 and as V(0 0 0) when M <; 0.7. For the validity of the proposed method, a 16-bit microcontroller SAB-C167 was used and the experiments were performed on a 1.5-kW three-phase induction motor which is coupled an eddy current brake load. The switching noise was measured in the anechoic room using a RION SA-01. Experiment results were measured at a distance of 0.15 m away from the side of induction motor. The experimental results show that the harmonic spectra spread over a wideband area, and the switching noise for all the M is reduced by the proposed method. [ABSTRACT FROM AUTHOR]

A three-level inverter produces six active vectors, each of normalized magnitudes 1, 0.866, and 0.5, besides a zero vector. The vectors of relative length 0.5 are termed pivot vectors. The three nearest voltage vectors are usually used to synthesize the reference vector. In most continuous pulsewidth-modulation (PWM) schemes, the switching sequence begins from a pivot vector and ends with the same pivot vector. Thus, the pivot vector is applied twice in a subcycle or half-carrier cycle. This paper proposes and investigates alternative switching sequences, which use the pivot vector only once but employ one of the other two vectors twice within the subcycle. The total harmonic distortion (THD) in the fundamental line current pertaining to these novel sequences is studied theoretically as well as experimentally over the whole range of modulation. Compared with centered space vector PWM, two of the proposed sequences lead to reduced THD at high modulation indices at a given average switching frequency. [ABSTRACT FROM PUBLISHER]

This paper presents a flyback switch-mode rectifier (SMR) with spread harmonic spectrum. The SMR switching control is conducted by a charge-regulated pulsewidth modulation (PWM) scheme with constant turn-on period. The inherently stable discontinuous conduction mode operation is preserved to yield good line drawn power quality. In voltage loop, a quantitatively designed PI feedback controller is augmented with a robust error cancellation control scheme. Further improved dc output voltage regulation and input power quality performances are achieved under varied operating conditions. In spread harmonic spectrum control, the harmonic spectral properties of the developed flyback SMR are first analyzed. Then, the dedicated random switching scheme is developed to let its switch current harmonic spectrum be dispersedly distributed. In the proposed random switching scheme, the PWM turn-off period is modulated using 1-b binary sequence, pseudo random binary sequence, and 4-b binary sequences. Under randomized harmonic spectrum, the SMR control performances are not sacrificed. [ABSTRACT FROM PUBLISHER]