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An open-winding power conversion system with two conventional six-switch voltage-source converters (VSC) affords operation with a lower volt-ampere (VA) rating of each device for a given power rating, as well as a degree of fault tolerance. The disadvantages of such a configuration include a higher total device VA rating and increased conduction loss as compared to a single Y/Δ-connected VSC. In certain ac-dc applications, such as telecommunications, wind, and aerospace generator drives, it is desired to have regulated input currents and output voltage, but regenerative operation is either not required or prohibited. For such applications, an alternative open-winding power converter is proposed in this paper where half-controlled converter (HCC) is employed at each end of an open-winding structure. The resultant total switch count and total VA rating are reduced by half, compared to using full bridges. Besides, the basic advantages of an open-winding configuration, use of HCCs also guarantees immunity to dc-bus shootthrough and simplifies the gate drive circuit. The total VA rating of the proposed topology is found to be 42% less than a six-switch VSC. The operating principle, control method, and analysis with simulation and experimental results of the proposed topology in both a grid-tied rectifier application and a PM generator application are illustrated in this paper. [ABSTRACT FROM AUTHOR]

During the design phase of a modular multilevel converter (MMC), an accurate loss evaluation of the submodule (SM) plays an important role. In this paper, a method based on the analytical description of the MMC key waveforms that allows to directly obtain the average semiconductor and capacitor losses that each SM will experience is introduced, under different operating conditions or control schemes. To verify the proposed concept, the results are compared with the losses obtained from a switched model with closed-loop control, where the analytical MMC key waveforms are approached in steady state. The proposed method provides a great flexibility and a significant reduction of the simulation/computational time otherwise needed to evaluate SM losses under various operating conditions. [ABSTRACT FROM PUBLISHER]

This paper addresses the inverter nonlinearity of a three-level T-type inverter. The main causes of the nonlinearity are pulse shaping, pulse skipping due to narrow pulses for the dead time, and voltage drop of the switching devices. Although the same causes have existed in two-level inverters, the pulse skipping phenomenon and results are quite different in the case of the three-level T-type inverter. The effects of pulse shaping and skipping have been investigated and discussed. In addition, the voltage drop of the switching devices has been considered in conjunction with the conduction path of the T-type inverter. Compensation methods based on the pulse width modulation (PWM) of T-type inverter to alleviate the inverter nonlinearity have been proposed from research results. The proposed methods could be easily implemented by adding appropriate offset voltages to the voltage references of the inverter in PWM. Furthermore, a neutral voltage balancing method of a three-level T-type inverter has been proposed in conjunction with the proposed PWM methods using offset voltage. Through extensive experimental tests, the fifth- and seventh-harmonic components of the current are conspicuously reduced along with the even harmonics. The neutral voltage of the inverter can be balanced effectively with the proposed offset voltage adjustments as well. [ABSTRACT FROM AUTHOR]

Multilevel cascaded H-bridge converters have become a mature technology for applications where high-power medium ac voltages are required. Normal operation of multilevel cascaded H-bridge converters assumes that all power cells have the same dc voltage, and each power cell generates the same voltage averaged over a sampling period using a conventional phase-shifted pulse width modulation (PWM) technique. However, this modulation method does not achieve good results under unbalanced operation per H-bridge in the power converter, which may happen in grid-connected applications such as photovoltaic or battery energy storage systems. In the paper, a simplified mathematical analysis of the phase-shifted PWM technique is presented. In addition, a modification of this conventional modulation method using variable shift angles between the power cells is introduced. This modification leads to the elimination of harmonic distortion of low-order harmonics due to the switching (triangular carrier frequency and its multiples) even under unbalanced operational conditions. The analysis is particularized for a three-cell cascaded H-bridge converter, and experimental results are presented to demonstrate the good performance of the proposed modulation method. [ABSTRACT FROM PUBLISHER]

This paper investigates a control method to significantly reduce the low-frequency current oscillation for six-step operation of a three-phase inverter. The six-step operation of an ac electric machine drive system under high speeds has a few advantages compared with pulse width modulation (PWM) operation including reduced switching losses, a better utilization of the dc bus voltage, and an enhanced speed capability. In digital implementation of the six-step control, power electronics may not be able to switch on and off exactly at the zero crossing points of reference voltages, which will result in a dc offset in phase voltages and cause a low-frequency oscillation in phase currents. The low-frequency oscillation will create issues such as higher power losses, lower efficiency, and excessive heat that may demagnetize magnets on the rotor for a permanent magnet synchronous machine. This research presents a control algorithm using asymmetric PWM to ensure that power electronics switch on and off exactly at the reference voltage zero crossing points. Both simulation and experimental results demonstrate the algorithm can reduce the low-frequency oscillation in phase currents by more than 90%. [ABSTRACT FROM AUTHOR]

One of the problems of the pulse-width-modulation (PWM)-controlled ac machines is the acoustic noise that could become unacceptable when used in sensitive environments. Random PWM (RPWM) in industrial and commercial adjustable-speed drives (ASD) results in the partial transfer of power from the discrete spectrum (narrowband noise) of the output voltage to the continuous spectrum (wideband noise), with advantageous effects on reducing the acoustic noise in the motor drive system. In this paper, the theoretical power spectrum analysis as the basis for RPWM is presented. Five state-of-the-art RPWM strategies, their voltage, current, and acoustic noise spectra characteristics are quantitatively evaluated. The PWM schemes and theoretical analysis are validated through a 2.2-kW 380-V 50-Hz ASD induction machine experimental setup. The results provide valuable data for practicing engineering community to choose the best option in real-world applications. [ABSTRACT FROM PUBLISHER]

This paper presents a new high-frequency modulation method for multilevel converters. The proposed method provides a broad linear operating range and can be digitally implemented with minimal computational effort. This modulation method creates a phase voltage composed of a rectangular component superimposed on the top of a quasi-square-shaped reference function. The reference functions are defined such that the utilization of the dc-link voltage is maximized in any modulation index, while the dv/dt of the switches is always the minimum possible value. In order to implement the proposed method, an update time that is much shorter than the fundamental period is defined in the algorithm for updating the rectangular components of the reference voltage. The high-frequency rectangular component can then be imposed on the reference function to generate the final switching function by switching between two voltage levels during the time between two update instances. Several experimental results are provided to evaluate the performance of the proposed method and to compare its operation to conventional methods. [ABSTRACT FROM PUBLISHER]

In this paper, the near-state pulse width modulation (NSPWM), adapted to be used in dual-voltage source inverter (VSI) fed open-end load, is introduced primarily aiming to appreciably minimize the voltage total harmonic distortion (THD). Within the framework of the proposed method, the active time of pulses at the second inverter is relatively adjusted within switching interval (compared to the first VSI). The phase voltage harmonics are formulated for dual-inverter modulated by NSPWM; then, optimal adjustment is identified via a three-dimensional curve of phase voltage THD versus modulation index (MI) and phase angle displacement (PAD). Due to the limitation of MI in NSPWM, the desired output voltage is synthesized with modifying not only MI but also PAD between references of two VSIs. Furthermore, NSPWM inherently takes advantage of better efficiency compared to conventional space vector modulation due to switching only two phases within an interval (by clamping one phase to positive/negative dc-rail). The dual-VSI supplied by two isolated dc sources is assembled in the laboratory to experimentally evaluate the THD reduction feature of the proposed method; also, the simulation results obtained by means of a MATLAB/Simulink environment show close agreement with experimental data. [ABSTRACT FROM PUBLISHER]

In grid-connected inverters, a feedforward controller accurately compensates for a large number of the harmonic components of the injected current. This controller is fast and directly tackles the grid dynamic voltage disturbances without doing any further harmonic analysis. A feedforward controller was introduced to a three-phase grid connection with a wye configuration; however, for the widespread delta connections, such a scheme is less established. Moreover, the nonsinusoidal profile of the grid voltage waveform makes the online conversion of line-to-line values into phase values impossible. In this paper, implicit zero-sequence discontinuous pulse width modulation (IZDPWM) based feedforward control is implemented on the two-level grid-connected inverter. Regardless of the grid topology, the IZDPWM-based controller ensures sinusoidal current injection to the grid under balanced, unbalanced, and distorted conditions. [ABSTRACT FROM PUBLISHER]

The purpose of this paper is to investigate the impact of switching harmonics on the instantaneous power distribution in the cells of a cascaded H-bridge-based STATCOM when using phase-shifted pulse width modulation. The case of high- and low-switching frequency for the converter cells is investigated and the interaction between voltage and current harmonics is analyzed. It is shown that in both cases, this interaction results in an uneven power distribution among the cells in the same phase leg, leading to drifting of the dc-capacitor voltages and thereby the need for proper stabilization control loops. It is also shown that the selected frequency modulation ratio affects the active power distribution among the cells. In particular, the selection of a noninteger frequency modulation ratio helps in providing a more uniform power distribution among cells of the same phase leg, thus contributing to the capacitors balancing. A methodology for optimal selection of the frequency modulation ratio is given. Theoretical conclusions are validated through simulation and experimental results. [ABSTRACT FROM AUTHOR]

Multilevel active neutral-point-clamped (ANPC) converter is popularly known for its higher medium voltage drives up to 6.9 kV. However, common-mode voltages (CMV) are generated when using the well-established carrier-based pulse width modulation (PWM) modulation technique. As a result, CMV will become the major cause of the premature bearing failures and the conducted electromagnetic interferences. In this paper, a reduced CMV strategy is proposed for the ANPC which employs an alternatively new hybrid carrier-based modulation named as interleaved sawtooth carrier phase-disposition PWM (ISC-PD-PWM). By doing so, enhanced harmonic profile is achieved as compared to the typically used classical phase-shifted carrier PWM (PSC-PWM). Therefore, a comparative evaluation of the seven-level (7L) ANPC performance using the proposed reduced CMV approach is made between the novel hybrid ISC-PD-PWM and the conventional PSC-PWM in terms of harmonic analysis. The experimental results have proven the feasibility of the proposed concepts with the CMV effectively reduced. Such perceived merits make ANPC be more attractive for its motor drives. [ABSTRACT FROM AUTHOR]

The device switching frequency of current source converters (CSCs) in high-power medium-voltage (MV) drive applications is normally around 500 Hz. Conventional space vector modulation (SVM) features fast dynamic response but its output contains low-order harmonics with high magnitudes. In this paper, a natural-sampling-based SVM (NS-SVM) scheme is proposed to substantially suppress the low-order harmonics in practical CSC-based drives. This study proposes an equivalent discretization of NS-SVM wherein natural sampling pulse width modulation performance can be achieved with regular sampling frequency (same as a conventional SVM) instead of a high or even infinite sampling frequency. Equations for natural-sampling-based dwell time calculations for each selected vector are developed. The corresponding simplified but precise enough equations are derived on the basis of the Newton–Raphson algorithm to achieve fast online digital implementation. The proposed NS-SVM features superior low-order harmonic performance and inherits the high dynamic response and low sampling frequency of conventional SVM. Simulations and experiments are provided to verify the proposed NS-SVM scheme. [ABSTRACT FROM AUTHOR]

Although the dc/dc converter as a common power supply is compatible with the electromagnetic compatibility standard, it may still bring the peak interference generated from one nonlinear load to the other loads. In this paper, a novel filter is designed in a low-voltage buck converter to suppress some extra peak harmonics generated from a nonlinear load, i.e., a pulse width modulation switching circuit. This filter is a variable capacitance filter (VCF) whose active devices are working in the linear areas. The capacitance of the filter is controlled to vary with the change of the switching load's carrier-frequency in the scheme. The impedance of the VCF can not only be matched with the switching load, but also avoid the mismatch effect from the parameter drift caused by the aging of the components. Thus, the VCF can suppress the introductive peak harmonics from the switching load at its carrier-frequency, especially the peak harmonics in the carrier-frequency region when the carrier-frequency modulation is used as the control strategy in the switching load. The feasibility and validity of the VCF are proved by simulations and experiments in a low-voltage buck converter, in which a boost circuit is working as one of its loads. [ABSTRACT FROM AUTHOR]

This paper presents the Bee optimization method for harmonic elimination in a cascaded multilevel inverter. The main objective in selective harmonic elimination pulsewidth modulation strategy is eliminating low-order harmonics by solving nonlinear equations, while the fundamental component is satisfied. In this paper, the Bee algorithm (BA) is applied to a 7-level inverter for solving the equations. The algorithm is based on the food foraging behavior of a swarm of a honeybees and it performs a neighborhood search combined with a random search. This method has higher precision and probability of convergence than the genetic algorithm (GA). MATLAB software is used for optimization and comparison of GA and BA. Simulation results show superiority of BA over GA in attaining accurate global minima and higher convergence rate. Also, its performance in 10 times run is the same as in 1 time run. Finally, for verifying purposes, an experimental study is performed. [ABSTRACT FROM AUTHOR]

Multimodule converter-based high-voltage dc (HVDC) power transmission incorporates numerous voltage-source converters (VSCs) connected in series/parallel to provide increased voltage/current and, hence, power ratings. When a selective harmonic elimination pulsewidth-modulation (SHE-PWM) technique is employed, the switching losses of the VSC modules are reduced but the voltages of the series-connected dc capacitors are not naturally balanced. In this paper, a voltage-balancing technique is reported. The technique relies on monitoring the voltage of each dc capacitor and when such voltage exceeds its preset band, the realization of the multilevel waveform reallocates the task to another VSC module to ensure that voltage balance between all capacitors is achieved. Three-phase bipolar VSC modules are considered in this paper and each one is modulated by a precalculated multilevel SHE-PWM waveform. The time-domain waveforms and their line-to-line voltage spectra are verified by simulation using PSCAD/EMTDC. The selected results are presented to confirm the viability of the proposed method. [ABSTRACT FROM PUBLISHER]

This paper presents a novel topology for a direct ac–ac power converter, called as the “three-to- k” phase matrix converter. The input to the proposed matrix converter configuration is a three-phase fixed voltage and a fixed frequency supply from the grid. The output is a variable voltage and variable frequency ac supply of any number of phases (k phase). However, the discussion is limited here for a k that is equal to odd number of phases. As an example, a “three-to-five” phase matrix converter is utilized for discussion and analysis. This paper also proposes two pulsewidth modulation (PWM) control techniques for the general topology of the “three-to- k” phase matrix converter. This is based on the so-called direct duty ratio PWM (DPWM). In one presented technique, the output voltage is limited to one half of the input voltage. For the other proposed scheme, the output voltage is enhanced to 78.86% of the input voltage. The proposed control algorithm is validated using simulation and an experimental approach. [ABSTRACT FROM AUTHOR]

This paper presents theoretical, simulation, and experimental investigations of input current interharmonics in modern variable-speed drives based on voltage source inverters and diode input rectifiers that are caused by motor current imbalance. It investigates how a disturbance in the inverter dc side current created by unbalanced motor currents propagates from the inverter to the rectifier stage and appears as variable frequency interharmonic distortion in the rectifier input currents. Particular emphasis is given to theoretical analysis of the frequency transformations created by the inverter and rectifier stages and the magnification of the disturbance current caused by parallel resonance in the drive dc bus circuit. The theoretical results are confirmed by simulation and experimental results. They demonstrate that motor current imbalance can be responsible for high non-characteristic inter-harmonic distortion in the drive input currents. A calculation example outlines a procedure for estimation of the drive input current interharmonic distortion based on measurements of the motor currents. The paper should be helpful for people investigating the origin of problems caused by variable frequency interharmonic currents. [ABSTRACT FROM PUBLISHER]

This paper addresses theoretical calculation of a single-phase multilevel pulsewidth modulation (PWM) inverter current total harmonic distortion (THD). Analytical approach introduced in late 1980s for a two-level inverter is generalized for an arbitrary level count for a single-phase inverter. Although the obtained closed-form piecewise analytical solutions assume (infinitely) large ratio of switching and fundamental frequencies and pure inductive load, they are practically very accurate for the ratios of (apparent) switching and fundamental frequencies larger than 25–30 and inductance-dominated loads. Along with strict mathematical solutions, simple accurate Bessel function approximation and hyperbolic average trend one are suggested. The formulas clearly reveal a single-phase PWM inverter current THD dependence on modulation index for an arbitrary voltage level count and are easily modified to cover grid-connected cases. [ABSTRACT FROM PUBLISHER]

Interleaving of voltage-source converter (VSC) legs enables higher output currents per phase, effectively increasing the power rating without increasing semiconductor ratings. However, the interleaved operation results in circulating currents between each phase converter legs as well as a zero-sequence circulating current (ZSCC), which become quite prominent when the converters operate with low switching frequencies. This paper demonstrates the interleaved operation of three-level converters under selective harmonic elimination pulsewidth modulation (SHE-PWM). A controller for the circulating current within the legs of each phase is also proposed. The controller is used in combination with optimally selected SHE-PWM patterns to generate the maximum number of voltage levels and minimize the peak value of the circulating current. Simulation and experimental results show the interleaved operation and the effect of SHE-PWM pattern selection in the overall system. [ABSTRACT FROM PUBLISHER]

Coupled-inductor semi-bridge converters, assembled from magnetically linked pairs of complementary unidirectional phase legs, can achieve a substantially improved harmonic output voltage performance with the same number of silicon devices as traditional converters. However, they must be operated so as to ensure that a continuous common-mode current always flows through each coupled inductor, to ensure each phase leg can always produce the required switched output voltage. This is particularly challenging for a three-phase coupled-inductor bridge controlled by phase disposition (PD) modulation, since there is no direct correlation between the modulator output and the individual phase leg switching device commands. This paper presents a novel strategy to control each phase leg’s common-mode inductor current under PD modulation, by introducing a square wave offset signal into the modulator reference command, and feeding the modulator output through a postprocessing state machine to correctly switch each semi-bridge phase leg to maintain the required dc common-mode current. The strategy has been verified by detailed simulation studies and matching experimental results. [ABSTRACT FROM PUBLISHER]

The cost reduction of power-electronic devices, the increase in their reliability, efficiency, and power capability, and lower development times, together with more demanding application requirements, has driven the development of several new inverter topologies recently introduced in the industry, particularly medium-voltage converters. New more complex inverter topologies and new application fields come along with additional control challenges, such as voltage imbalances, power-quality issues, higher efficiency needs, and fault-tolerant operation, which necessarily requires the parallel development of modulation schemes. Therefore, recently, there have been significant advances in the field of modulation of dc/ac converters, which conceptually has been dominated during the last several decades almost exclusively by classic pulse-width modulation (PWM) methods. This paper aims to concentrate and discuss the latest developments on this exciting technology, to provide insight on where the state-of-the-art stands today, and analyze the trends and challenges driving its future. [ABSTRACT FROM PUBLISHER]

In this paper, a new inverter topology is proposed for generating a multilevel dodecagonal voltage space vector structure for open-end winding induction motor (IM) using a single dc source. Dodecagonal voltage space vector structure eliminates fifth- and seventh-order harmonic voltages from phase voltage output and hence eliminates the fifth- and seventh-order harmonic currents through the motor leading to removal of the dominant sixth-order torque ripple generation in the motor over the entire modulation range. Multilevel space vector structure generates output voltage with better THD and low dv/dt. In the proposed topology, two three-level inverters drive an open-end winding IM, one inverter from each side. DC-link of primary inverter is from a dc source which delivers the entire active power, whereas the secondary inverter dc-link is maintained by a capacitor, which is self balanced during the inverter operation. The PWM scheme implemented ensures low switching frequency for primary inverter. Secondary inverter operates at a small dc-link voltage. Hence, switching losses are small for both primary and secondary inverters. Experimental results show the elimination of fifth- and seventh-order harmonic voltages over the entire modulation range, validating effectiveness of the proposed multilevel inverter scheme. [ABSTRACT FROM PUBLISHER]

This paper provides theoretical and experimental discussions on an optimal carrier frequency for a phase-shifted pulsewidth modulation modular multilevel cascade converter for grid connections. The theoretical discussion concludes that a ratio of the optimal carrier frequency with respect to the supply (ac) frequency is 5/2. A three-phase downscaled front-to-front system is designed, constructed, and tested to confirm validity of the theoretical discussion. It consists of a pair of three-phase modular multilevel cascade converters rated at 400 Vdc and 10 kW, where the carrier frequency is set to 450 Hz and the ac frequency to 180 Hz, that is, their ratio is equal to 5/2. Moreover, simulated waveforms are compared to experimental ones under the same operating conditions. Both experimental and simulated waveforms agree well with each other not only in steady states but also in transient states. [ABSTRACT FROM AUTHOR]

This paper provides a theoretical and experimental discussion about the performance, availability, and flexibility of a battery energy storage system (BESS) using a modular multilevel cascaded converter based on single-star bridge cells (MMCC-SSBC). The SSBC-based BESS produces three-phase multilevel voltage waveforms, and eliminates both harmonic filters and a complicated zig-zag transformer from the ac side. The circuit modularity of the SSBC enables the usage of multiple individual low-voltage battery modules. Along with control strategy based on zero-sequence-voltage injection, this modularity enhances the availability and flexibility of the BESS. A three-phase laboratory downscaled system rated at 140 V, 10 kW, and 21 kW·h is designed, constructed, and tested to verify the operating principles and performance. The tested BESS produces a current total harmonic distortion (THD) of 3.0% even when it operates with different active-power commands for individual bridge cells. In addition, zero-voltage ride-through capability is verified for the severest single-phase, two-phase, and three-phase voltage sags. Mathematical analysis and experimental verification validate the downscaled system and performance, making the BESS prospective. [ABSTRACT FROM PUBLISHER]

Constant-volts-per-hertz induction motor drives and vector-controlled induction motor drives utilize pulsewidth modulation (PWM) to control the voltage applied on the motor. The method of PWM influences the pulsations in the torque developed by the motor. A space-vector-based approach to PWM facilitates special switching sequences involving the division of active state time. This paper proposes a space-vector-based hybrid PWM technique, which is a combination of the conventional and special switching sequences. The proposed hybrid PWM technique results in a lower peak-to-peak torque ripple than conventional space vector PWM (CSVPWM) at high speeds of an induction motor drive. Furthermore, the magnitude of the dominant torque harmonic due to the proposed hybrid PWM is significantly lower than that due to CSVPWM at high speeds of the drive. Experimental results from a 3.75-kW sensorless vector-controlled induction motor drive under various load conditions are presented to support analytical and simulation results. [ABSTRACT FROM AUTHOR]

In an electric drive vehicle (EDV), the available voltage on a dc-link is limited, and so the inverter output voltage and, consequently, the line motor maximum speed are limited. The fundamental voltage of the inverter output is increased approximately 27% using a square wave (SW) switching pattern instead of a sine wave switching pattern. However, this pattern can only be used at high speeds, and at lower speeds a pulsewidth modulation (PWM) pattern should be used. In order to achieve proper control, the switching pattern should be changed seamlessly. In the present paper, a new PWM scheme for single-mode seamless control of Vernier motors is proposed. In the proposed scheme, the reference voltage is modified to change the switching pattern continuously so that the voltage changes smoothly from a high-frequency pattern to an SW and voltage discontinuity does not occur. Experimental results reveal that the inverter-switching pattern changes smoothly from a sinusoidal PWM pattern to an SW pattern, and so seamless control from the constant-torque region to the constant-power region, and vice versa, is achieved. Since the proposed scheme is a single-mode control, it is much simpler than current technologies, which are based on multimode controllers. Also the proposed method has a lower total harmonic disturbance (THD) as well as a lower harmonic distortion factor (HDF) compared to some existing methods. [ABSTRACT FROM PUBLISHER]

Multilevel inverters are gaining more attention in ac drive application due to their many attractive features. In the case of conventional neutral-point-clamped (NPC) or flying capacitor multilevel inverter configurations, active switches are connected in series to produce multilevel output voltage waveform. Therefore, if any one switch fails, the entire configuration has to be shut down; this will reduce the reliability of the system. A dual three-level inverter configuration for induction motor drive is proposed in this paper to improve reliability of the system. This topology is developed by feeding four-pole induction motor stator winding with four conventional two-level inverter modules. A level-shifted carrier-based third harmonic injection pulsewidth-modulation technique is used to produce the gating signals for the proposed configuration. By providing proper phase shift between carrier waves, multilevel voltage waveform is produced across the total motor phase winding, and first center band harmonics are also canceled. Thereby, the torque ripple will be considerably reduced compared with conventional NPC five-level inverter-driven induction motor drive. Finite-element analysis (FEA) is used to estimate the torque ripple when induction motor is supplied by the proposed configuration and conventional five-level NPC inverter configuration to show the effectiveness of the proposed converter. The proposed configuration is simulated using MATLAB/Simulink and experimentally verified using a laboratory prototype with a 5-hp four-pole induction motor drive. [ABSTRACT FROM PUBLISHER]

In this paper, three control schemes with variable switching frequencies are proposed and analyzed for the paralleled voltage source inverters (VSIs) fed permanent magnet synchronous motor (PMSM) drive. The proposed schemes could be applied in the low-speed operation region of high-power drive system, where the frequency modulation index is high. First, the field-oriented control (FOC) with phase-shifted chaotic space vector modulation (SVM) under synchronous frame and the FOC with phase-shifted chaotic sinusoidal pulse width modulation under stationary frame is proposed for the paralleled VSIs fed PMSM drive. The proposed phase-shifted chaotic PWM schemes not only eliminate specific switching harmonics completely but also suppress all remaining switching harmonic peaks in the spectrum. The avoidance of inherent circulating current is also considered in designing these two schemes. Second, the direct torque control (DTC) for the paralleled VSIs fed PMSM drive is proposed with circulating current suppression. Besides inheriting the advantages of DTC, the output currents of paralleled VSIs are kept balanced. The working principles of these three methods are presented in detail. Experimental results on a laboratory prototype are given to verify the validity of the three proposed control schemes for the paralleled VSIs fed PMSM with variable switching frequencies. [ABSTRACT FROM PUBLISHER]

Multilevel current source converters are a smart choice for the high-power applications with low-voltage and high-current requirements. This paper presents the detailed analysis of a current source modular multilevel converter (CSMMC) and its application as a STATCOM. Various properties of CSMMC are compared with the voltage-source modular multilevel converter (VSMMC). The submodule inductance selection method and a sorting-based algorithm for inductor current balancing are proposed for CSMMC. The validity of the inductance selection method and the inductor current balancing algorithm are confirmed by the simulation of a three-phase CSMMC using PSCAD/EMTDC. The carrier phase-shifted sinusoidal pulsewidth modulation is used as the switching technique. The performance of a converter is analyzed with interleaved and noninterleaved carrier signals for the upper and lower arms. Results show that CSMMCs and corresponding VSMMCs have analogous features. Hence, the development on VSMMCs can be used for reference to CSMMCs and vice-versa. Furthermore, the control designs for CSMMC-based STATCOM are presented and verified using simulations. The obtained results of the proposed STATCOM show that the steady-state and transient performance of the system are quite satisfactory. This makes the CSMMC suitable for HVDC and flexible ac transmission systems applications. [ABSTRACT FROM PUBLISHER]

The three-phase series-connected modular multilevel converter (SC-MMC) is presented as one option for high-voltage direct current (HVDC) tap to reduce the cost of an HVDC station. Compared with conventional three-phase parallel-connected MMC, the number of semiconductor switches in SC-MMC is reduced by one-third to withstand the same dc voltage. First, the paper studies the operating principle of SC-MMC, and then presents an interspacing phase-shifted pulsewidth-modulated method which could improve the waveform of the output ac voltage for a given switching frequency. Next, the control strategy based on the identical real power input of each phase is proposed to balance the dc voltage of each phase under an unbalanced grid condition. The current limit of switching devices is also taken into consideration to protect SC-MMC from overcurrent. Furthermore, a universal zero-sequence current controller is developed as one part of the control strategy. In addition, an innovative method to suppress the third harmonics of ac current is presented. With the third harmonic suppression strategy, the SC-MMC can operate with much smaller SM capacitors without deteriorating the ac current, which contributes to the cost reduction further. Finally, simulation results obtained in PSCAD/EMTDC are provided to validate the proposed control strategies. [ABSTRACT FROM PUBLISHER]

The most recent literature on multiphase machine drives is based on voltage-source converter (VSC) systems utilizing different modulation techniques. Very little attention is given to the multiphase current-source converters (CSCs). Applying CSCs in high-power multiphase drive systems is promising and can effectively solve many technical problems associated with conventional VSC-based systems. This paper proposes a space vector pulsewidth-modulation (SVPWM) scheme suitable for a five-phase CSC. Generally, in SVPWM-CSCs, a current path should be provided for the dc-link current by ensuring that one pair of upper and lower switches is always on. Applying this constraint yields 25 different space vectors, which are mapped into two concentric decagons with ten equal sectors in the $\alpha\beta$ and $xy$ sequence planes. Each sector has two active-large vectors, two active-small vectors, and a null vector. Moreover, the active-large vectors in the $\alpha\beta$ plane are active-small vectors in the $xy$ plane, and vice versa. In the proposed scheme, the ampere-second concept is utilized to determine the ratio between the dwelling times of the large and small vectors such that the $xy$ current components are nullified, the utilization of the input dc-current is maximized, and the switching transitions are minimized, which, in turn, minimizes the CSC switching losses. The proposed scheme can effectively provide sinusoidal converter currents, which is suitable for motor drives and energy conversion applications. The proposed scheme is verified using a 1-kW prototype five-phase induction motor fed by a five-phase CSC. [ABSTRACT FROM PUBLISHER]

In this paper, three overmodulation techniques for the three-to-five-phase indirect matrix converter (IMC) are proposed. The first technique utilizes only the adjacent large vectors in the sector in which the reference output voltage vector lies. The second technique improves on that by continuously adapting vector elimination in the d_2-q_2 vector space based on the output voltage requirements. The third technique utilizes the ripple in the dc link to further reduce the modulation index of the inverter stage during overmodulation. All three techniques increase the voltage transfer ratio of the three-to-five-phase IMC from 0.788 to 0.923, but with the addition of harmonics generated by a vector in the d_2-q_2 vector space of the inverter stage. Simulation and experimental results from a prototype three-to-five-phase IMC validate the three proposed overmodulation techniques. [ABSTRACT FROM AUTHOR]

This paper demonstrates for the first time the use of a very large secure digital card flash memory to the design of a three-phase pulse width modulation (PWM) generator and describes the hardware and software used for implementation. The new digital architecture differs from the conventional counter-based implementation, and it follows a preprogrammed optimal PWM pattern that is read from memory with magnitude and phase as coordinates. This architecture allows the inclusion of multiple optimization criteria within the PWM pattern. This digital architecture becomes valuable since the switching instants can be set in any conceivable manner, away from the rigid constraint of a repetitive sequence of states on each PWM period. Experimental results validate that the proposed new architecture allows simple and low cost implementation of complicated PWM patterns with harmonic reductions that could not otherwise be achieved for low cost. [ABSTRACT FROM AUTHOR]

Modulating the output of a voltage source inverter (VSI) inherently causes current distortions on the load side due to the switching behavior of the inverter. This paper describes a method to reduce these distortions for a drive setup with six phases. The setup consists of a six-phase machine connected to two three-leg two-level VSIs. The phases within the machine are symmetrically arranged and spatially shifted by $60^\circ$ . The phases are grouped so that two conventional three-phase sets are formed, each fed by one inverter. The output of each inverter leg is modulated by comparing a triangle carrier waveform with the desired fundamental wave. Arranged in this way, the drive setup offers an additional degree of freedom, the phase shift of the two carrier waveforms. It is shown that, depending on the machine parameters, there exists an optimal angle, which reduces the harmonic losses of the drive for a certain amplitude of the fundamental wave. The resulting overall current distortion can even be lower compared to a conventional three-phase drive with a two- or three-level inverter topology. For three different modulation techniques, the optimal phase shift angles are derived in an exact form, naturally, symmetrical regular and asymmetrical regular sampled pulse width modulation. An approximation with reasonable accuracy is achieved out of the exact solution. Simulations and experimental tests validate the theoretical considerations. [ABSTRACT FROM AUTHOR]

An algebraic method is proposed for selective harmonic elimination PWM (SHEPWM). By computing its Groebner bases under the pure lexicographic monomial order, the nonlinear high-order SHE equations are converted to an equivalent triangular form, and then a recursive algorithm is used to solve the triangular equations one by one. Based on the proposed method, a user-friendly software package has been developed and some computation results are given. Unlike the commonly used numerical and intelligent methods, this method does not need to choose the initial values and can find all the solutions. Also, this method can give a definite answer to the question of whether the SHE equations have solutions or not, and the accuracy of the solved switching angles are much higher than that of the reference method. Compared with the existing algebraic methods, such as the resultant elimination method, the calculation efficiency is improved. Experimental verification is also shown in this paper. [ABSTRACT FROM AUTHOR]

This paper proposes a resonant dual-active bridge (DAB) converter, which uses a tuned capacitor–inductor–capacitor network. In comparison to the conventional DABs, the proposed topology significantly reduces the bridge currents, lowering both conduction and switching losses and improving the bridge power factors. A mathematical model, which predicts the behavior of the proposed system, is presented to show that both the magnitude and direction of the power flow can be controlled through either relative phase angle or pulse width modulation of voltages produced by the bridges. The viability of the proposed concept is verified through simulation. Experimental results of a 4- kW prototype converter, which has an efficiency of 95% at rated power, are also presented with discussions to demonstrate the improved performance of this topology. [ABSTRACT FROM AUTHOR]

Three-level neutral point clamped (NPC) inverters exhibit a natural balancing property that can self-regulate the intermediate neutral point voltage to half the overall dc-link voltage. However, the underlying mechanisms of this process are not well understood, its performance under various load conditions has not been properly explored, and the requirements and benefits of ( $RLC$) balance booster filters to enhance the natural balancing response are not clear. This paper presents a generalized model of an NPC natural balancing process that allows these issues to be explored for various load structures and balance booster configurations (i.e., isolated wye, wye with a grounded star point, etc.). The model accurately predicts the dominant balancing time constant, identifies the harmonics that drive the balancing process, and can quantify the steady-state balance booster losses for a designed target natural balance response. Extensive simulation and experimental tests have been performed to validate the theoretical model. [ABSTRACT FROM PUBLISHER]

Due to the fixed and limited sampling period in the real-time system, three-phase permanent-magnet synchronous machine (PMSM) drives using switching-table-based direct torque control (ST-DTC) usually suffer from steady-state error and ripple of torque. For the case of the dual three-phase system that has been widely investigated recently, the harmonic currents inevitably occur, which can be regarded as the third issue. This harmonic currents lead to the increase of losses and the decrease of system efficiency. Previous literature has addressed the aforementioned issues but only deals with either the torque ripple issues or harmonic currents. Therefore, this paper first introduces two types of synthetic vectors, which can reduce the harmonic currents effectively, as well as the most suitable switching sequences. Then, a modified five-level torque regulator has been proposed to improve the torque performance. With the proposed method, not only the harmonic currents have been suppressed, but also the steady-state error and ripple of torque can be considerably reduced, whereas the merits of classical ST-DTC, such as simple structure and excellent dynamic performance, are preserved. The experimental results validate the effectiveness of the proposed strategy. [ABSTRACT FROM PUBLISHER]

In this paper, a class-D audio amplifier which combines the advantages of the phase-shifted carrier pulsewidth modulation (PWM) and the multiple-level carrier PWM is proposed with a dual-level dual-phase carrier (DLDPC) PWM. The proposed closed-loop amplifier includes a second-order integrator and a DLDPC triangular wave generator. Two sets of 180° out-of-phase triangular waves are used as carriers, and each set has its respective offset voltage level with nonoverlapping amplitude. By performing the double Fourier analysis, it can be found that the linearity can be enhanced and the distortion can be reduced with the proposed modulation. Experimental results show that the proposed fully differential DLDPC PWM class-D audio amplifier features a total harmonic distortion lower than 0.01% with an output voltage swing of $\pm$5 V. [ABSTRACT FROM PUBLISHER]

In this paper, a multilevel dodecagonal voltage space vector structure with nineteen concentric dodecagons is proposed for the first time. This space vector structure is achieved by cascading two sets of asymmetric three-level inverters with isolated H-bridges on either side of an open-end winding induction motor. The dodecagonal structure is made possible by proper selection of dc link voltages and switching states of the inverters. The proposed scheme retains all the advantages of multilevel topologies as well as the advantages of dodecagonal voltage space vector structure. In addition to that, a generic and simple method for calculation of pulsewidth modulation timings using only sampled reference values ( $v_\alpha$ and $v_\beta$) is proposed. This enables the scheme to be used for any closed-loop application such as vector control. In addition, a new method of switching technique is proposed, which ensures minimum switching while eliminating the fifth- and seventh-order harmonics and suppressing the eleventh and thirteenth harmonics, eliminating the need for bulky filters. The motor phase voltage is a 24-stepped waveform for the entire modulation range thereby reducing the number of switchings of the individual inverter modules. Experimental results for steady-state operation, transient operation, including start-up have been presented and the results of fast Fourier transform analysis is also presented for validating the proposed concept. [ABSTRACT FROM PUBLISHER]

In this paper, an analysis and calculation of the dc-link current and voltage ripples are presented for a three-phase inverter with unbalanced load. A comparison of the dc-link average and root-mean-square (rms) currents between considering and ignoring high frequency harmonics of the output current is drawn. It is shown that high frequency harmonic currents have little effect on the dc-link current, and therefore, they can be ignored. Based on the symmetrical components method, the dc-link average and harmonic rms currents are derived, and the dc-link voltage ripple is compared between the balanced and unbalanced loads. It can be found that the dc-link current and voltage ripples consist of not only high frequency harmonics but also the double fundamental frequency harmonic, and the voltage ripple is independent of the positive-sequence component and determined by the negative-sequence component, under the unbalanced load. Experimental results are shown to verify the accuracy of the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a technique to suppress low-order harmonics for an open-end winding induction motor drive for a full modulation range. One side of the machine is connected to a main inverter with a dc power supply, whereas the other inverter is connected to a capacitor from the other side. Harmonic suppression (with complete elimination of fifth- and seventh-order harmonics) is achieved by realizing dodecagonal space vectors using a combined pulsewidth modulation (PWM) control for the two inverters. The floating capacitor voltage is inherently controlled during the PWM operation. The proposed PWM technique is shown to be valid for the entire modulation range, including overmodulation and six-step mode of operation of the main inverter. Experimental results have been presented to validate the proposed technique. [ABSTRACT FROM PUBLISHER]

Pulse width modulation schemes are aimed at adjusting the fundamental component while reducing the harmonic content of an inverter output voltage or current. This paper addresses the topic of optimal inverter operation in reference to a given objective function. The objective function could embody either a single performance criterion, such as voltage or current total harmonic distortion (THD), or a weighted sum of multiple criteria. The proposed method ensures primacy of the chosen solution while imposing no restriction over its modulation index. In particular, operating the inverter by the chosen solution would result in performances superior to any other modulation scheme commutating in an equal number of switching angles per fundamental cycle. The proposed method allows for the consideration of practical inverter constraints and prevents the possibility of impractical switching sequence. A detailed investigation of the method is given, accompanied by two practical cases minimizing, respectively, phase-voltage THD and line-current THD of a three-level inverter. Selected simulation and experimental results are presented to validate the theoretical part. [ABSTRACT FROM AUTHOR]

This paper investigates the improved switching-table-based direct torque control strategies (ST-DTC) for dual three-phase permanent magnet synchronous machine drives. The classical ST-DTC scheme for dual three-phase drives is usually seriously penalized by significant current harmonics, which cause large losses and reduce the efficiency of the drive system. Hence, a modified switching table consisting of 12 new synthetic voltage vectors is proposed. With this new switching table, not only the variables relating to the torque production are well controlled, but also the variables contributing to the current harmonics are eliminated successfully within one sampling period. Furthermore, a simple modified torque regulator is proposed to reduce the torque ripple and the steady-state error of torque which is usually observed in the real-time system. The switching sequence which is most suitable for the implementation of the real-time system has been proposed to minimize the computation burden. The proposed strategy only changes the switching table and torque regulator without any major modifications, and hence, the merits of the classical direct torque control, i.e., simple structure and good robustness, are still preserved. The experimental results validate the effectiveness of the proposed strategy. [ABSTRACT FROM PUBLISHER]

Current measurement and pulsewidth modulation (PWM) are critical components of modern current-controlled voltage source inverters. Current measurements enable accurate and robust closed-loop control of current, while PWM enables the efficient high-bandwidth regulation of the voltage. These two components do not operate independently, however. The synthesized voltage from PWM, a sequential series of discrete voltage levels, from a predefined finite set of possible levels, is only equivalent to the desired voltage on an average basis. As a result, the response of the electrical current to this synthesized voltage deviates from the response to the desired voltage. This deviation from the desired response, when combined with the standard synchronous sampling method, results in current measurement errors. This paper will present an analytical derivation of this current response deviation. This can be used to model the current measurement errors. A better understanding of this phenomenon will result in better design and control of power converter systems. The analytical work will be evaluated and verified using simulations and experimental measurements. [ABSTRACT FROM PUBLISHER]

Many recent multilevel inverter papers end up with voltage total harmonic distortion (THD) values obtained from numerical voltage spectrum calculations (measurements). Motivated by IEEE Standard 519, a part of the multilevel research community uses a limited harmonic count to evaluate the multilevel voltage quality. First, this causes significant voltage THD underestimation, particularly for relatively high frequency PWM. Second, for a three-phase star-connected balanced load with an isolated neutral and phase symmetric modulation strategy, the calculated load line and phase voltage THD become different. However, simple considerations show that line and phase voltage THDs are essentially the same in this case. It may be difficult to judge about the multilevel voltage quality given a numerically calculated (measured) voltage THD value that may be subject to computation errors. Presented are simple smooth hyperbolic voltage THD upper and lower bound approximations for single- and three-phase inverters with nearest synchronous switching. They are valid for arbitrary modulation indices and uniformly distributed level counts and may practically serve as good reference values. [ABSTRACT FROM PUBLISHER]

This paper proposes a new modulated carrier control method for an interleaved continuous conduction mode (CCM) power factor correction (PFC) boost converter. The proposed method allows precise sinusoidal line current shaping for a PFC boost converter operating in CCM. This is accomplished by simply comparing modulated carrier signal with switch current, such that inner current loop compensation design and rectified line voltage sensing are not required. The proposed control method greatly simplifies current sensing and control circuitry of multiphase converters since average current control is available by just sensing the switch current for each module. This also enables simple current balancing between parallel converters by employing modulated carrier signals with same amplitude. The principle of the control method is presented. The performance of the proposed control method is experimentally verified on a 600-W PFC converter. The measured power factor remains above 94.9% down to 20% of a full load for 110-Vrms and 220-Vrms line voltages. The line current harmonics also meet the IEC61000-3-2 Class D standard. [ABSTRACT FROM AUTHOR]

The analysis and assessment of the pulsewidth modulation (PWM) techniques is commonly based on the comparison of the total harmonic distortion (THD) results. THD is usually calculated by application of the Fourier transformation and by taking a limited number of harmonics into the consideration. In this paper, derivation of analytical formulas for the phase voltage THD is presented. The considered system is a symmetrical multiphase star-connected load, supplied from a multilevel pulsewidth-modulated voltage-source inverter (VSI, three-phase case is also covered). The solution is based on the Parseval's theorem, which links frequency spectrum and time domain through the average power (i.e., root-mean-square (rms) squared value) of the signal. The assumption throughout the derivations is that the ratio of the switching to fundamental frequency is high. Derivations are based on the integration of the power of the PWM signal in a single switching period over the fundamental period of the signal. Only ideal sinusoidal reference voltages are analyzed, and no injection of any type is considered. Formulas for phase voltage THD for any number of phases are derived for two- and three-level cases, for the most commonly used carrier-based methods. Comparison of the analytically obtained curves with simulation and experimental results shows a high level of agreement and validates the analysis and derivations. [ABSTRACT FROM AUTHOR]

This paper presents input-series–output-parallel (ISOP) configuration for single-phase front-end buck rectifiers (BRs). The configuration is especially suitable for traction applications, where the complete rectification system needs to withstand high ac voltages and supply medium-power loads. The primary rectification module of the proposed configuration is based on pulsewidth-modulated BR (current source inverter topology). The desired isolation, mandatory for ISOP connection, is provided at the dc stage through a medium-frequency/high-frequency transformer. Equal power sharing by modules is achieved from the ac side through input voltage and current sharing. The proposed control scheme is configured using two loops. While the outer loop regulates the output dc voltage and active wave shaping of the source current, the inner loop ensures stable voltage sharing. The performance of the proposed ISOP configuration is verified using numerical simulation. Experimental verification is achieved through a 2-kW grid-connected laboratory prototype. [ABSTRACT FROM PUBLISHER]

This paper presents an analytical method that makes it possible to define the pulsewidth modulation (PWM) supply output voltage spectral content, particularly the harmonic phase sequences, without switching instant determination. The results obtained from these developments lead to define a PWM control strategy that allows deleting some switching harmonics in order to reduce undesirable effects. Numerical studies and experiments confirm the theoretical approach and this harmonic control strategy. [ABSTRACT FROM PUBLISHER]