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Cascaded converters are adopted in many power systems to manage sources and loads at different voltage levels simultaneously. DC bus capacitor is one of the key components in these converters due to its energy storage and fast response capabilities. However, the ripple current through the capacitor will influence its lifetime and the overall efficiency of the converter. Previous studies showed that the capacitor current of ac systems is optimized when the duty cycles are synchronized under in phase or antiphase condition. In this paper, the bus capacitor ripple current of cascaded two-stage converters for dc systems with different combinations of duty cycles is analyzed. It is found that the optimum capacitor current ripple varies depending on the values of individual duty cycles and the phase-shift angle between them. By properly adjusting the phase shift, the capacitor RMS current value can be reduced without affecting the converter normal operation or the need for extra sensing circuits, hence improving the energy conversion efficiency and prolonging the capacitor lifetime with relatively simple implementation. To illustrate, a case study of a two-stage dc/dc converter is carried out. A laboratory prototype converter confirmed a maximum efficiency improvement of 2.8% if the phase shift is adjusted properly when compared to the same converter with the worst case phase-shift angle. [ABSTRACT FROM AUTHOR]

This paper proposes a new three-phase modular multilevel inverter (MMLI). The proposed inverter consists of repeated modular primary cells that are connected in series configuration. Therefore, the proposed topology can be extended to get more output voltage levels by adding additional cells without increasing voltage stresses across power switches. Both sinusoidal pulsewidth modulation (SPWM) and staircase modulation are successfully applied to the proposed inverter. The proposed inverter features many advantages such as reduced number of semiconductor power switches, driver circuits, dc-voltage sources, simplified control algorithm, and reduced voltage stresses across the switches independent of output voltage level. Furthermore, the performance of the proposed inverter is studied under both open-loop and closed-loop operations for highly inductive load. Beside the obtained simulation results, a laboratory prototype has been carried out and tested to verify the control techniques and performances of the topology. Simulation and experimental results are compared together to highlight the similarity and consistence of them. [ABSTRACT FROM AUTHOR]

A new single-phase \uppi-\texttype 5-level inverter using 3-terminal switch-network (3TSN) is proposed in this paper. The topology is considered as a variant of T-type 3-level structure or dual-buck inverter with coupled inductors. This new inverter is suitable for multilevel power inversion with low dc-bus voltage. The merit of the proposed topology is to apply only four active power switches to achieve 5-level operation. Other benefits include double frequency operation of output inductor and equal division of the current that flows through power switches and filter inductor. Hence, it leads to high efficiency and low harmonics. These characteristics allow improvement of losses distribution and volume reduction of output filter inductor. The operation scenario with sinusoidal pulsewidth modulation (SPWM) is described in details. Meanwhile, the magnetic analysis and design are studied and discussed. Finally, a prototype is built to verify the theoretical analysis and demonstrate the benefits of the proposed topology. [ABSTRACT FROM AUTHOR]

The flying-capacitor-based multilevel converter is one of the well-known breeds of the multilevel power converters. This paper proposes a new flying-capacitor-based multilevel converter to minimize the number of flying capacitors (FCs) and power switches. The advantage of the proposed FC-based multilevel converter in comparison with the conventional flying-capacitor multicell converter is that it needs fewer FCs. Also, in comparison with the stacked multicell converter, the proposed multilevel converter requires fewer semiconductor switches. In order to balance the voltage of the FCs in proposed multilevel converter, a new active voltage balancing method which is fully implemented using logic-form equations is presented. The proposed voltage balancing method measures output current and FC voltages to generate switching states to produce the required output voltage level, as well as balance the FCs voltages at their reference values. The output voltage of the proposed multilevel converter controlled with suggested active voltage balancing method can be modulated with any pulse-width-modulation (PWM) method, such as phase-shifted-carrier PWM or level-shifted-carrier PWM. Simulation results and experimental measurements of proposed FC-based multilevel converter are presented to verify the performance of the proposed converter, and its novel switching and modulation strategy, which is based on the active voltage balancing method. [ABSTRACT FROM PUBLISHER]

Four-level hybrid-clamped (4L-HC) inverter is a newly proposed topology which is suitable for high-performance medium-voltage drives. Each phase of this topology consists of eight switches and a flying capacitor and the dc-link is split into three parts by two neutral points. In order to ensure the topology operating properly, the voltages across the flying capacitors and three dc-link capacitors should be controlled and maintain balanced at their nominal values. This paper presents a decoupled voltage balancing method for this 4L-HC inverter, including the voltage balancing of dc-link capacitors and flying capacitors. A modified phase-shifted pulse-width modulation method is used to regulate the voltages of flying capacitors and the central dc-link capacitor. The relationship between the neutral-point currents and the output voltage is studied and the upper and lower dc-link capacitor voltages are balanced by injecting an optimum zero-sequence voltage. Simulation and experimental results are presented to verify the validity of this method. [ABSTRACT FROM AUTHOR]

This paper presents a novel topology for a direct ac–ac power converter, called as the “three-to- k” phase matrix converter. The input to the proposed matrix converter configuration is a three-phase fixed voltage and a fixed frequency supply from the grid. The output is a variable voltage and variable frequency ac supply of any number of phases (k phase). However, the discussion is limited here for a k that is equal to odd number of phases. As an example, a “three-to-five” phase matrix converter is utilized for discussion and analysis. This paper also proposes two pulsewidth modulation (PWM) control techniques for the general topology of the “three-to- k” phase matrix converter. This is based on the so-called direct duty ratio PWM (DPWM). In one presented technique, the output voltage is limited to one half of the input voltage. For the other proposed scheme, the output voltage is enhanced to 78.86% of the input voltage. The proposed control algorithm is validated using simulation and an experimental approach. [ABSTRACT FROM AUTHOR]

The nongenerative-boost type rectifier, which is called the Vienna rectifier, is advantageous in terms of efficiency and current total harmonic distortion. Therefore, the Vienna rectifier is used in grid-connected applications such as telecommunication systems and wind turbine systems. Owing to the structural characteristics of the Vienna rectifier, various switching methods exist. Among these methods, a carrier-based discontinuous pulse-width modulation (CB-DPWM) method guarantees high efficiency compared to continuous pulse-width modulation methods; moreover, it is simple compared to a DPWM method based on space vectors. In this paper, the performance of the CB-DPWM method, its applicable region depending on the power factor and modulation index (Ma ), and its efficiency are analyzed in detail. Then, based on the analysis, a neutral-point voltage balancing method for the CB-DPWM method is proposed. The effectiveness and performance of the proposed neutral-point voltage balancing method are verified by simulation and experiment. [ABSTRACT FROM AUTHOR]

This paper proposes a new type of ac–ac converter which can operate as traditional noninverting buck and boost converters, and inverting buck–boost converter as well. The proposed converter uses six unidirectional current flowing and bidirectional voltage blocking switches, implemented by six reverse blocking insulated-gate bipolar transistors (IGBTs) or series mosfet–diode pairs, two input and output filter capacitors, and one inductor. It has no shoot-through problem of voltage source (or capacitor) even when all switches are turned-on, and therefore, pulsewidth modulation dead-times are not needed resulting in high-quality waveforms, and solves the commutation problem without using bulky and lossy RC snubbers or dedicated soft-commutation strategies. It has smaller switching losses because only two switches out of six are switched at high frequency during each half-cycle of input voltage, and it can use power MOSFETs as body diode never conducts, making it immune from mosfet failure risk which otherwise may occur due to poor reverse recovery problem of body diode. The noninverting buck–boost mode of the proposed converter can be used in applications with both step-up and step-down demand, while the inverting buck–boost mode can also be used in its application as dynamic voltage restorer. Detailed analysis of the proposed converter is given, and experimental results are also provided. [ABSTRACT FROM AUTHOR]

In this paper, a new inverter topology is proposed for generating a multilevel dodecagonal voltage space vector structure for open-end winding induction motor (IM) using a single dc source. Dodecagonal voltage space vector structure eliminates fifth- and seventh-order harmonic voltages from phase voltage output and hence eliminates the fifth- and seventh-order harmonic currents through the motor leading to removal of the dominant sixth-order torque ripple generation in the motor over the entire modulation range. Multilevel space vector structure generates output voltage with better THD and low dv/dt. In the proposed topology, two three-level inverters drive an open-end winding IM, one inverter from each side. DC-link of primary inverter is from a dc source which delivers the entire active power, whereas the secondary inverter dc-link is maintained by a capacitor, which is self balanced during the inverter operation. The PWM scheme implemented ensures low switching frequency for primary inverter. Secondary inverter operates at a small dc-link voltage. Hence, switching losses are small for both primary and secondary inverters. Experimental results show the elimination of fifth- and seventh-order harmonic voltages over the entire modulation range, validating effectiveness of the proposed multilevel inverter scheme. [ABSTRACT FROM PUBLISHER]

In this paper, a three-phase multilevel power factor correction rectifier using the hybrid switched-capacitor concept is proposed. The converter is suitable for high-voltage-gain applications from conventional three-phase low-voltage sources. The three-level voltage operation reduces the weight and bulk of the magnetic devices. The main advantages of the proposed converter are low number of active switches, high voltage gain, sinusoidal currents, low voltage stress across all components, and simple control. Both steady-state and dynamic analyses are investigated. Experimental results for a 7500-W/220-V-to-1600-V laboratory prototype with maximum efficiency of 97.78% are presented and discussed. [ABSTRACT FROM AUTHOR]

This paper proposes three dynamic voltage restorer (DVR) topologies. Such configurations are able to compensate voltage sags/swells in three-phase four-wire (3P4W) systems under balanced and unbalanced conditions. The proposed systems use two independent dc links. Proposed configurations present advantages in terms of switch blocking voltages and consequently lower dc-link voltage rating. The complete control system, including the pulsewidth modulation (PWM) technique, is developed, and comparisons between the proposed configurations and a conventional one are performed. Simulation and experimental results are provided to validate the theoretical approach. [ABSTRACT FROM AUTHOR]

Multilevel inverters are gaining more attention in ac drive application due to their many attractive features. In the case of conventional neutral-point-clamped (NPC) or flying capacitor multilevel inverter configurations, active switches are connected in series to produce multilevel output voltage waveform. Therefore, if any one switch fails, the entire configuration has to be shut down; this will reduce the reliability of the system. A dual three-level inverter configuration for induction motor drive is proposed in this paper to improve reliability of the system. This topology is developed by feeding four-pole induction motor stator winding with four conventional two-level inverter modules. A level-shifted carrier-based third harmonic injection pulsewidth-modulation technique is used to produce the gating signals for the proposed configuration. By providing proper phase shift between carrier waves, multilevel voltage waveform is produced across the total motor phase winding, and first center band harmonics are also canceled. Thereby, the torque ripple will be considerably reduced compared with conventional NPC five-level inverter-driven induction motor drive. Finite-element analysis (FEA) is used to estimate the torque ripple when induction motor is supplied by the proposed configuration and conventional five-level NPC inverter configuration to show the effectiveness of the proposed converter. The proposed configuration is simulated using MATLAB/Simulink and experimentally verified using a laboratory prototype with a 5-hp four-pole induction motor drive. [ABSTRACT FROM PUBLISHER]

This paper presents a voltage regulator topology, implemented using low-voltage devices, for converting high input voltage (>4.5 V) to low output voltages with fine-grain control (0.3 to 1 V). The topology merges a Dickson's switched-capacitor stage with a current-mode inductive buck stage, and optimizes the frequency of operations to reduce the overall passive size. The proposed two-stage hybrid regulator, designed in 130-nm standard digital process, operates from 4.8 to 6 V at input and regulates output voltage as low as 0.3 V with a maximum output power of 90 mW and a peak efficiency of 69%. [ABSTRACT FROM PUBLISHER]

This paper proposes a new five-level voltage source inverter for medium-voltage high-power applications. The proposed inverter is based on the upgrade of a four-level nested neutral-point clamped converter. This inverter can operate over a wide range of voltages without the need for connecting power semiconductor in series, has high-quality output voltage and fewer components compared to other classic five-level topologies. The features and operation of the proposed converter are studied and a simple sinusoidal PWM scheme is developed to control and balance the flying capacitors to their desired values. The performance of the proposed converter is evaluated by simulation and experimental results. [ABSTRACT FROM PUBLISHER]

This paper proposes and evaluates an active voltage-balancing method for stacked multicell converters (SMCs) using phase-shifted pulse width modulation. The method is easy to implement and can be applied to SMCs with any number of levels. The proposed method balances the voltages of the capacitors by modifying the duty cycle of each switch of the SMC using a proportional controller. The direction of the output current and the crossed effect among the duty cycles of the switches is considered and used to improve capacitor voltage balance. The performance of the proposed voltage-balancing method is verified experimentally for different loads, such as linear and nonlinear loads, and under transient conditions. [ABSTRACT FROM PUBLISHER]

A capacitor voltage-balancing method for a nested neutral point clamped (NNPC) inverter is proposed in this paper. The NNPC inverter is a newly developed four-level voltage-source inverter for medium-voltage applications with properties such as operating over a wide range of voltages (2.4–7.2 kV) without the need for connecting power semiconductor in series and high-quality output voltage. The NNPC topology has two flying capacitors in each leg. In order to ensure that the inverter can operate normally and all switching devices share identical voltage stress, the voltage across each capacitor should be controlled and maintained at one-third of dc bus voltage. The proposed capacitor voltage-balancing method takes advantage of redundancy in phase switching states to control and balance flying capacitor voltages. Simple and effective logic tables are developed for the balancing control. The proposed method is easy to implement and needs very few computations. Moreover, the method is suitable for and easy to integrate with different pulse width modulation schemes. The effectiveness and feasibility of the proposed method is verified by simulation and experiment. [ABSTRACT FROM PUBLISHER]

In this paper, a modified half-bridge (HB) resonant inverter topology with a dc-link neutral-point-clamped cell is proposed. A pseudo asymmetrical voltage-cancellation PWM method and a control strategy are introduced. The proposed topology can maximize the inverter output power factor, and minimize variations in the switching frequency. In addition, most switches are clamped to half of the dc input voltage at turn-off, increasing the overall efficiency of the system for a wide load range. The efficiency of the proposed inverter is improved up to 7% at light-load conditions compared with that of the conventional HB inverter. Informative expressions for performance comparison between the proposed inverter and its counterpart are provided. In addition, the losses in the inverter primary components are analytically analyzed in detail. For validation, a 120-W prototype is implemented, and experimental results are presented. [ABSTRACT FROM PUBLISHER]

Recently, novel direct pulse width modulated (PWM) ac–ac converters using coupled inductors with switching cell structure have been introduced as an alternative to the conventional ac–ac converter topology. The converters can effectively solve the commutation problem associated with the conventional direct PWM ac–ac converters. However, the two coupled inductors used in the topology make the converters less attractive for use in practical applications. This paper proposes magnetic integration of the discrete-coupled inductors in single-phase ac–ac converters. The dc offset fluxes generated by the common-mode currents are cancelled out perfectly when the windings on the common core are appropriately arranged, resulting in ac flux only. The proposed inductor shows significant improvements over discrete-coupled inductors, in that the proposed inductor does not have an air gap, it exhibits symmetrical winding currents, and it has smaller volume with large current handling capability. The proposed inductor can handle an unlimited amount of current due to the absence of core saturation caused by the current and is well suitable for high power ac–ac conversion applications. The performance evaluation and comparison of the experimental results show that the net volume of the coupled magnetic components can be reduced by more than 50% with the proposed integration scheme. [ABSTRACT FROM PUBLISHER]

This paper revisits the switched flow graph (SFG) technique. A general and unified equivalent SFG model of a three-terminal switcher encountered in regular and tapped inductor converters operating in the continuous conduction mode is proposed. The model can be applied to most PWM topologies and facilitates construction of a complete flow graph of a given converter. The approach can be helpful in theoretical analysis and derivation of analytical expressions of converter's small-signal transfer functions. The suggested methodology extends the previously proposed SFG analysis technique and alleviates the principal difficulties involved. Furthermore, the approach is straightforward and expeditious. Application guidelines and examples are presented and compared to simulation and earlier theoretical results. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel single-phase ac–ac Z-source converter based on the Γ-structure. The proposed converter uses a coupled transformer to produce the required gain. The obtained gain can be tuned by varying the turn ratio $\gamma _\Gamma$ of the transformer within the narrow range of $1 < \gamma _\Gamma < 2$. Also, the gain factor increases with decrease of the transformer turns ratio, $\gamma _\Gamma$ . Small transformer turn ratio results in more practical topology in some voltage gains. It makes the transformer design easier and reduces construction cost. Also, in the proposed topology, the input and output voltages share the same ground. In order to avoid voltage and current spikes on the switches, a commutation strategy is proposed and safe commutation is achieved without using a snubber circuit. The operating principles and steady-state analyses are presented to verify the operational concept of the proposed topology. Also, experimental results are given to verify the validation of the proposed converter. [ABSTRACT FROM AUTHOR]

In this paper, the performance of the new three-dimensional space vector-based switching signal generation technique for a grid-connected four-leg voltage source inverter used as a shunt compensator is proposed. The shunt compensator can be used for reactive power compensation, harmonic elimination, load balancing, and neutral current elimination in a three-phase four-wire grid-connected system. It is shown through experimental studies that switching losses in the four-leg voltage source inverter are appreciably reduced to a maximum of 33% in three-dimensional space vector modulation without NULL vector as the number of switches controlled at any instant of time is six out of eight. The new proposed technique is compared with three-dimensional space vector modulation with null vector. Experimental results are given to show the validity of the proposed switching control strategy. [ABSTRACT FROM AUTHOR]

Carrier-based pulsewidth-modulation (CBPWM) techniques are popular due to their simplicity, and have been widely researched for various three-phase inverter configurations. In this paper, two CBPWM techniques are proposed to reduce the common-mode (CM) voltage generated by the five-phase inverter. The five-phase inverters have more flexibility in reducing the CM voltage than their three-phase counterparts because they have more phase legs, hence finer control over the star-point voltage of the load. Two methods are proposed for the conventional two-level five-phase inverter to reduce the CM voltage; one utilizing adjacent modulating waveforms and the other utilizing nonadjacent modulating waveforms. The coupled inductor inverter (CII) uses coupled inductors to generate multilevel outputs. As the volt-second balance must be maintained across each coupled inductor, direct application of the proposed methods on the CII inverter will result in overcurrents in the coupled inductors. Hence, the proposed methods are further improved to ensure the volt-second integral over each switching period is zero. Moreover, the two proposed methods are designed to reduce switching events and prevent unexpected states occurring during the switching transitions. The performance and the switching strategy of both methods are verified by both simulations and experiments on a prototype of five-phase CII. [ABSTRACT FROM AUTHOR]

This paper proposes an indirect matrix converter (IMC) topology to supply a five-phase load directly from three-phase ac power sources without bulky electrolytic capacitors and explains its operating principle. Using the emerging topology, which combines the five-leg inverter into the rectifier stage of the conventional IMC, the three-to-five-phase IMC topology reduces the number of power switches and results in a simpler commutation compared with the conventional three-to-five-phase direct matrix converter. In addition, a simple approach to realize the carrier-based pulsewidth modulation (CBPWM) method for a three-to-five-phase IMC is presented, and the proposed CBPWM method is analyzed based on the space-vector approach. As a result, the IMC with the proposed CBPWM method can be more easily implemented compared with IMCs with the space-vector PWM method. A three-to-five-phase IMC control platform is realized by coordinating a TMS320F28335 DSP (Texas Instruments) with an EPM7128SLC84-15 field-programmable gate array (Altera). The simulation and experimental results are provided to verify the effectiveness of the CBPWM strategy. [ABSTRACT FROM AUTHOR]

A novel complementary phase disposition pulsewidth modulation method for the modular multilevel converter (MMC) with a limited number of submodules is proposed in this paper. Compared with the previous works, more practical issues have been considered, and the corresponding solutions have been provided. First, a new preset PWM signal mapping sequence and an improved virtual loop mapping (VLM) are used in the modulation. This method not only achieves a favorable capacitor voltage balance in the symmetry system but lowers the switching frequency of MMC's devices. Second, to further reduce the switching frequency, the unbalance margin of capacitor voltages is adopted to achieve the switching between the VLM and the selective VLM (SVLM). Moreover, the system robustness has been improved by considering the situation of symmetry losing, like cell fails; in these cases, the capacitor voltages of the upper and lower arms are balanced through the collaboration of the SVLM and the reconfigurable VLM. Finally, the effectiveness of the proposed method has been verified with simulation and experimental studies. [ABSTRACT FROM AUTHOR]

The Vienna rectifier, which is a nongenerative-boost type rectifier, is used in many applications such as telecommunication systems and wind turbine systems. The Vienna rectifier has a special operating requirement. Many switching methods considering this requirement were proposed. These methods generally take into account the Vienna rectifier's operation with the unity power factor because the Vienna rectifier aims to provide the power to the load. However, as the applications for the Vienna rectifier are diversified, control requirements have been suggested, including the dc-link voltage balance control and the novel control under severely unbalanced grids. In this paper, we propose a carrier-based pulse-width modulation (CB-PWM) method for Vienna rectifier operation with a variable power factor. The proposed CB-PWM method adds the compensation voltage to the three-phase reference voltages, depending on the power factor, to maintain the sinusoidal input currents of the Vienna rectifier. The performance and effectiveness of the proposed CB-PWM method are verified by simulation and experiment. [ABSTRACT FROM AUTHOR]

This paper investigates a dynamic voltage restorer (DVR) composed of two conventional three-phase inverters series cascaded through an open-end winding (OEW) transformer, denominated here DVR-OEW. The DVR-OEW operating with either equal or different dc-link voltages is examined. The proposed topology aims to regulate the voltage at the load side in the case of voltage sags/swells, distortion, or unbalance at the grid voltage. A suitable control strategy is developed, including space-vector analysis, level-shifted PWM and its equivalent optimized single-carrier PWM, as well as the operating principles and characteristics of the DVR. Comparisons among the DVR-OEW and conventional configurations, including a neutral-point clamped converter-based DVR, are furnished. The main advantages of the DVR-OEW compared to the conventional topologies lie on: 1) reduced harmonic distortion, 2) reduced converter losses, and 3) reduced voltage rating of the power switches. Simulated and experimental results are presented to validate the theoretical studies. [ABSTRACT FROM AUTHOR]

In this paper, a pulsewidth modulation (PWM) plus secondary-side phase-shift (SSPS) controlled full-bridge three-port converter (FB-TPC) is proposed for a renewable power system, which is derived by integrating two interleaved buck/boost circuits (IBBC) and a SSPS full-bridge converter (FBC), to interface the energy source, energy storage element, and output load simultaneously. The two switching legs are shared by the IBBC and FBC, which improves the active devices sharing ratio and power density. With PWM plus SSPS control scheme, decoupled power control can be realized and the converter can achieve wide input voltage range power conversion. In addition, zero-voltage switching (ZVS) of both the primary and secondary switches are achieved in a wide range. Furthermore, the circulating current can be greatly eliminated, which helps to reduce conduction losses. Moreover, the voltage stresses on the secondary rectifier are effectively suppressed since the power switches and diodes are clamped to output voltage. The operation principles, output characteristics, ZVS performances, and control strategy are analyzed in detail. Experimental results of a 600-W prototype are provided to verify the effectiveness and the advantages of the proposed converter. [ABSTRACT FROM PUBLISHER]

A family of “Two-Switch Boosting Switched-Capacitor Converters (TBSC)” is introduced, which distinguishes itself from the prior arts by symmetrically interleaved operation, reduced output ripple, low yet even voltage stress on components, and systematic expandability. Along with the topologies, a modeling method is formulated, which provokes the converter regulation method through duty cycle and frequency adjustment. In addition, the paper also provides guidance for circuit components and parameter selection. A 1-kW 3X TBSC was built to demonstrate the converter feasibility, regulation capability via duty cycle and frequency, which achieved a peak efficiency of 97.5% at the rated power. [ABSTRACT FROM AUTHOR]

Photovoltaic systems technological development is driven by the request for higher efficiency and safety. These concerns influence also the choice of the power converter stage. Several topologies have been proposed and many of them are available commercially. Among them, the neutral point clamped (NPC) and derived topologies offers high efficiency, low leakage current, and low EMI. However, one main disadvantage of the NPC inverter is given by an unequal distribution of the losses in the semiconductor devices, which leads to an unequal distribution of temperature that can affect lifetime. By using the active NPC (ANPC) topology, where the clamping diodes are replaced by bidirectional switches, the power losses distribution problem is alleviated. The modulation strategy is a key issue for losses distribution in this topology. In this paper, two known strategies are discussed and a new PWM strategy, namely the adjustable losses distribution is proposed for better losses distribution in the ANPC topology. Simulations and experimental results help in evaluating the modulation strategies. [ABSTRACT FROM AUTHOR]

A hybrid switched-capacitor/interleaved boost converter able to provide a high voltage gain and to cancel the input current ripple at a preselected duty cycle was recently presented in the literature. This paper extends that work by proposing an optimized switching strategy for operating conditions at other values of duty cycle. The switching strategy effect on the converter's voltage gain and input current ripple is quantified and compared against the performance under the conventional switching strategy. The approach is validated in the laboratory through hardware prototyping. [ABSTRACT FROM PUBLISHER]

This paper presents a capacitor voltage balancing control applicable to any multilevel dc–ac converter formed by a single set of series-connected capacitors implementing the dc link and semiconductor devices, such as the diode-clamped topology. The control is defined for any number of dc-link voltage levels and converter legs (for single-phase and multiphase systems), guaranteeing the capacitor voltage control for any modulation index value and load (from idle mode to full power). The associated control loop small-signal transfer function is presented, from which optimum compensator design guidelines are derived. The improvement in control performance is verified through simulation and experiments comparing with a previous balancing control strategy in a four-level three-phase dc–ac conversion system. The satisfactory control performance is also verified through simulation in a four-level five-phase dc–ac conversion system. [ABSTRACT FROM PUBLISHER]

Five-level active neutral-point clamped (5L-ANPC) converter is an attractive topology for high-power medium-voltage motor drives. This paper presents a capacitor voltage-balancing method for the 5L-ANPC converter, including the voltage balancing of dc-link capacitors and flying capacitors. In order to ensure that the series-connected or high-voltage switches of the 5L-ANPC converter are operated at fundamental frequency and the other switches are operated at a constant switching frequency, phase-shifted pulse width modulation is used to control this converter. The relationship between the average neutral-point current and zero-sequence voltage is investigated, and an optimum zero-sequence voltage is calculated to regulate the neutral-point potential. The voltage across the flying capacitor is also regulated by adjusting the switching duty cycles of two PWM signals, which varies the operation time of redundant switching states in each switching period. Simulation and experimental results are presented to verify the validity of this method. [ABSTRACT FROM AUTHOR]

This paper presents a dual-purpose offline LED driver with illumination control and visible light communications (VLC). LEDs, due to their nonlinear $I$– $V$ characteristics, are driven by constant current sources. The proposed dual-purpose offline LED driver realizes a constant current source by a buck converter without a capacitor using average current mode control. VLC is implemented through variable pulse position modulation scheme using a shunt switch in parallel to LED string. Conventional LED drivers are typically designed to perform illumination control with pulsewidth modulation (PWM) dimming at low frequencies ( $<$ 20 kHz), which results in audible noise due to the mechanical vibrations of inductors and piezoelectric properties of ceramic capacitors. The proposed converter presents an illumination control with PWM dimming frequencies above the audible range. The detailed control and modeling of the proposed dual-purpose LED driver using high-frequency model of LED string is discussed. The effects of the phosphor on phosphor-based white LEDs for VLC are reported. The proposed driver is experimentally evaluated on 110/120 ac mains with 450-lm output. The linear characteristics of PWM dimming for data transfer of 2 Mb/s are demonstrated. Detailed simulation and experimental results to validate the operation of the proposed converter are presented. [ABSTRACT FROM AUTHOR]

This paper presents input-series–output-parallel (ISOP) configuration for single-phase front-end buck rectifiers (BRs). The configuration is especially suitable for traction applications, where the complete rectification system needs to withstand high ac voltages and supply medium-power loads. The primary rectification module of the proposed configuration is based on pulsewidth-modulated BR (current source inverter topology). The desired isolation, mandatory for ISOP connection, is provided at the dc stage through a medium-frequency/high-frequency transformer. Equal power sharing by modules is achieved from the ac side through input voltage and current sharing. The proposed control scheme is configured using two loops. While the outer loop regulates the output dc voltage and active wave shaping of the source current, the inner loop ensures stable voltage sharing. The performance of the proposed ISOP configuration is verified using numerical simulation. Experimental verification is achieved through a 2-kW grid-connected laboratory prototype. [ABSTRACT FROM PUBLISHER]

Modular multilevel converter (MMC) has become one of the most promising converter topologies for future high-power applications. A challenging issue of the MMC is the voltage balancing among arm capacitors. A good overall control system is also vital for the MMC, which should be based on sound mathematical model, readily adaptable for different applications, and capable of high performance. This paper presents a general control structure for MMC inverters, which is suitable for both voltage-based and energy-based control methods, and includes voltage balancing between the upper and lower arms. A new method for voltage balancing among arm capacitors, which is based on an improved pulse-width modulation, is also presented. The proposed method avoids some major disadvantages found in present voltage balancing methods, such as dependence on computation-intensive voltage sorting algorithms, extra switching actions, interference with output voltage, etc. Furthermore, all switching actions are evenly distributed among power devices. The proposed control system as a whole can serve as a promising solution for practical applications, especially when the number of submodules is fairly high. Simulation and experimental results verify the effectiveness of the proposed methods. [ABSTRACT FROM AUTHOR]

Decades of research have seen single-phase boost-type pulse-width modulation converters be employed as front-end power factor correction (PFC) rectifiers in commercial power supplies. The benefits of employing this technology to comply with power quality standards while assuring high efficiency, low volume, and weight have been observed. However, this paper shows that further efforts can be driven toward new topologies. In this context, novel single-phase rectifier circuits are introduced. These are able to double or triple the ripple frequency present at the input components. Furthermore, a high utilization of the switches is observed during both positive and negative grid half-cycles. The theoretical analysis of the proposed topologies as well as their operation in PFC applications are presented and different operation modes are proposed and a comparison with a state-of-the-art PFC rectifier is presented. Finally, experimental verification of a PFC rectifier doubling the switching frequency is presented in a 1-kW prototype employing a current self-control strategy. [ABSTRACT FROM AUTHOR]

This paper presents a single-phase transformerless grid-connected photovoltaic converter based on two cascaded full bridges with different dc-link voltages. The converter can synthesize up to nine voltage levels with a single dc bus, since one of the full bridges is supplied by a flying capacitor. The multilevel output reduces harmonic distortion and electromagnetic interference. A suitable switching strategy is employed to regulate the flying-capacitor voltage, improve the efficiency (most devices switch at the grid frequency), and minimize the common-mode leakage current with the help of a novel dedicated circuit (transient circuit). Simulations and experiments confirm the feasibility and good performance of the proposed converter. [ABSTRACT FROM PUBLISHER]

This paper presents a multilevel inverter that has been conceptualized to reduce component count, particularly for a large number of output levels. It comprises floating input dc sources alternately connected in opposite polarities with one another through power switches. Each input dc level appears in the stepped load voltage either individually or in additive combinations with other input levels. This approach results in reduced number of power switches as compared to classical topologies. The working principle of the proposed topology is demonstrated with the help of a single-phase five-level inverter. The topology is investigated through simulations and validated experimentally on a laboratory prototype. An exhaustive comparison of the proposed topology is made against the classical cascaded H-bridge topology. [ABSTRACT FROM PUBLISHER]

Modular photovoltaic (PV) power conditioning systems (PCSs) require a high-efficiency dc-dc converter stage capable of regulation over a wide input voltage range for maximum power point tracking. In order to mitigate ground leakage currents and to be able to use a high-efficiency, nonisolated grid-tied inverter, it is also desirable for this microconverter to provide galvanic isolation between the PV module and the inverter. This paper presents a novel, isolated topology that is able to meet the high efficiency over a wide input voltage range requirement. This topology yields high efficiency through low circulating currents, zero-voltage switching (ZVS) and low-current switching of the primary side devices, ZCS of the output diodes, and direct power transfer to the load for the majority of switching cycle. This topology is also able to provide voltage regulation through basic fixed-frequency pulsewidth modulated (PWM) control. These features are able to be achieved with the simple addition of a secondary-side bidirectional ac switch to the isolated series resonant converter. Detailed analysis of the operation of this converter is discussed along with a detailed design procedure. Experimental results of a 300-W prototype are given. The prototype reached a peak power stage efficiency of 98.3% and a California Energy Commission (CEC) weighted power stage efficiency of 98.0% at the nominal input voltage. [ABSTRACT FROM AUTHOR]

This paper proposes the pulsewidth modulation (PWM) strategy of Z-source inverters (ZSIs) with minimum inductor current ripple. In existing PWM strategy with single-phase shoot-through, the shoot-through time interval is divided into six equal parts, therefore the three phase legs bear the equal shoot-through time interval. In this manner, the allotment and arrangement of the shoot-through state is easy to realize, but the inductor current ripple is not optimized. This causes to use relatively large inductors. In the proposed PWM strategy, the shoot-through time intervals of three phase legs are calculated and rearranged according to the active state and zero state time intervals to achieve the minimum current ripple across the Z-source inductor, while maintaining the same total shoot-through time interval. The principle of the proposed PWM strategy is analyzed in detail, and the comparison of current ripple under the traditional and proposed PWM strategy is given. Simulation and experimental results on the series ZSI are shown to verify the analysis. [ABSTRACT FROM PUBLISHER]

In this paper, the analysis of space vector modulation of a three-phase/wire/level Vienna rectifier is conducted, according to which the implementation of the equivalent carrier-based pulsewidth modulation is deduced theoretically within each separated sector in the diagram of vectors. The voltage balancing ability of dc-link neutral point, which depends on the uneven distribution of short vectors, is analyzed as well. An adaptive and robust controller to balance the output voltage under the unbalanced load limit for different modulation indices is proposed. The proposed controller can work at wide range of unbalanced load condition as well. Furthermore, the maximum unbalanced load is deduced versus the modulation index m when the converter works in unity power factor. An experimental prototype of 2.5 kW was built to verify the effectiveness of the theoretical analysis. Finally, the tested unbalanced limit of outputs for the experimental platform was given under different modulation indices. The output voltages for dual bus are balanced, and the theoretical analysis is verified. [ABSTRACT FROM PUBLISHER]

This paper presents the hybrid seven-level cascaded active neutral-point-clamped (ANPC)-based multilevel converter. The converter topology is the cascaded connection of a three-level ANPC converter and an H-bridge per phase. The voltage of the H-bridge is actively maintained to the required level through selection of the switching states of the converter. The topology is operated under selective harmonic elimination pulsewidth modulation (SHE-PWM), maintaining the switching frequency of the converter to a minimum. The operating principles, voltage balancing methods, and limitations of the converter are analyzed together with extensive simulation results of the topology. Experimental results from a low-power laboratory prototype are presented that verify the operation of the hybrid converter under SHE-PWM. [ABSTRACT FROM PUBLISHER]

This paper proposes a general methodology to analyze the interleaved pulse width modulation (PWM) dc–dc converter. A unified and simple model is constructed and the complete electrical behaviors of the interleaved PWM dc–dc converter could be predicted. Features of the interleaved PWM dc–dc converter are investigated based on this model. Insightful conclusions are derived and can be used to guide designs. This model could serve as a solid foundation for further research, and it is valid to all the common interleaved PWM dc–dc topologies. As an example of its applications, the input current of the interleaved boost converter is investigated in detail. Simulation and experimental results have successfully validated against theoretical analysis. [ABSTRACT FROM AUTHOR]

This letter proposes a boost dc–dc converter topology with the novel capability of canceling the input current ripple at an arbitrarily preselected duty cycle. This is accomplished without increasing the count of the number of components in contrast to other solutions available in the literature. In addition, the converter features a high voltage gain without utilizing extreme values of duty cycle or boosting transformers. These features make the converter ideal to process electric power coming from low-voltage power-generating sources, such as renewables. This paper provides details on the principle of operation via topological considerations and a mathematical model. The key factor of reactive component sizing is also discussed in detail. The converter was validated in the laboratory through the construction of a hardware prototype. [ABSTRACT FROM PUBLISHER]

Dodecagonal (12-sided) space vector pulsewidth modulation (PWM) schemes are characterized by the complete absence of (6n ± 1)th-order harmonics (for odd n) in the phase voltages, within the linear modulation range and beyond, including overmodulation. This paper presents a new topology suitable for the realization of such multilevel inverter schemes for induction motor (IM) drives, by cascading two-level inverters with flying-capacitor-inverter fed floating H-bridge cells. Now, any standard IM may be used to get the dodecagonal operation which hitherto was possible only with open-end winding IM. To minimize the current total harmonic distortion (THD), a strategy for synchronous PWM is also proposed. It is shown that the proposed method is capable of obtaining better THD figures, compared to conventional dodecagonal schemes. The topology and the PWM strategy are validated through analysis and subsequently verified experimentally. [ABSTRACT FROM AUTHOR]

This paper presents a soft-switching pulsewidth modulation (PWM) nonisolated boost dc–dc converter embedding an edge-resonant switched capacitor (ER-SWC) cell and its interleaved circuit topology. The conceptual boost dc–dc converter treated herein can achieve high-frequency zero-current soft-switching turn-on and zero-voltage soft-switching turn-off operations in the active switches and minimization of a reverse recovering current in the freewheeling diode under discontinuous conduction mode partially including critical conduction mode in the input current. Those advantageous properties enable a wide range of soft-switching operations together with a high-voltage step-up conversion ratio with a reduced current stress. Circuit design guideline based on the soft-switching range is introduced; then, a theoretical analysis is carried out for investigating the step-up voltage conversion ratio. For demonstrating the effectiveness of the ER-SWC soft-switching PWM boost dc–dc converter and its newly developed interleaved topology, laboratory prototypes are evaluated in experiments; then, their performances are discussed from a practical point of view. [ABSTRACT FROM PUBLISHER]

This paper presents a new Venturini-based direct matrix converter (DMC) output phase current reconstruction method using a single current sensor. This method is proposed in order to reduce the cost and to improve the reliability of the drive with any control strategy. The proposed technique measures the phase currents using a new single Hall current sensor location in the DMC. To demonstrate the advantages of the proposed system, an experimental bench with a DMC, an induction motor, and a DSP board is carried out to confirm the validity and feasibility of the proposed current reconstruction approach. [ABSTRACT FROM PUBLISHER]

Hybrid cascade multilevel inverters combine semiconductor devices of different voltage ratings and technologies, which theoretically allow high efficiency to be achieved. The bottlenecks of these topologies are, however, the need for isolated supplies for the cells and the lack of modularity. This paper focuses on the design and control of high-resolution, high-efficiency multilevel inverters with simplified dc power supplies. It introduces several rules for systematically designing the dc voltages of the cells, for which all unsupplied capacitor voltages can be regulated. Six classes of inverters are obtained covering single- and three-phase, staircase and pulsewidth-modulated (PWM) inverters. New configurations of hybrid cascade multilevel inverters are obtained for each class. A double modulation strategy with two different frequencies is proposed that allows switching losses of PWM inverters to be reduced. Decoupled mechanisms are proposed for the total and internal energy balances. It is shown how to make the design robust by taking into account conversion losses and large dc-voltage imbalances in the design and control. An analysis of the maximum voltage utilization and efficiency of the resulting configurations is carried out. The effectiveness of the novel concepts is validated experimentally for two of the proposed topologies. [ABSTRACT FROM PUBLISHER]

Fast fault detection and reconfiguration of power converters is necessary in electrical drives to prevent further damage and to make the continuity of service possible. On the other hand, component minimized converters may provide the benefits of higher reliability and less volume and cost. In this paper, a new fault-tolerant converter topology is studied. This converter has five legs before the fault occurrence, and after fault detection the converter continues to function with four legs. A very fast fault detection and reconfiguration scheme is presented and studied. Simulations and experimental tests are performed to evaluate the structure requirements, the digital reconfigurable controller, and fault detection scheme. For experimental tests, the control and the fault detection and reconfiguration schemes are implemented on a single field-programmable gate array (FPGA) chip. Experimental and simulation results show the effectiveness of the proposed fault-tolerant topology and its FPGA-based control. [ABSTRACT FROM PUBLISHER]

A six-switch three-phase inverter is widely used in a high-power grid-connected system. However, the antiparallel diodes in the topology operate in the hard-switching state under the traditional control method causing severe switch loss and high electromagnetic interference problems. In order to solve the problem, this paper proposes a topology of the traditional six-switch three-phase inverter but with an additional switch and gave a new space vector modulation (SVM) scheme. In this way, the inverter can realize zero-voltage switching (ZVS) operation in all switching devices and suppress the reverse recovery current in all antiparallel diodes very well. And all the switches can operate at a fixed frequency with the new SVM scheme and have the same voltage stress as the dc-link voltage. In grid-connected application, the inverter can achieve ZVS in all the switches under the load with unity power factor or less. The aforementioned theory is verified in a 30-kW inverter prototype. [ABSTRACT FROM AUTHOR]