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This paper describes a high-frequency pulsed-power generator for various industrial applications such as water treatment, food and medical apparatus for sterilization, or polluted gas treatment. The system is made of silicon-controlled rectifier as a main trigger switch, capacitors, two-stage magnetic pulse compression stages, and a linear transformer to generate a maximum of 120-kV, 5-kA pulse. The parameters obtained through the development are: output voltage: 120 kV (maximum), pulse repetition ration: 300 pulse per second, pulsewidth: 0.25~\mu \texts , and mean power: 30 kW. The designed pulsed-power generator is confirmed to be used effectively for many high-voltage pulsed-power applications related to environmental industry by simulation and experiments. [ABSTRACT FROM AUTHOR]

Hybrid switches configured by paralleling Silicon (Si) Insulated Gate Bipolar Transistors (IGBT) and Silicon Carbide (SiC) Metal-Oxide Semiconductor Field-Effect Transistors (MOSFET) have been verified to be a high-efficiency cost-effective device concept. In this paper, a current-dependent switching strategy is introduced and implemented to further improve the performance of Si/SiC hybrid switches. This proposed switching strategy is based on a comprehensive consideration of reducing device losses, reliable operation, and overload capability. Based on the utilization of such Si/SiC hybrid switches and the proposed switching strategy, a 15-kW single-phase H-bridge inverter prototype was implemented and tested in the laboratory. Simulation and experimental results are given to verify the performance of the hybrid switches and the new switching strategy. [ABSTRACT FROM PUBLISHER]

High di/dt and dv/dt of SiC MOSFET cause a considerable amount of overshoot in device voltage and current during switching transients in the presence of inverter layout parasitic inductance and load parasitic capacitance. The excessive overshoots in device voltage and current cause failure of the device. Moreover, these uncontrolled overshoots increase the switching loss in the inverter. It is difficult to reduce parasitic inductance beyond a certain point. This paper proposes an active gate driving technique, which allows inverter to operate with moderate amount of layout parasitic inductance and load parasitic capacitance. The proposed technique dramatically reduces switching loss of the SiC MOSFET with the help of existing parasitic elements. The proposed switching loss reduction technique is termed as quasi zero switching. The developed active gate driver has been tested in a double pulse test setup and a 10 kW two-level voltage source inverter driving an induction motor. [ABSTRACT FROM PUBLISHER]

Under the weaker conditions on system power and nonlinear functions, this paper focuses on the robust adaptive state constraint control for a class of uncertain switched high-order nonlinear systems. With the help of $p$-times differentiable unbounded function, a robust adaptive state-feedback controller is designed by combining the homogeneous domination approach with parameter separation principle. When the initial condition satisfies a suitable requirement, it is shown that all signals of the closed-loop system are bounded and system state is within a prespecified limit range by the proposed controller. As a practical application, the design scheme is utilized to the continuous stirred tank reactor with two modes feed stream. To further demonstrate the efficiency of the proposed controller, another numerical example is given. [ABSTRACT FROM PUBLISHER]

Recently, a modular multilevel converter (MMC) has become one of the most popular converters in medium/high-power applications. In this paper, a new technique is presented to decrease the computational time of the MMC by using switching state grouping for the predictive controller. The proposed technique has the ability to control the output current, minimize the circulating currents, and balance all capacitor voltages, simultaneously. For a predefined number of MMC submodules, the number available switching states is known. The proposed technique uses two stages of predictive modules. In the first stage, the switching states of the MMC are divided equally into a number of groups, controlled simultaneously by the same number of predictive modules. The optimal number of the switching state groups in the first stage is obtained. In the second stage, only one predictive module is used to obtain the optimal switching state of the MMC without any other complexities or additional sorting controllers. The effectiveness of the proposed control technique has been verified by using MATLAB/SIMULINK software considering steady state and dynamic analysis. The results of the proposed technique are compared with the conventional one in terms of computation time, verifying better performance of the proposed method. [ABSTRACT FROM PUBLISHER]

Switching operation of the disconnector in gas-insulated switchgear (GIS) results in very fast transient overvoltage in GIS pipes. In a smart substation, this process induces disturbance voltage on the port of the intelligent component fixed on GIS pipes or placed in the local cabinet nearby, which then may lead to the failure of the equipment. The experimental results of the port disturbance voltage during the switching operation via a 1100 kV test circuit are first reported in this paper. The test arrangement, including both 70 opening operations and 70 closing operations, had been performed. The influences of different grounding schemes of cable shield on port disturbance had been investigated. Three different cases of the terminal load had also been considered: open circuit, short circuit, and 50 Ω. Over 100 000 micro-pulses had been extracted from the disturbance voltage waveforms. The waveform characteristics including peak voltage, rise-time, oscillation frequency, and decaying had been obtained by statistical analysis of these micro-pulses. Furthermore, the differences between measured waveforms and the IEC 61000-4-18 immunity test standard waveform had been discussed. [ABSTRACT FROM PUBLISHER]

In this paper, the stress memorization technique (SMT) effects upon ultra-wideband RF switch performance are investigated for the first time. Low insertion loss (IL), high isolation, ultra-wideband (dc to 50 GHz) single-pole double-throw (SPDT), and single-pole four-throw (SP4T) switches designed with commercial 0.13- \mu \textm high-resistivity (HR) trap-rich SOI technology with/without SMT are presented and investigated. 2.5 V nMOS transistor ( Lg = 0.2~\mu \text{m} ) with low R\mathrm{\scriptscriptstyle ON} {^\ast} C\mathrm{\scriptscriptstyle OFF} from GF 130RFSOI PDK is used. It is found that channel mobility of switch transistor is improved by SMT and thus switch performance can be further improved. Moreover, the impact of transistor channel length, which has dominant effects on both IL and isolation of the switches, under different gate bias on switch performance are also studied and verified experimentally. Low measured IL of less than 2.1 dB and good isolation of better than 27 dB from dc to 50 GHz are obtained for the SPDT switch. For SP4T switch, the measured IL of less than 2.6 dB and isolation of better than 27 dB are achieved from dc to 35 GHz. The active chip areas of designed SPDT and SP4T switches are compact with size of only 0.214 \times 0.19~\text mm^2 and 0.36 \times 0.19~ \text mm^2 , respectively. [ABSTRACT FROM AUTHOR]

In this paper, a GaAs absorptive single-pole double-throw (SPDT) RF switch and its application to a 2.4-GHz switched beamformer module are presented. The proposed absorptive SPDT RF switch features low-power consumption and low insertion loss with good output matching both in the on and off states. Specifically, the measured insertion loss in the on state is less than 1 dB, and the measured input and output return losses are both better than 11.2 dB from 1.9 to 2.6 GHz. The measured output return loss in the off state is better than 15 dB, and the measured isolation is better than 24.7 dB in the same frequency range. Two proposed absorptive SPDT switches are then employed to form an absorptive single-pole four-throw RF switch, and it is integrated with a miniaturized $4 \times 4$ Butler matrix using the integrated passive device (IPD) technology to achieve a compact 2.4-GHz switched beamformer module with a very low profile. Specifically, the module size is 4.9 mm $\times5$ mm with a thickness of only 0.4 mm. The IPD beamformer module is then used to realize a low-profile 2-D scanning antenna array, and 16 different beams in azimuth and elevation dimensions are successfully generated. [ABSTRACT FROM PUBLISHER]

The opening switch is one of the critical technologies in the development of inductive pulsed-power supply. The power requirement is very high when the opening switch is desired to commutate a large current. This paper presents a zero-current opening circuit for inductive pulsed-power supply based on a high-temperature superconducting pulsed-power transformer. First, there are two types of current flowing through the opening switch, one comes from the secondary side of the pulse transformer, and the other one comes from superconducting energy storage inductance. The orientation of the two current is opposite. Then, when the current flowing through the opening switch closes to zero, the switch is opened and this restrains the over-voltage pulse of the opening switch. The simulation results indicate that this zero-current opening circuit is feasible and has potential applications for high-energy systems in the future electromagnetic launcher. [ABSTRACT FROM PUBLISHER]

The effect of bus-bar splitting on the static stability limit is studied in this paper. A novel online bus-bar splitting methodology is developed to increase the static stability limit of a look-ahead (i.e., short term, say, 30 minutes ahead) power system. The proposed methodology, designed for online application, is based on a strategy consisting of screening, ranking, and decision stages. A tailored model of bus-bar splitting is developed to accurately model bus-bar splitting scenarios. The effectiveness of the proposed online bus-bar splitting methodology is evaluated on the IEEE 118-bus, 1648-bus, and 3120-bus power systems. Results indicate that significant load margin increases can be achieved by bus-bar splitting. [ABSTRACT FROM PUBLISHER]

In this paper, a new type of matrix converter (MC) also called a single-phase high-frequency transformer isolated (HFTI) buck MC is proposed. The proposed converter can provide step-down operation of the input voltage with various types of output voltages such as in-phase and out-of-phase output voltages, rectified (or positive) output voltage, and output voltage with step-changed frequency. By incorporating HFT isolation, the proposed MC saves an extra bulky line frequency transformer, which is required for the conventional MCs to provide electrical isolation and safety, when used in application such as dynamic voltage restorers, etc. Two different circuit variations of the proposed HFTI MC are presented with and without continuous output currents, with the latter having less passive components. The safe-commutation strategy is also employed for the proposed HFTI MC to provide current path for the inductor during dead-time, which avoids switch voltage spikes without adding any snubber circuits. The operation principle and circuit analysis of the proposed MC are presented, and switching strategies are also developed to obtain various output voltages. Moreover, a prototype of the proposed MC is fabricated, and experiments are performed to produce in-phase/out-of-phase and rectified output voltages, and output voltage with step-changed frequency. [ABSTRACT FROM PUBLISHER]

This paper presents low insertion loss, high isolation, ultra-wideband double-pole-double-throw (DPDT) switch matrix designed in a 0.13- \mu \textm commercial high resistivity trap-rich silicon-on-insulator (SOI) CMOS process for the first time. The switches are designed using series–shunt–series configuration in a ring-type structure with input and output matching networks. Transistor width and transistor channel length effects on the wideband DPDT switch performance are thoroughly investigated. The designed switches achieve widest bandwidth from dc to 30 GHz with a low insertion loss of 2.5 dB and a high isolation of 32 dB up to 30 GHz. The measured input P1dB of designed switches is higher than 18 dBm. It was found both second and third harmonics can be improved by widening switch transistor channel width, and third harmonic can be improved by shortening channel length. The active chip area of designed $2 \times2$ switch matrix is very small size of only 0.28 mm $\times0.21$ mm. [ABSTRACT FROM PUBLISHER]

This paper proposes a generalized direct torque control (DTC) strategy for multilevel inverter fed DTC (MLI-DTC) drives. By using a simple voltage vector decomposition technique, the proposed method is compatible with inverters possessing any number of voltage levels. Consequently, voltage vectors are applied in a similar way as in the case of a two-level inverter fed DTC. A constant inverter switching frequency is imposed in the proposed method by using a torque regulator in place of the traditional torque hysteresis controller, which enables the application of two voltage vectors within one switching cycle. This also contributes to reduce the torque and flux ripples. Detailed design guidelines for the proposed torque regulator are provided. Experimental results obtained with a three-level neutral point clamped inverter show that the proposed MLI-DTC drive operates with low, constant switching frequency while alleviating torque and flux ripples under all operating conditions. Comparative study with a prior art and parametric sensitivity analysis are also presented to verify the effectiveness and robustness of the proposed MLI-DTC method. [ABSTRACT FROM PUBLISHER]

A novel topology of a modular uninterruptible power supply (UPS) system, based on switched capacitor circuit and wideband gap (WBG) devices, is proposed. This paper deals with the development of a multilevel, multiport, single-phase, transformerless online UPS with universal input/output voltage rating (120–240 V) for main utility and (200–400 V) for the battery packs. The proposed converter mainly relies on capacitors and switching devices to accomplish the task of energy transfer and storage. Compared to conventional topologies, which have multiple power conversion stages, this topology has only one-stage power conversion from ac to dc to ac. The ac output voltage contains five levels whose magnitude comes with a boost functionality. The circuit also does not require the use of inductors or transformers to operate, enabling this topology to be small and lightweight. Moreover, size, cost, and efficiency are improved due to the reduced number of switching devices, passive components, and lack of need for isolation transformers in the multilevel operation. A complete set of simulation and experimental results based on a 2 kVA lab prototype of the proposed UPS is presented to demonstrate its performance under different operating conditions. A peak efficiency of 98.3% has been achieved. [ABSTRACT FROM PUBLISHER]

In this paper, a novel ultralarge gain step-up coupled-inductor dc/dc converter with an asymmetric voltage multiplier network is presented for a sustainable energy system. The proposed converter contains one boost converter, one voltage multiplier network, and one passive lossless clamped circuit. In order to achieve an ultralarge voltage gain, one of the two capacitors is charged by the primary side and secondary side of the coupled inductor, then it together with the secondary side of coupled inductor provides its energy for the other capacitor in voltage multiplier network. Besides, the passive lossless clamped circuit not only recycles leakage energy but also effectively reduces the voltage stress on the main switch. By this way, the efficiency of the conversion can be improved. Moreover, the reverse-recovery problem of the diodes in the leakage inductor is alleviated. The operating principles and steady-state analyses are illustrated in detail. Then, the performance of the proposed converter is compared with existing converters. Finally, a prototype circuit at 50-kHz switching frequency with 20-V input voltage, 200-V output voltage, $N = 2$, and 200-W output power is established in the laboratory to verify the performance of the proposed converter. [ABSTRACT FROM PUBLISHER]

Inductive power transfer power supplies for electric vehicle charging in dynamic applications need to tolerate large variations in coupling and tuning with varying loads. This paper investigates the use of a buck converter to regulate the input voltage to a fixed frequency unidirectional switch push–pull converter to meet the requirements of dynamic charging. The presented circuit is optimized to remove some of the additional components introduced. A mathematical model is presented that shows the circuit is capable of operating while extremely mistuned in both the inductive and capacitive regions while maintaining sinusoidal currents. A controller design is also presented allowing constant primary current operation, safe start up, and operation under no load conditions. A 5-kW prototype was built and validated when operated with a dynamic load under severely mistuned conditions. [ABSTRACT FROM PUBLISHER]

In this paper, the design of RF transceiver front-end using a novel multifunction microwave circuit is proposed. By designing one arm of the proposed active bandpass switchplexer as a bandpass power amplifier (PA) and the other arm as a single-to-balanced bandpass low-noise amplifier (LNA), the resulted multifunctional microwave filtering device thus effectively integrates the functions of single-pole-double-throw RF switch, bandpass filter, balun, PA, and LNA. In this way, all the function blocks between the antenna and up/down converters of a single-band time-division duplex transceiver front-end can be integrated into a single circuit. Compared to the previous works on multifunction microwave circuit designs, the proposed active bandpass switchplexer features the highest number of integrated functions. A printed circuit board-based design example of the proposed active bandpass switchplexer is presented to validate the proposed design concept and to demonstrate the performance achieved. [ABSTRACT FROM PUBLISHER]

This paper proposes a digitally implemented charge control for LLC resonant converters. By analyzing the small-signal characteristics of the resonant capacitor, it is revealed that the resonant capacitor has exactly the same functionality as a resettable integrator in the charge control for a PWM converter. Based on the analyzed results, the proposed charge control is implemented simply by sensing the voltage across the resonant capacitor in a switching period. The proposed method features simple implementation with resistive voltage divider and suitability for digital control as well as good performance as other multiloop controls have. The design guideline for the charge controller is given based on the loop gain analysis. Finally, the operation and performance of the proposed method are verified with a 240-W LLC resonant converter. [ABSTRACT FROM AUTHOR]

This paper proposes a design technique for the implementation of a class- EM power amplifier (PA). Class- EM mode of operation has been proposed as an improved version of class-E in terms of efficiency and power gain, provided that the current fall time of switch is an appreciable portion of a period; the frequency of operation is high enough that the switching time of transistor can no longer be considered instantaneous. A novel approach for harmonic injection required for class- EM operation is proposed, followed by the system of equations and the design methodology governing the proposed circuit. As a proof of concept and verification of the proposed design method, a class- EM PA is designed and implemented in 0.25- \mu \textm gallium arsenide pHEMT technology. The fabricated class- EM PA operates at 2.4 GHz and delivers a power of 30 dBm to the load, with the power-added efficiency of 60% and a 14-dB power gain. [ABSTRACT FROM PUBLISHER]

The paper presents a new bridgeless power factor correction (PFC) topology, using a recently proposed controllable LCL filter, namely active virtual ground to achieve efficient power conversion, and high-frequency common mode voltage (CM) reduction. The proposed PFC circuit consists of high-frequency semiconductors for shaping inductor current and low-frequency semiconductors to form two different LCL structures for different conditions. This reduces grid differential mode current ripple or inductance. Besides, the PFC CM voltage, a main problem of bridgeless PFCs, is significantly reduced, since the capacitor in the LCL filter clamps the voltage between the grid and the converter ground. The performance of the proposed PFC is experimentally verified. The results show that the proposed PFC guarantees sinusoidal input current, low high-frequency common-mode voltage noise, and has a good agreement with the theoretical findings. [ABSTRACT FROM AUTHOR]

A three phase single switch boost rectifier, operating in a quasi-critical conduction mode of the inductor current, can achieve the power factor correction and meet the IEC 61000-3-2. However, the switching frequency is variable in a line cycle, and the design of the inductor and electromagnetic interference filter as well as the power component selection is deteriorated. In this paper, a novel constant frequency control method is proposed for the converter by modulating the on-time of the switch. Compared with the traditional variable frequency control, the proposed control scheme achieves a constant switching frequency in a line cycle, which simplifies the design of the power devices, especially the magnetic components. Furthermore, the switching frequency and the rms value of the inductor current are also reduced, which contributes to a higher efficiency. [ABSTRACT FROM AUTHOR]

This paper proposes a zero-ripple input-current high-step-up boost–single ended primary inductor converter (SEPIC) dc–dc converter with reduced switch-voltage stress to overcome some drawbacks of the conventional cascaded boost–SEPIC dc–dc converter. In the proposed converter, the input current ripple is significantly removed by the auxiliary circuit at the boost stage and the voltage gain is more increased by using turn ratio of a coupled inductor at the SEPIC stage. Additional, the switch-voltage stress is reduced due to the clamping circuit, and the reverse-recovery problem of the output diode is alleviated by the leakage inductor. Hence, the low-voltage-rating MOSFET, which has low $R_{{{\rm ds(on)}}}$, can be utilized as a main switch device. Therefore, the total power efficiency is improved. The theoretical analysis of the proposed converter is verified on an output 200-V to 200-W prototype. [ABSTRACT FROM AUTHOR]

The role of universal memory can be successfully satisfied by magnetic tunnel junctions (MTJs) where the writing mechanism is based on spin-transfer torque (STT). An improvement in the switching properties (lower switching current density maintaining the thermal stability) has been achieved in MTJs with interfacial perpendicular anisotropy (IPA) at the interface between CoFeB and MgO. In this paper, micromagnetic simulations point out the influence of IPA and saturation magnetization (M \(_{\mathbf {S}}\) ) on the properties of fast magnetization reversal achieved in 5, 10, and 20 ns. Both cases of in-plane and out-of-plane free layer are considered. In addition, the thermal effect is included for the in-plane switching at 20 ns and a complete analysis of energy dissipation during the switching is illustrated. This paper can provide useful information for the design of STT-based memories. [ABSTRACT FROM PUBLISHER]

Distributed energy resources (DERs) are expected to provide ancillary functions including reactive power generation and harmonics compensation. Meanwhile, multilevel inverters and two-level converters with optimal pulsewidth modulation (OPWM) will be commonly used for DERs at high power levels. The challenge is to realize harmonic compensation with limited switching angles. This paper presents an online solution to realize the selective harmonics compensation (SHC), and power generation with DERs. For harmonics compensation, the selective harmonic components in the load current are detected. Then, the harmonic voltages are provided with DERs to cancel out these detected components. Since the power converter is requested to realize both harmonics filtering and power generation, limitations on harmonics compensation at the given power are discussed. Power hardware-in-the-loop-based online verifications are shown at the end of the paper. [ABSTRACT FROM AUTHOR]

Power switching devices based on wide bandgap semiconductor materials, such as silicon carbide (SiC) and gallium nitride (GaN) offer superior performance such as low switching and conduction losses, high voltage, high frequency, and high temperature operation. In this paper, a 600-V GaN switch and a 600-V GaN diode were tested in detail to understand the GaN device capabilities with respect to equivalent silicon-based devices such as IGBT and MOSFET. Detailed experimental loss models are developed and compared with datasheet models. Experimental setup of different power converters such as boost, buck-boost, and half-bridge inverter and associated comparative experimental results are presented. This paper also presents the investigations into the effectiveness of using GaN devices and higher switching frequencies in reducing the total size and cost of power conversion equipment such as an online UPS system. [ABSTRACT FROM AUTHOR]

This paper describes issues related to parallel connection of SiC bipolar junction transistors (BJTs) in discrete packages. The devices are applied in a high-frequency dc/dc boost converter where the switching losses significantly exceed the conduction losses. The design and construction of the converter is discussed with special emphasis on successful parallel-operation of the discrete BJTs. All considerations are experimentally illustrated by a 6-kW, 250-kHz boost converter (300 V/600 V). A special solution for the base-drive unit, based on the dual-source driver concept, is also shown in this paper. The performance of this driver and the current sharing of the BJTs are both presented. The power losses and thermal performance of the parallel-connected transistors have been determined experimentally for different powers and switching frequencies. An efficiency of 98.23% (±0.02%) was measured using a calorimetric setup, while the maximum temperature difference among the four devices is 12 °C. [ABSTRACT FROM AUTHOR]

In this paper, a design method is proposed for finding the equivalent inductance and capacitance of the single-ended primary-inductor converter (SEPIC). The relations of the output voltage ripple (OVR) of the SEPIC converter are obtained in complete inductor supply mode–continuous conduction mode (CISM-CCM), incomplete inductor supply mode-CCM (IISM-CCM), and IISM-discontinuous conduction mode (IISM-DCM). The maximum of OVR (MOVR) is investigated for a specified range of the input voltage and load resistance. This value of the MOVR is obtained for the minimum values of input voltage and load resistance. In this paper, the minimum values of the equivalent inductance and capacitance are calculated in obtaining the minimum value of the MOVR. One of the other performed studies in this paper is calculation of the switch peak current in CCM and DCM. In addition, the converter is designed based on the minimum values of the MOVR and stress of the switching current. Experimental and simulation results are used to prove the validity of the presented theoretical subjects. [ABSTRACT FROM PUBLISHER]

The five-level active neutral-point-clamped (5L-ANPC) converter has been widely studied for its excellent performance in high-power medium-voltage applications. This paper analyzes the space vector pulse width modulation (SVPWM) strategy of the 5L-ANPC converter in the virtual coordinate, and presents an optimized control strategy which can balance the neutral point (NP) voltage and avoid the dead-time effects for the first time. In this strategy, on one hand, the 125 space vectors are combined by 96 triangles in the seven-segment vector synthesis method, then the triangles are divided into seven categories which have different characteristics of balancing the NP voltage, and every category has its own principles to choose the vector sequence and compute the vector durations. On the other hand, the dead-time effects of the 5L-ANPC converter are studied in detail and the transitions between different switching states are constrained in the optimized control strategy to avoid the dead-time effects that cannot be compensated by traditional pulse-based dead-time compensation methods. Finally, the optimized SVPWM strategy is experimentally verified in this paper. [ABSTRACT FROM AUTHOR]

During the switching of disconnectors in gas-insulated switchgear (GIS), repeated strikes occur in the contact gap and lead to very fast transient overvoltage (VFTO). Severe VFTO may bring damage to transformers and other equipment. The switching speed of the disconnector is one of the important factors which influences VFTO. There are still different opinions on this factor. Very little quantitative study was done before this paper. In this paper, the whole repeated strike process associated with the switching operation of the disconnector was simulated and analyzed. The polarity and the probability characteristics of breakdown voltage were analyzed. The impacts of the switching speed of the disconnector on VFTO were studied by statistical methods. Comparisons were made between simulated and measured results. The simulation result shows that within a certain range of speed, disconnectors with a lower switching speed generate lower trapped charge voltage after opening operation and lower VFTO magnitude during the opening and closing operations. [ABSTRACT FROM AUTHOR]

This paper features the projected cross point control (PCPC) approach which is a recent current-mode control (CMC) technique. PCPC benefits from several advantages including fixed switching frequency, wide stability range, high current loop gain, improved audio susceptibility, and simpler design procedure. An introduction of its principles of operation is followed by detailed discussions about its stability and dynamic response. This paper then describes the development of the small-signal model of PCPC and derives transfer functions, such as current loop gain, audio susceptibility, and output impedance. Finally, simulations and experimental results are presented. Peak, average, and hysteresis CMC schemes are used for comparison. [ABSTRACT FROM PUBLISHER]

Multilevel inverters with hexagonal and dodecagonal voltage space vector structures have improved harmonic profile compared to two-level inverters. Further improvement in the quality of the waveform is possible using multilevel octadecagonal (18-sided polygon) voltage space vectors. This paper proposes an inverter circuit topology capable of generating multilevel octadecagonal voltage space vectors, by cascading two asymmetric three-level inverters. By the proper selection of dc-link voltages and the resultant switching states for the inverters, voltage space vectors, whose tips lie on three concentric octadecagons, are obtained. The advantages of octadecagonal voltage space vector-based pulsewidth modulation (PWM) techniques are the complete elimination of fifth, seventh, eleventh, and thirteenth harmonics in phase voltages and the extension of linear modulation range. In this paper, a simple PWM timing calculation method is also proposed. Experimental results have been presented in this paper to validate the proposed concept. [ABSTRACT FROM PUBLISHER]

This paper proposes a soft switching technique for dc/ac inverters, by using duty cycle and frequency modulation. Zero voltage switching (ZVS) is achieved through controlling the inductor current bidirectional in every switching cycle. This technique requires no additional resonant components and can be employed for various low power applications on conventional full-bridge and half-bridge inverter topologies. Three different current mode control schemes are derived from the basic theory of the proposed technique. They are referred to as boundary current mode (BCM), variable hysteresis current mode (VHCM), and constant hysteresis current mode (CHCM) in this paper and their advantages and disadvantages are compared. Simulation and experimental results demonstrate the feasibilities of the proposed soft-switching technique and its control schemes. [ABSTRACT FROM PUBLISHER]

In this paper, a new control strategy for improving weighted efficiency in photovoltaic (PV) ac module-type interleaved flyback inverters (ILFIs) is proposed. The efficiency of the ILFI for PV ac modules has to be high, not only for the maximum power, but also for other power levels according to weather conditions. For PV power conversion efficiency improvement in all load ranges, a new control method for an ILFI according to the output of the PV module is proposed in this paper. The proposed method controls an active clamp circuit and each converter phase of an ILFI according to the output power of the PV module. Thus, the efficiency of an ILFI as a PV power conditioner can be improved in all power range of the PV module. Theoretical analysis, simulation, and experiment are performed in order to verify the proposed control method. [ABSTRACT FROM AUTHOR]

This paper presents the basic features of a software system developed to support the teaching of digital logic, as well as the experience of using it in the Digital Logic course taught at the School of Electrical Engineering, University of Belgrade, Serbia. The system has been used for several years, both by students for self-learning and laboratory work, and by teachers to automate the assessment and verification of students' work. The system allows users to design and simulate a switching circuit. It also collects data on all student activities and transfers these to the school's information system. Finally, the paper gives figures demonstrating the overall benefits of the system. [ABSTRACT FROM AUTHOR]

This paper explores the feasibility of active clamping techniques in isolated time-sharing (TS) multiple-input converters (MICs). Additional losses caused by energy transfer from the leakage inductance in the isolating coupled-inductor into the input switches are addressed with a common active clamping leg for all input legs. An active clamping technique is applied to isolated TS-MIC to minimize the additional switching losses and voltage stresses on input legs. This paper also conducts an operational analysis of an isolated time-sharing dual-input single-ended primary-inductor converter (I-TS-DI-SEPIC) with the discussed active clamping technique. Zero-voltage switching can be achieved on the first-turned-on input leg and the active clamping leg with a proper driving strategy and well-chosen circuit parameter settings. Discussions on the effect of the active clamping technique to an MIC and the components stresses of the I-TS-DI-SEPIC with the active clamping technique have also been made to assist in the design of TS-MICs. Prototypes of the I-TS-DI-SEPIC with the active clamping technique have been built to demonstrate the performance in the application of split-phase dc distribution systems. Converter efficiency and voltage stresses are experimentally verified, showing that the active clamping technique achieves noticeable efficiency gains and component stress reduction. [ABSTRACT FROM AUTHOR]

This paper deals with time domain simulation of common mode (CM) conducted disturbances in power electronics. This study proposes a proof of concept of a fast reconstruction method (FRM), which allows to compute the spectrum of a current based on the knowledge of a single pulse of current (i.e., the knowledge of the disturbances on a small fraction of time) and of the switching instants (i.e., the control strategy of the structure). The first parts of the paper demonstrate the reliability of the method using data measurements of a CM current generated by a PWM half-bridge converter and then by a three phase inverter. The simulation time saved thanks to the FRM is then quantified by comparing the simulation durations with or without using the FRM. In our example, the FRM allows to divide the simulation time by about 10. This analysis points out that the complex information of a CM current is contained in a small time interval. As a consequence the complete spectrum can be predicted with only a very fast simulation. The mathematical techniques developed here forecast promising reduction of simulation durations. [ABSTRACT FROM PUBLISHER]

Part I of this paper has proposed a duty-cycle-space-vector (DCSV)-based modulation strategy for three- and four-leg matrix converters (MCs). This paper develops a digital DCSV-based modulation strategy for the three- and four-leg MCs based on the results of Part I of this paper. The digital DCSV-based modulation strategy is implemented in a DSP–field programmable gate array (FPGA) platform. The objective is to reduce the calculation time of the modulation algorithm by performing the following: 1) reducing the total number of instructions needed to implement the modulation algorithm in the DSP and 2) implementing parts of the modulation algorithm in an FPGA to generate the switching pattern. Therefore, the calculation process of the modulation algorithm is split between the DSP and the FPGA. [ABSTRACT FROM PUBLISHER]

In this paper, we show a new bandstop filter circuit topology. Unlike conventional bandstop filter circuit topologies, the new circuit topology has inter-resonator coupling structures. The presence of these inter-resonator coupling structures enables convenient switching from a bandstop to a bandpass filter. Using the new bandstop filter topology, this paper demonstrates a design of a frequency-agile bandstop-to-bandpass switchable filter. The filter is composed of tunable substrate-integrated cavity resonators and can be switched to have either a bandstop or bandpass response. Switching is achieved by turning on and off switches placed within the filter structure. A prototype of the proposed design is fabricated and the concept is verified experimentally. [ABSTRACT FROM AUTHOR]

Switched boost inverter (SBI) is a single-stage power converter derived from Inverse Watkins Johnson topology. Unlike the traditional buck-type voltage source inverter (VSI), the SBI can produce an ac output voltage that is either greater or less than the available dc input voltage. Also, the SBI exhibits better electromagnetic interference noise immunity when compared to the VSI, which enables compact design of the power converter. Another advantage of SBI is that it can supply both dc and ac loads simultaneously from a single dc input. These features make the SBI suitable for dc nanogrid applications. In this paper, the SBI is proposed as a power electronic interface in dc nanogrid. The structure and advantages of the proposed SBI-based nanogrid are discussed in detail. This paper also presents a dq synchronous-reference-frame-based controller for SBI, which regulates both dc and ac bus voltages of the nanogrid to their respective reference values under steady state as well as under dynamic load variation in the nanogrid. The control system of SBI has been experimentally validated using a 0.5-kW laboratory prototype of the SBI supplying both dc and ac loads simultaneously, and the relevant experimental results are given in this paper. The low cross regulation and the dynamic performance of the control system have also been verified experimentally for a 20% step change in either dc or ac load of SBI. These experimental results confirm the suitability of the SBI and its closed-loop control strategy for dc nanogrid applications. [ABSTRACT FROM AUTHOR]

In this paper, we consider a network that supports multiple multicast flows with network coding. It is well-known that network coding can be used to increase the throughput of a delay-free network. However, as there are multiple multicast flows in the network, packets might be delayed due to contention. As packets from the same flow have to be synchronized for network coding, additional buffers, known as em synchronization buffers in the literature, are required. In certain networks, such as multistage interconnection networks in switch fabrics , the size of internal buffers could be quite limited. One of the key contributions of the paper is to propose a packet scheduling algorithm so that synchronization buffers can be bounded by a em finite constant that only depends on the maximum hop count of the flows. We also show that our scheduling algorithm does not cause any throughput degradation as it can stabilize the network for any em admissible traffic. Moreover, our algorithm is em universal and it does not require to know the rates of the flows in the network. The main idea of our algorithm is to introduce em fictitious packets in the dynamic frame sizing algorithm recently proposed in for stabilizing switches and em wired networks (without network coding). By so doing, packets that might be stalled in synchronization buffers can be flushed out. We show that the number of fictitious packets in each frame is also bounded by a finite constant that only depends on the maximum hop count. [ABSTRACT FROM PUBLISHER]

The meat grinder is a basic circuit for inductive pulsed-power supply (IPPS). Based on meat grinder, the Institute of Advanced Technology proposed a circuit called the slow transfer of energy through capacitive hybrid (STRETCH) meat grinder, in which an Integrated Gate Commutated Thyristors (IGCT) is selected as the main switch. Tsinghua University proposed the STRETCH meat grinder with inverse current commutation with semiconductor devices (ICCOS) in which the main switch is replaced by a thyristor and the ICCOS subcircuit is introduced to turn off the main switch. To reduce the opening switch voltage and increase the current turning-off capacity for IPPS, this paper presents a novel circuit topology named the meat grinder with self-charged capacitor and thyristors (SECTs). The key idea of the SECT topology is to turn off the primary current by the energy transfer capacitor, which is precharged. The meat grinder with SECT has larger capacity than the STRETCH meat grinder because it replaces the IGCT with a thyristor and is simpler than the STRETCH meat grinder with ICCOS because it only needs one capacitor. The suggested circuit is more suitable for IPPS module with high energy density. Simulation and experiment have been carried out to validate the circuit. [ABSTRACT FROM PUBLISHER]

With inherent strengths in energy density and power density, the inductive pulsed power supplies (IPPS) have become an attractive option for the power supplies in electromagnetic launch systems. The meat grinder circuits, including the slow transfer of energy through capacitive hybrid (STRETCH) meat grinder circuit, the STRETCH meat grinder with inverse current commutation with semiconductor devices circuit, and the meat grinder with self-charged capacitor and thyristors circuit, constitute one major branch among the IPPS circuits. This paper summarizes the fundamental research work and contributions of the meat grinder circuits from the perspectives of circuit improvements, performance analysis, inductor design, module collaboration, and efficiency promotion. The future directions of single IPPS module are higher energy level, larger energy density, and higher efficiency. [ABSTRACT FROM PUBLISHER]

In a switching-table-based direct torque control method (ST-DTC), the torque ripple reduces with increasing number of levels of the torque comparator. The number of levels is decided by the availability of the number of voltage vectors according to the topology of the inverter. This paper proposes the seven-level torque comparator to reduce the torque ripple in the DTC-controlled five-phase induction motor fed by the three-level five-phase inverter. In the five-phase induction motor, an elimination of x − y stator flux is inevitable otherwise the stator phase current will be distorted. In order to eliminate the x − y stator flux, the virtual voltage vectors are formed. Experimental results are presented to validate the proposed DTC method. [ABSTRACT FROM PUBLISHER]

Electrolytic capacitors are the components that mainly impact the lifetime of ac/dc light-emitting diode (LED) drivers. Therefore, eliminating electrolytic capacitors from LED drivers is of vital importance. First, the basic derivation concept of a family of flyback-based three-port converters for electrolytic capacitor-less LED drivers is addressed in this paper, by manipulating the power flow among input port, output port, and storage capacitors. Together with the derivation of existing topologies, new topologies are also proposed. After evaluation, an integrated dual flyback converter (IDFC) is chosen, which requires less switching components and simpler control strategy. Following that, the operation principle and switching modes of the IDFC are elaborated, as well as the parameter design and implementation of control strategy. Finally, experiments on a laboratory prototype are carried out to verify the feasibility of the proposed topology. [ABSTRACT FROM PUBLISHER]

This paper presents a novel soft-switching galvanically isolated buck-boost dc–dc converter as a module-integrated converter for photovoltaic (PV) applications. It features three major operating modes: boost, normal, and buck mode. Their proper distribution over the input voltage range enables wide voltage regulation capabilities, i.e., close to those of nonisolated power optimizers. The proposed control algorithm requires only one buck-boost switching stage that performs voltage regulation by means of the switching stage reconfiguration with smooth transition between the modes. The design guidelines and the digital control system for PV applications are provided. The module-integrated converter was verified experimentally with a solar array simulator. The converter showed good maximum power point tracking performance and a peak efficiency of nearly 97%. [ABSTRACT FROM PUBLISHER]

In this paper, a novel discontinuous current-source driver (CSD) is proposed, in which the power MOSFET gate-source voltage is increased to more than the drive supply voltage. The proposed CSD is able to recover gate energy dissipated in a conventional driver. In comparison to the conventional gate driver, the proposed CSD achieves fast switching speed to reduce switching losses. A wide range of operating duty cycle, low circulating losses, and high Cdv/dt immunity are other features of the proposed CSD. In comparison to previous discontinuous CSDs, the special advantage of the proposed circuit is power MOSFET gate voltage boosting, which leads to reduction of Rds(on) and, thus, the conduction loss. The proposed circuit is appropriate for voltage regulators (VRs) with synchronous rectifier and also it is suitable for two-stage 48-V power pod applications and low-voltage converters. Two-stage VR for laptop computer CPUs is another application of this gate driver circuit to improve light load performance. A prototype of the circuit operating at 1 MHz is implemented, and the experimental waveforms justify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

A control technique is proposed in this paper for control of modular multilevel converters (MMC) in high-voltage direct current (HVDC) transmission systems. Six independent dynamical state variables are considered in the proposed control technique, including two ac currents, three circulating currents, and the dc-link voltage, for effectively attaining the switching state functions of MMCs, as well as for an accurate control of the circulating currents. Several analytical expressions are derived based on the reference values of the state variables for obtaining the MMC switching functions under steady state operating conditions. In addition, dynamic parts of the switching functions are accomplished by the direct Lyapunov method to guarantee stable operation of the proposed technique for control of MMCs in HVDC systems. Moreover, the capability curve of MMC is developed to validate maximum power injection from MMCs into the power grid and/or loads. The impacts of the variations of MMC output and dc-link currents on the stability of dc-link voltage are also evaluated in detail by small-signal analysis. [ABSTRACT FROM PUBLISHER]

This paper proposes a model predictive direct power control (MPDPC) approach with reduced switching frequency for grid-connected voltage-sourced converters (VSC). This approach is proposed for both a real/reactive power controller (with a fixed input voltage) and a power port controller (with a variable input voltage). It uses two different cost functions: one for the steady state and one for transients. Utilizing these two cost functions leads to having a low switching frequency in the steady state and a fast response during transients. The proposed MPDPC also provides overcurrent protection of the VSC. In applying the proposed MPDPC to a power port, drawbacks of conventional voltage controllers are addressed by employing power estimation and set point modulation in the controller. Simulation and experimental results validate the proposed MPDPC and the voltage controller. [ABSTRACT FROM PUBLISHER]

A novel isolated dc–dc converter is proposed, using the T-Type topology with zero voltage switching and pulse width modulated with a capacitive output filter. It uses four switches, two of which are subjected to the input voltage, and the other two to half the input voltage. All switches commutate under zero voltage over a wide load range. The proposed converter has the following features: (a) symmetrical operation of the isolation transformer, (b) modulation by pulse width with constant frequency, (c) zero voltage switching, and (d) three-level voltage applied to the primary winding of the transformer. Theoretical analysis, design example, and experimental data for a 2 kW, 400 VDC input, 400 VDC output, and 50 kHz switching frequency laboratory prototype, working in two operating points are included in this paper. The measured efficiency was 95% at 950 W. [ABSTRACT FROM AUTHOR]

Due to its low mass and medium impulse bit, the pulsed plasma thruster (PPT) is a suitable electric propulsion system for orbit maintenance and attitude control for nanosatellites. The PPT uses an igniter circuit to produce an arc in vacuum for plasma generation. In this paper, a new quasi-resonant converter topology is proposed for the PPT igniter. It consists of a resonant tank, a step-up transformer, and a Cockcroft–Walton voltage multiplier circuit. While other resonant converters require a switch bridge, the proposed approach uses only a single switch. This prevents the possible short-circuit of the same leg in a switch bridge caused by the noise interference or single event effect in space. Moreover, the switching control is realized without a dead time which simplifies the implementation. Both simulation and experimental results have validated that the proposed topology operates in a quasi-resonant state to realize zero-current switching. It reduces the switching noise, voltage spike, and switch's conduction loss. Moreover, the proposed topology also has a better boost capability than some of the existing resonant converters. [ABSTRACT FROM AUTHOR]