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Background and Objectives: The H-bridge (HB) driver design with high efficiency is one of the most challenging issues in power systems that drive AC/DC loads. HB driver circuit based upon complementary MOSFET type used as a driving system of DC motor, power converters, and battery charger for electrical vehicles. In Driving DC motors, dead-time (DT) generation has been considered a major factor such as preventive power line short-circuits (shoot-through) over high and low-side MOSFETs. In this paper, the HB driver is designed for linear actuators with consideration for the prevention of shoot-through. Methods: The propagation delay of logic gates are used to postpone the arrival gate drive signal for high/low side MOSFETs resulting in short circuit elimination on the DC source. Results: As mentioned, logic gates' propagation delay by their values causes interruption between the high and low-side power switches gate drive signal resulting in shoot-through elimination. Although the existence of DT influences the performance of the rotational speed and output torque of a DC motor by increasing the distortion and pulse interval, Linear actuators due to low-velocity linear motion do not require the PWM control, therefore DT has no substantial effect on driver performance. Conclusion: Simulation and experimental results validate the method proposed in this paper. According to the specifications of the circuit designed in this paper, for loads that do not need rotational speed control, logic gates with proper propagation delay can be chosen to eliminate short circuits in complementary MOS switches without requiring DT compensation methods. [ABSTRACT FROM AUTHOR]

This paper presents a method that enables a small car to reach its destination in an indoor environment using ultrawideband technology. For this purpose, we used four anchors and one tag. The tag can move because it is fixed on the car. The anchors and the tag are DWM1001 modules. The configuration of the five DW1001 modules is performed through a smartphone application provided by the manufacturer. The car has been built by us. The controller of the car is a Raspberry Pi microcomputer which controls the driver of the car DC motors by generating PWM signals. In addition, Raspberry Pi communicates with the tag by the UART interface. Thus, our goal was to control the car to reach a certain destination (xd, yd) requested by the user via Wi-Fi. Because the car hosts the tag, it continuously updates its position according to the information received from the four anchors. We implemented two scenarios, considering the initial (x, y) position of the car. In the first scenario, which is simpler, the car moved to its destination either along the x-axis or along the y-axis. In the second scenario, the car moves along one of the axes and then turns 90 degrees to reach its destination. Experimental results that show the precision of the positioning system are presented. [ABSTRACT FROM AUTHOR]

This paper discusses the impact of small dc capacitance in a motor drive using a floating capacitor H-bridge topology. The proposed topology is intended for applications where variable frequency control is not required. Special attention is paid on investigating the second-order dc capacitor voltage ripples, whose influence on the induction motor as well as on the motor drive itself is of importance. This issue is addressed in this paper through rigorous mathematical formulations. It is found that by inverting the second-order dc ripple voltage using the conventional SVPWM, no harmful harmonics will be generated in the motor line voltage. This demonstrates the possibility of drastically reducing the dc capacitance of the proposed system. Induction motor as well as H-bridge performance with respect to different dc capacitance values is demonstrated by experiments, which lays the foundation for cost reduction and reliability enhancement of the proposed system. [ABSTRACT FROM PUBLISHER]

A new hybrid nine level multilevel inverter (H9MLI) topology is proposed and developed with the combination of switched capacitor (SC) and H-bridge structure. The main features of the proposed inverter are voltage boosting capability, reduced switch count, reduced switching control and extended vertical and horizontal topologies. In this paper, the operation modes, modulation strategy, power loss analysis and the simulation results for H9MLI and its extended topology (13 level and 17 level) are presented. The MATLAB/Simulink based simulation of the proposed inverter and its extended topologies for static and dynamic loads are analyzed and verified. The quantitative comparison indicating the merits of proposed topology over various prior-art multilevel inverter topologies were evaluated and tabulated in an inclusive way. The level shifted PWM technique is used for generating control pulses for the proposed inverter. [ABSTRACT FROM AUTHOR]

The paper presents a new generalized topology-based single-phase cascaded multilevel inverter with reduced power electronic switches, thereby reducing the driver circuits. A new basic unit is proposed in this paper. In order to generate required voltages at the output, an H-bridge is added in conjunction with the basic unit as the unit provides only positive voltage levels. Owing to the merits possessed by cascaded multilevel inverter such as reduction in switch count, driver circuits, low stresses in voltage and their power quality being high, a basic unit is developed. A comparison between the existing topologies and the proposed topology is presented. The developed cascaded 9-level multilevel inverter topology is validated with both simulations and experimentation. [ABSTRACT FROM AUTHOR]

In this paper, a novel four-level flying capacitor inverter and its comparison with the conventional flying capacitor topology in terms of THD analysis are proposed. This new topology have some advantages over conventional one as following: The blocking voltages are the same for all switches used in the configuration, there is no need for capacitor midpoint connection and this eliminates low frequency current which circulate in dc-link capacitors, and the number of flying capacitor is reduced as compared with conventional form of it. The operation of the topology, modulation strategy, simulation results, and THD analysis for the output waveforms are presented in this paper. [ABSTRACT FROM AUTHOR]

This paper proposes a new multilevel inverter (MLI) topology that utilizes trinary sequence for the dc sources. It gives maximum output voltage level with minimum dc source and switch count when compared to other sequences, such as symmetric, natural, binary, and quasi-linear. This is due to the fact that the trinary sequence generates of all additive and subtractive combinations of input dc levels in the output voltage waveform. The concept is implemented on a 9-level asymmetric MLI using only four active devices. Multicarrier unipolar pulsewidth modulation technique is adopted to create the switching pulses. Theoretical calculation of total harmonic distortion in both voltage and current waveforms has been performed using asymptotic time domain formula. These values are compared with simulation and experimental values for different modulation indices. Power loss calculation for proposed topology is discussed with appropriate mathematical equations. [ABSTRACT FROM AUTHOR]

The paper presents a way of accomplishing a non-contact excitation by electromagnetic waves generated from a system that includes WiFi microcontroller, H-Bridge and coil. The ESP 32 microcontroller software achieves PWM signal, which follows' a sinusoidal shape of variable frequency. The PWM signal drives the H-bridge resulting in a more powerful electric signal that also drives the coil, accomplishing in this way the pseudo-sine electromagnetic wave. The source code from microcontroller provides variable frequency and working period as well. The main features of the system are 0.5 to 3000 Hz, working periods between 0.1 and 10 seconds, the possibility to achieve more than one working period with standby periods in between. [ABSTRACT FROM AUTHOR]

Hybrid circuit breaker (HCB) has shown good performance for interrupting dc fault current. However, a massive number of IGBTs in series is needed. These will lead to high costs and significant difficulty in balancing IGBT dynamic voltage. This paper proposes a bidirectional hybrid circuit breaker based on a cascaded half-bridge submodule structure to reduce the overall costs and implementation difficulty of HCB. The number of IGBTs is reduced by 50%, and the operating speed is fast enough. A model of a four-terminal modular multilevel converter (MMC) system with a proposed hybrid circuit breaker in different stages is developed to describe the fault blocking process more clearly. The performance of the proposed HCB is validated and compared with other HCB structure through both theoretical derivation and time-domain simulation. [ABSTRACT FROM AUTHOR]

This paper presents a new switched-ladder structure for multilevel converter which consists of several bidirectional and unidirectional switches along with DC voltage sources. The values of DC sources in the proposed topology are determined based on a new mathematical algorithm. The proposed multilevel converter is an extended structure, which can produce any levels at output voltage waveform. To prove the merits of the proposed structure, the proposed converter is compared with other similar structures. According to comparison results, it is shown that the presented structure requires the least numbers of DC sources, IGBTs, drivers and on-state switches. Also, the value of voltage rating of the switches is analyzed. The experimental results are provided for the proposed 17-level converter to prove the performance of suggested structure. [ABSTRACT FROM AUTHOR]

A dual-buck inverter (DBI) possesses no shoot-through worries and can boost efficiency by using power mosfet s. The main drawback of a DBI is the use of more inductors than in a traditional full-bridge inverter. This greater number of inductors decreases the power density and increases system cost. In this paper, a modified cascaded full-bridge DBI is proposed. It retains all the advantages of the conventional cascaded full-bridge DBI, possesses no shoot-through issues, and can be operated with no pulse-width-modulation dead-times. It can be implemented with power mosfet without reverse recovery issues of a body diode to boost efficiency. The cascaded modules in the proposed inverter share current limiting inductors. Therefore, the number of inductors and inductor footprints, the complexity of the circuit layout, required inductance, and magnetic volume can all be decreased. To show the advantages of the proposed inverter, detailed theoretical analysis and experimental results are provided. [ABSTRACT FROM PUBLISHER]

High-voltage (HV) pulses are used in pulsed electric field (PEF) applications to provide an effective electroporation process, a process in which harmful microorganisms are disinfected when subjected to a PEF. Depending on the PEF application, different HV pulse specifications are required such as the pulse-waveform shape, the voltage magnitude, the pulse duration, and the pulse repetition rate. In this paper, a generic pulse-waveform generator (GPG) is proposed, and the GPG topology is based on half-bridge modular multilevel converter (HB-MMC) cells. The GPG topology is formed of four identical arms of series-connected HB-MMC cells forming an H-bridge. Unlike the conventional HB-MMC-based converters in HVdc transmission, the GPG load power flow is not continuous which leads to smaller size cell capacitors utilization; hence, smaller footprint of the GPG is achieved. The GPG topology flexibility allows the controller software to generate a basic multilevel waveform which can be manipulated to generate the commonly used PEF pulse waveforms. Therefore, the proposed topology offers modularity, redundancy, and scalability. The viability of the proposed GPG converter is validated by MATLAB/Simulink simulation and experimentation. [ABSTRACT FROM PUBLISHER]

Current flow controllers (CFCs) are power electronics-based devices that may remove some technical barriers preventing multiterminal high-voltage direct current (MTdc) grid deployment. In this paper, an interline CFC topology is investigated. The single H-bridge CFC (1B-CFC) alters the grid power flow by transferring power between neighboring dc lines. The operation and control of a 1B-CFC under a single modulation scheme is presented. A control strategy has been proposed to provide pole balancing support during imbalance conditions. Small-scale prototypes have been developed to demonstrate the functionality and operational range of the device. To this end, an experimental MTdc grid test-rig has been employed. It is shown that a 1B-CFC could be used to limit the dc line current and, additionally, it can be employed to enable asymmetrical tapping of dc lines. For completeness, the performance of the device has been experimentally validated under line overloading, pole imbalance conditions, and a pole-to-pole dc fault. [ABSTRACT FROM AUTHOR]

This paper proposes a family of multiport switched-capacitor multilevel inverter (SCMLI) topologies for high-frequency ac power distribution. It employs asymmetric dc voltage sources with a common ground that makes it ideal to be employed in renewable energy farms and modern electric vehicles. The proposed family of step-up SCMLI attains higher number of output voltage steps with optimum component count in comparison to several existing topologies. The problem of capacitor voltage balancing is solved as the capacitors are inherently charged to a finite voltage every half cycle. In-depth study on two staircase modulation strategies, namely, selective harmonic elimination and minimum total harmonic distortion (THD) scheme is presented with study on the variation of switching angles and THD with modulation indices under both schemes. Working principle and analysis are presented for the proposed family of topologies. Simulation outcomes are validated with experimental results under both the aforementioned modulation schemes with equal and unequal output voltage waveform steps. [ABSTRACT FROM AUTHOR]

This paper presents and compares control strategies for three-phase open-end winding drives operating in the flux-weakening region. A six-leg inverter with a single dc link is associated with the machine in order to use a single energy source. With this topology, the zero-sequence circuit has to be considered since the zero-sequence current can circulate in the windings. Therefore, conventional overmodulation strategies are not appropriate when the machine enters in the flux-weakening region. A few solutions dealing with the zero-sequence circuit have been proposed in the literature. They use a modified space vector modulation or a conventional modulation with additional voltage limitations. This paper describes the aforementioned strategies, and then, a new strategy is proposed. This new strategy takes into account the magnitudes and phase angles of the voltage harmonic components. This yields better voltage utilization in the dq frame. Furthermore, inverter saturation is avoided in the zero-sequence frame, and therefore, zero-sequence current control is maintained. Three methods are implemented on a test bed composed of a three-phase permanent-magnet synchronous machine, a six-leg inverter, and a hybrid digital signal processor /field-programmable gate array controller. Experimental results are presented and compared for all strategies. A performance analysis is conducted as regards the region of operation and the machine parameters. [ABSTRACT FROM AUTHOR]

In this paper, a novel modular cascaded multi-level converter with multiwinding high-frequency (MWHF) transformer is proposed for medium- or high-voltage applications. In the proposed converter, a cascaded H-bridge rectifier (CHBR) is connected directly with the input ac source while the traditional step-down transformer is no longer necessary. Then, an isolated dc-dc converter composed by a group of H-bridge converters and a MWHF transformer with high power density is used to isolate the dc buses produced by the CHBR. The equivalent circuit and mathematical model of the MWHF transformer and the high frequency (HF) converter are obtained firstly in this paper. Then, the voltage stability under unbalanced loads is analyzed and the naturally balance ability is verified. To accelerate the dc bus voltage balancing process, a voltage balance control algorithm based on energy exchange between different transformer windings is proposed that is realized by accomplishing the phase shift adjustment of the terminal voltages on different windings. Simulations and experiments are implemented to verify the performance of the proposed converter and voltage balance algorithm. [ABSTRACT FROM AUTHOR]

This paper proposes a switched-capacitor multilevel inverter for high-frequency ac power distribution systems. The proposed topology produces a staircase waveform with higher number of output levels employing fewer components compared to several existing switched-capacitor multilevel inverters in the literature. This topology is beneficial where asymmetric dc voltage sources are available, e.g., in case of renewable energy farms based ac microgrids and modern electric vehicles. Utilizing the available dc sources as inputs for a single inverter solves the major problem of connecting several inverters in parallel. Additionally, the need to stack voltage sources, like batteries or supercapacitors, in series which demand charge equalization algorithms, are eliminated as the voltage sources employed share a common ground. The inverter inherently solves the problem of capacitor voltage balancing as each capacitor is charged to the value equal to one of the input voltage every cycle. State analysis, losses, and the selection of capacitance are examined. Simulation and experimental results at different distribution frequencies, power levels, and output harmonic content are provided to demonstrate the feasibility of the proposed multilevel inverter topology. [ABSTRACT FROM PUBLISHER]

The current-carrying capability of dc lines is limited by their thermal and electric stress limits. Thus, the line current must be maintained within the permissible operational region to protect the lines from damage. In a dense dc grid, control over each line current cannot be achieved without including additional control devices. In this paper, a dual H-bridge current flow controller (2B-CFC) is used to manage the dc grid line power flow by providing dc voltage compensation in series with dc lines. A centralized hierarchical control system is proposed to coordinate the operation between multiple CFCs. A novel voltage-sharing control scheme is demonstrated. It is shown that such a scheme reduces the workload on a single CFC by sharing the required control voltage between multiple CFCs, and, in addition, can be used to avoid control conflicts among active CFCs during communication failure. An experimental platform consisting of a three-terminal dc grid and small-scale 2B-CFC prototypes has been developed to validate the concepts. For completeness, the CFC performance has been analyzed for overload conditions and when no communication exists. Small-scale dc circuit breakers have been developed to study the CFC performance under a pole-to-pole fault. [ABSTRACT FROM PUBLISHER]

In this paper, an open-switch fault diagnosis method for five-level H-Bridge Neutral Point Piloted (HB-NPP) or T-type converters is proposed. While fault tolerant operation is based on three steps (fault detection, fault localization and system reconfiguration), a fast fault diagnosis, including both fault detection and localization, is mandatory to make a suitable response to an open-circuit fault in one of the switches of the converter. Furthermore, fault diagnosis is necessary in embedded and safety critical applications, to prevent further damage and perform continuity of service. In this paper, we present an open-switch fault diagnosis method, based on the switches control orders and the observation of the converter output voltage level. In five-level converters such as HB-NPP and T-type topologies, some switches are mostly 'on' at the same time. Therefore, the fault localization is quite complicated. The fault diagnosis method we proposed is capable to detect and localize an open-switch fault in all cases. Computer simulations are carried out by using Matlab Simulink and SimPowerSystem toolbox to validate the proposed approach.

Multilevel inverters are proficient in achieving a high-quality staircase output voltage waveform with a lower amount of harmonic content. In this paper, a new hybrid multilevel inverter topology based on the T-type and H-bridge module is presented. The proposed topology aims to achieve a higher number of levels utilizing a lower number of switches, direct current (dc) voltage sources, and voltage stresses across different switches. The basic unit of the proposed single T-type and double H-bridge multilevel inverter (STDH-MLI) produces 15 levels at the output using three dc voltage sources. The proposed topology can be extended by connecting a larger number of dc voltage sources in the T-type section. The nearest level control (NLC) switching technique is used to generate gate pulses for switches to achieve a high-quality output voltage waveform. In addition, a simplified way to achieve NLC is also described in the paper. A detailed comparison with other similar topologies is provided to set the benchmark of the proposed topology. Finally, experimental work is carried out to validate the performance of the proposed topology. [ABSTRACT FROM AUTHOR]

A novel single-phase nine-level boost inverter is proposed in this paper. The proposed inverter has an output voltage which is higher than the input voltage by switching capacitors in series and in parallel. The maximum output voltage of the proposed inverter is determined by using the boost converter circuit, which has been integrated into the circuit. The proposed topology is able to invert the multilevel voltage with the high step-up output voltage, simple structure and fewer power switches. In this paper, the circuit configuration, the operating principle, and the output voltage expression have been derived. The proposed converter has been verified by simulation and experiment with the help of PSIM software and a laboratory prototype. The experimental results match the theoretical calculation and the simulation results. [ABSTRACT FROM AUTHOR]

The increasing integration of large solar PV and wind farms into the power grid has fueled, over the past two decades, growing demands for high-power, high-voltage, utility-scale inverters. Multilevel inverters have emerged as the industry’s choice for megawatt-range inverters because of their reduced voltage stress, capability for generating an almost-sinusoidal voltage, built-in redundancy and other benefits. This paper presents a novel switched-source multilevel inverter (SS MLI) architecture. This new inverter shows superior capabilities when compared to existing topologies. It has reduced voltage stress on the semiconductor, uses fewer switches (i.e., reduced size/weight/cost) and exhibits increased efficiency. The proposed SS MLI is comprised of two voltage sources ( V 1 , V 2 ) and six switches. It is capable of generating five-level output voltage in symmetric mode (i.e., V 1 = V 2 ) and seven-level output voltage in asymmetric mode (i.e., V 1 ≠ V 2 ). We present simulations results (using MATLAB®/Simulink®) for five- and seven-level output voltages, and they strongly support the validity of the proposed inverter. These positive results are further supported experimentally using a laboratory prototype. [ABSTRACT FROM AUTHOR]

Simulation of SIMO based DC-DC Converter for multi level Solar PV Inverter is presented in this paper. In order to reduce the number of distinct DC supplies for an H-bridge inverter SIMO DCDC converter is applied which in turn allows the usage of single PV system for a multi level H-bridge inverter. Simulation model of three level and five level inverters is built and results are presented to validate the proposed ideas.

The paper presents a way of accomplishing a non-contact excita-tion by electromagnetic waves generated from a system that in-cludes WiFi microcontroller, H-Bridge and coil. The ESP 32 mi-crocontroller software achieves PWM signal, which follows’ a si-nusoidal shape of variable frequency. The PWM signal drives the H-bridge resulting in a more powerful electric signal that also drives the coil, accomplishing in this way the pseudo-sine electro-magnetic wave. The source code from microcontroller provides variable frequency and working period as well. The main features of the system are 0.5 to 3000 Hz, working periods between 0.1 and 10 seconds, the possibility to achieve more than one working peri-od with standby periods in between.

Multilevel inverters are proficient in achieving a high-quality staircase output voltage waveform with a lower amount of harmonic content. In this paper, a new hybrid multilevel inverter topology based on the T-type and H-bridge module is presented. The proposed topology aims to achieve a higher number of levels utilizing a lower number of switches, direct current (dc) voltage sources, and voltage stresses across different switches. The basic unit of the proposed single T-type and double H-bridge multilevel inverter (STDH-MLI) produces 15 levels at the output using three dc voltage sources. The proposed topology can be extended by connecting a larger number of dc voltage sources in the T-type section. The nearest level control (NLC) switching technique is used to generate gate pulses for switches to achieve a high-quality output voltage waveform. In addition, a simplified way to achieve NLC is also described in the paper. A detailed comparison with other similar topologies is provided to set the benchmark of the proposed topology. Finally, experimental work is carried out to validate the performance of the proposed topology.

A novel single-phase nine-level boost inverter is proposed in this paper. The proposed inverter has an output voltage which is higher than the input voltage by switching capacitors in series and in parallel. The maximum output voltage of the proposed inverter is determined by using the boost converter circuit, which has been integrated into the circuit. The proposed topology is able to invert the multilevel voltage with the high step-up output voltage, simple structure and fewer power switches. In this paper, the circuit configuration, the operating principle, and the output voltage expression have been derived. The proposed converter has been verified by simulation and experiment with the help of PSIM software and a laboratory prototype. The experimental results match the theoretical calculation and the simulation results.

This paper presents a method that enables a small car to reach its destination in an indoor environment using ultrawideband technology. For this purpose, we used four anchors and one tag. The tag can move because it is fixed on the car. The anchors and the tag are DWM1001 modules. The configuration of the five DW1001 modules is performed through a smartphone application provided by the manufacturer. The car has been built by us. The controller of the car is a Raspberry Pi microcomputer which controls the driver of the car DC motors by generating PWM signals. In addition, Raspberry Pi communicates with the tag by the UART interface. Thus, our goal was to control the car to reach a certain destination (xd, yd) requested by the user via Wi-Fi. Because the car hosts the tag, it continuously updates its position according to the information received from the four anchors. We implemented two scenarios, considering the initial (x, y) position of the car. In the first scenario, which is simpler, the car moved to its destination either along the x-axis or along the y-axis. In the second scenario, the car moves along one of the axes and then turns 90 degrees to reach its destination. Experimental results that show the precision of the positioning system are presented.

This paper presents a single-phase, cascaded half-full-bridge PWM multilevel inverter topology. It is made up of a main inverting H-bridge legs and level-clamping half-bridge circuits, each having its own dc source. The singlecarrier, multilevel PWM scheme is employed to generate gating signals for the power switches. The modulation scheme is hybridized to enable the output voltage of the proposed inverter configuration to inherit the features of switchingloss reduction from fundamental PWM and good harmonic performance from multiple sinusoidal PWM. Moreover, a simple base PWM circulation scheme is also introduced in this work to obtain a resultant sequential switching hybrid PWM (SSHPWM) circulation that balances power dissipation among the four power switches of the main H-bridge module. Operational principles with switching functions are given. For a modulation index of 0.9, the proposed inverter configuration was subjected to an R-L load and the respective numbers of output voltage level were synthesized. FFT analyses of the output voltage waveforms were carried out and the corresponding THD value of 13.16% was obtained. To verify the performance of the proposed inverter architecture, simulations and experiments were carried out on a 2.95 kW rated prototype of the proposed inverter for an R-L load and adequate results were obtained. [ABSTRACT FROM AUTHOR]

Air core solenoids are widely used in spherical tokamaks (STs), since their central stacks are quite compact and difficult to insert iron cores. However, much higher current are required to generate the same amount of flux in the solenoids with air core than in the ones with iron cores. Therefore, the power supplies of ohmic fields in STs are more challenging than those in conventional tokamaks with similar size. In this paper, a power supply based on insulated gate bipolar transistors (IGBTs) for the ohmic field coils in the Sino-UNIted Spherical Tokamak (SUNIST) is described. This power supply utilizes a modified H-bridge circuit, in which the high current switches are made by 10 IGBTs (rating 3.3 kV/1.2 kA) connected in parallel. A high voltage capacitor bank (1.2 kV/60 mF) and a low voltage capacitor bank (600 V/500 mF) store the energy required in different discharging stages. An adjustable low inductance high power resistor (0–0.3 Ω) made by stainless steel foils is used to help the circuit to generate a high current derivative in the ohmic field coils, which are required for gas breakdown, plasma current initiation and ramp up. The small loop voltage required for maintaining the plasma current is realized by the low voltage capacitor bank. For each tokamak discharge, all the switches of this power supply only need to be switched on and off one time with an interval of several milliseconds. Such slow operations of the IGBTs lower the risk of failure and minimize the technical difficulties of dynamical current sharing. The power supply is compact and reliable, and has discharged for more than 5000 times successfully. [ABSTRACT FROM AUTHOR]

This study analyzes a single-phase hybrid multilevel dc-link (MLDCL) inverter, in which a dc-link with two capacitors is integrated into a single dc source. When controlled under the conventional modulation scheme, the MLDCL inverter synthesizes a five-level output voltage. As the capacitor-voltage balancing depends on the fundamental period, the output voltage may contain unsolicited low-order harmonics. Moreover, in the conventional scheme, this inverter requires large dc-link capacitors. To avoid these problems, the present paper develops a simple phase-shifted pulse-width modulation scheme based on redundant switching states, which controls the MLDCL inverter and balances the capacitor voltage within each carrier period. The proposed modulation scheme also minimizes the dc-link capacitance by a factor of the frequency modulation ratio while reducing the total harmonic distortion of the output voltage and current. Unlike the conventional method, the proposed scheme considerably reduces the capacitor-voltage ripples and can be regulated by increasing the carrier frequency, thereby reducing the voltage stress on the switches and improving the reliability of the inverter. The feasibility of the proposed scheme over the conventional scheme is confirmed in a comparative study. Finally, the steady-state and dynamic performances of the proposed strategy are demonstrated in simulations and validated in experiments.

A novel (N+1)-level multilevel inverter (MLI) using a modified solar panel (MSP) and newly proposed commutator coupled with slip rings, is presented in this paper. This multilevel inverter has only one H-bridge (HB) unit. The number of voltage levels of MLI depends on the number of the output terminal of MSP. The sinewave output is made possible by two-dimensional controls. The staircase sine wave has been converted into pure sinewave by using the filter capacitor at H-bridge. It is transformed to high voltage sinewave by using a step-up transformer. This proposed technique is verified by simulation and prototype.

In this paper, the compensation of voltage sags and swells using a dynamic voltage restorer (DVR) based on a bi-directional AC/AC converter is presented for stabilizing single-phase AC line voltage. The H-bridge AC/AC converter with bi-directional switches and without bulk capacitor is adopted as the power topology of the proposed system. The proposed novel topology of DVR is adopted to compensate both voltage sag and swell conditions. Additionally, the power factor is closed to unity because a bulk capacitor is not required. The inner and outer loop control is proposed to improve the response with gain scaling; gain control is adopted to reduce the overshoot. Finally, a 2 kVA prototype has been implemented to verify the performance and accuracy of the control method for the DVR system. The peak efficiency of the system is up to 94%, and it can compensate 50% voltage swells and 25% voltage sags. [ABSTRACT FROM AUTHOR]

Multilevel Inverters (MLIs) are becoming more and more popular in medium and high power applications. This is due to several inherent advantages of MLI over two-level inverters such as high-quality output, lower device ratings, and several others. While the classical topologies are still having applications in most of the key areas, there is a growing interest in newer multilevel topologies with an objective of reducing power semiconductor device count, gate drivers and/or isolated DC sources. In this paper, a comprehensive review of some of the recently proposed newer multilevel inverter topologies with the abovementioned objectives is presented. In this article, a detailed investigation in terms of total power semiconductor switch count, number of DC sources, passive component requirement, highest switch voltage rating, total standing voltage etc. has been presented.

This paper proposes a new topology of the switched-capacitor multilevel inverter (SCMLI) for photovoltaics system, which can eliminate the leakage current. In the proposed topology, the capacitors are employed as a virtual DC power supply to boost the input voltage. Here, all capacitors are charging equal to DC source, thus, just one DC source is needed to achieve the staircase waveform. In this structure in order to make the negative levels, the capacitors are connected to the output in reverse polarity. Thus, the H-bridge circuit which is used in traditional SCMLI to build zero and negative voltage levels and leads a variable common mode voltage is removed. Due to the direct connection of the neutral terminal of the grid to the negative polarity of the PV; then this topology can eliminate the leakage current. In addition, the topology has an excellent ability to path the reverse current as well as an acceptable output waveform spectrum. The operating states of all components and loss calculations are analyzed and formulated accurately as well as simulated by using MATLAB-SIMULINK software. To confirm the performance of the proposed topology; a 500 W prototype is built and experimental results are presented.

Large-scale grid integration of renewables and cross-country border energy exchange may be facilitated by multi-terminal high-voltage direct-current (MTDC) grids. However, as the number of terminals and dc lines increases, power flow management may become a major challenge. This paper addresses such a fundamental issue through the introduction of current flow controllers (CFCs) into the MTDC grid. A CFC is a low power rated controllable voltage source that can enhance system performance by suitably redirecting the power flow at the point of connection. This is achieved through the regulation of the dc line current by introducing a series voltage at the connection node. The characteristics, control, and operation for three configurations of series-connected CFCs are studied. These have been termed a dual-thyristor converter CFC, a cascaded voltage source converter-dc chopper-based CFC, and a dual H-bridge CFC (2B-CFC). A four-terminal MTDC grid has been modeled in Simulink/SimPowerSystems to analyze the dynamic performance of the devices. The simulation results show that all devices are capable of improving system performance. In addition, the CFCs are compared in terms of controllability and dc fault performance. For completeness, a 2B-CFC prototype has been developed to study the impact of a CFC on MTDC grid operation, with an MTDC test rig used to validate simulation results.

The difference in power cell irradiances in cascaded multilevel converters results in different duty cycles among those cells when maintaining the maximum power point tracking (MPPT). However, the difference in cell duty cycles is undesired since it is proportional to the output voltage and current distortions. To this regard, a multilevel topology for photovoltaic (PV) applications is proposed, where an H6 bridge power cell is used instead of an H-bridge one. In case of solar irradiance mismatch among the power cells, the proposed converter injects power with lower voltage from the shaded cells without altering the PV voltage; hence maintaining the MPPT operation. This modification allows us to retain an equal duty cycle in all the power cells whatever the meteorological conditions are present; consequently, maintaining good output voltage and current waveform qualities. To test the effectiveness of the proposed solution, a detailed simulation model as well as an experimental prototype is built. The obtained results show that the proposed topology provides significantly improved output voltage and current qualities compared to the cascaded H-bridge one. The performance of the proposed topology compared to one offering improved harmonics performance, according to the European efficiency, has been also compared, where an enhancement of 2.64% has been registered. [ABSTRACT FROM AUTHOR]

A parameterized bipolar high-voltage pulse generator without H-bridge based on cascade of positive and negative Marx generators is proposed. In the proposed circuit topology, the positive and negative Marx generators are connected directly without any auxiliary circuits. Each stage of the Marx generators consists of a diode, a storage capacitor, two MOSFETs switches. A 1 kV DC power supply is employed to charge the storage capacitors of the two kinds of Marx generators. The control signals of switches generated by FPGA circuit according to the setting parameters of high-voltage pulses and loads are sent to high-voltage pulse circuit via optical fiber. There are two remarkable features in the developed prototype: (1) the ability to adjust all of the parameters of the high-voltage pulse, especially the variable rising and falling time, (2) the better match properties to different loads. The key parameters of the developed bipolar high-voltage generator show as following: adjustable rising/falling time 50–500 ns, pulse width of top flat 0–1 ms, repetition rate 10 kHz (at ±15 kV and 200 pF), overshoot/undershoot less than 5%, and amplitude 0 to ±15 kV. The shape of waveform can be the rectangle and/or triangle. All the pulse parameters can be programmed arbitrarily. [ABSTRACT FROM AUTHOR]

A solid state variable capacitor (SSVC) with minimum capacitor is proposed. A variable ac capacitor (with capacitance varied from 0 to $C_{{{\rm ac}}}$) is traditionally implemented by an H-bridge inverter and a large electrolytic dc capacitor, whose capacitance is 20 times of the ac capacitor's value, in order to absorb the ripple power pulsating at twice the line frequency (2 ω ripple power). The proposed SSVC system consists of an H-bridge and an additional phase leg connected to an ac capacitor with fixed capacitance $C_{{{\rm ac}}}$ and can reduce the dc capacitance to minimum value for absorbing switching ripples. The ac capacitor absorbs the 2ω component and theoretically can eliminate 2ω ripples to the dc capacitor completely. The total capacitor size is reduced by 13 times if same type capacitors (film) are used. Moreover, the proposed SSVC shows special advantages in terms of the switches’ current and voltage stress compared to other applications and the total device power rating is only 1.125 times of H-bridge. Since the proposed SSVC only has a small dc capacitor, a novel control system directly based on ripple power is also proposed to achieve stable dc voltage and fast dynamic response. Simulation and experimental results are shown to prove the effectiveness of the proposed SSVC with minimum capacitor. [ABSTRACT FROM AUTHOR]

The increasing integration of large solar PV and wind farms into the power grid has fueled, over the past two decades, growing demands for high-power, high-voltage, utility-scale inverters. Multilevel inverters have emerged as the industry’s choice for megawatt-range inverters because of their reduced voltage stress, capability for generating an almost-sinusoidal voltage, built-in redundancy and other benefits. This paper presents a novel switched-source multilevel inverter (SS MLI) architecture. This new inverter shows superior capabilities when compared to existing topologies. It has reduced voltage stress on the semiconductor, uses fewer switches (i.e., reduced size/weight/cost) and exhibits increased efficiency. The proposed SS MLI is comprised of two voltage sources ( V 1 , V 2 ) and six switches. It is capable of generating five-level output voltage in symmetric mode (i.e., V 1 = V 2 ) and seven-level output voltage in asymmetric mode (i.e., V 1 ≠ V 2 ). We present simulations results (using MATLAB®/Simulink®) for five- and seven-level output voltages, and they strongly support the validity of the proposed inverter. These positive results are further supported experimentally using a laboratory prototype.

Three‐phase locomotives use voltage source inverter technology for the speed control of traction motors. The voltage source inverter is fed by single phase active front end converter connected in H bridge in the locomotives. Since the voltage source inverter works in buck mode, a higher DC‐link voltage is required to provide the rated voltage of traction motors increasing the size and cost of system. This study proposes a high‐performance bi‐directional Z‐source inverter instead of voltage source inverter. Analysis is performed in all regions of operation of locomotive drive‐acceleration, free running and regenerative braking. Both the speed control techniques‐variable voltage variable frequency and field weakening are used for the drives. Simulation study of the system shows that the DC‐link voltage gets reduced by 39% which in turn lower the voltage stress. This will decrease the traction transformer output voltage. Reduction in the harmonics at the output of Z‐source inverter by 16% reduces the overheating of traction motor drive. A small scale prototype of Z‐source inverter fed drive is made in the laboratory to verify the performance obtained from the simulation. [ABSTRACT FROM AUTHOR]

This work proposes a switching technique for cascaded H-Bridge (CHB) cells. Single carrier Sinusoidal PWM (SCSPWM) scheme is employed in the generation of the gating signals. A sequential switching and base PWM circulation schemes are presented for this fundamental cascaded multilevel inverter topology. With these proposed concepts, it is now possible to generate equal average switching signal patterns in all the constituting power semiconductor switches. This results in equal switching loss dissipation and equal power sharing in CHB multilevel inverter modules; and therefore technically modularizes the cascaded system. A 4-cell cascaded structure has been used to exemplify the proposed switching technique. Outlines with switching functions are given for the proposed modulation strategy. For a modulation index of 0.9, a THD value of 14.62% has been achieved in the output voltage waveform of the exemplanary 4-cell cascaded configuration. Verification of the performance of the proposed control technique is done through simulations and experiments. [ABSTRACT FROM AUTHOR]