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Quantum comparators hold substantial significance in the scientific community as fundamental components in a wide array of algorithms. In this research, we present an innovative approach where we explore the realm of comparator circuits, specifically focussing on three distinct circuit designs present in the literature. These circuits are notable for their use of T-gates, which have gained significant attention in circuit design due to their ability to enable the utilisation of error-correcting codes. However, it is important to note that T-gates come at a considerable computational cost. One of the key contributions of our work is the optimisation of the quantum gates used within these circuits. We articulate the proposed circuits employing Clifford+T gates, facilitating error correction code implementation. Additionally, we minimise T-gate usage, thereby reducing computational costs and fortifying circuit robustness against errors and environmental disturbances-essential for mitigating the effects of internal and external noise. Our methodology employs a bottom-up examination of comparator circuits, initiating with a detailed study of their gates. Subsequently, we systematically dissect the functions of these gates, thereby advancing towards a comprehensive understanding of the circuit's overall functionality. This meticulous examination forms the foundation of our research, enabling us to identify areas where optimisations can be made to improve their performance. [ABSTRACT FROM AUTHOR]

The intrinsic high parallelism and entanglement characteristics of quantum computing have made quantum image processing techniques a focus of great interest. One of the most widely used techniques in image processing is segmentation, which in one of their most basic forms can be carried out using thresholding algorithms. In this paper, a fault-tolerant quantum dual-threshold algorithm has been proposed. This algorithm has been built using only Clifford+T gates for compatibility with error detection and correction codes. Because fault-tolerant implementation of T gates has a much higher cost than other quantum gates, our focus has been on reducing the number of these gates. This has allowed adding noise tolerance, computational cost reduction, and fault tolerance to the state-of-the-art dual-threshold segmentation circuits. Since the dual-threshold image segmentation involves the comparison operation, as part of this work we have implemented two full comparator circuits. These circuits optimize the metrics T-count and T-depth with respect to the best circuit comparators currently available in the literature. [ABSTRACT FROM AUTHOR]

Adders are one of the most interesting circuits in quantum computing due to their use in major algorithms that benefit from the special characteristics of this type of computation. Among these algorithms, Shor's algorithm stands out, which allows decomposing numbers in a time exponentially lower than the time needed to do it with classical computation. In this work, we propose three fault-tolerant carry lookahead adders that improve the cost in terms of quantum gates and qubits with respect to the rest of quantum circuits available in the literature. Their optimal implementation in a real quantum computer is also presented. Finally, the work ends with a rigorous comparison where the advantages and disadvantages of the proposed circuits against the rest of the circuits of the state of the art are exposed. Moreover, the information obtained from such a comparison is summarized in tables that allow a quick consultation to interested researchers. [ABSTRACT FROM AUTHOR]

Quantum computers base their operations on optimized circuit designs. These quantum circuits, unlike classic circuits, follow the set of rules determined by quantum mechanics. Currently, one of the main problems to solve in Quantum Computation is Shor's algorithm, which consists in factoring large numbers. It is based on arithmetic operations, therefore to optimize such operations is hence relevant. In this work, a novel half subtractor circuit is presented; it is referred to as FGE* and it has demonstrated to be a 25% faster than the state-of-the-arts reversible circuits. It is based on reversible quantum gates and it does not have any garbage output. Moreover, a robust metric is considered for comparing, in terms of resources and speed, the proposed circuit with other circuits in the literature. [ABSTRACT FROM AUTHOR]