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Summary: This paper proposes leaky least mean fourth (LLMF) algorithm for the control of five‐level series connected H‐bridge multilevel inverter (5L SCHB‐MLI). The SCHB multilevel inverter is a popular configuration due to its wide application for high‐power and medium‐voltage applications. The complete system comprising the grid, load, and compensator is modeled in MATLAB/SIMULINK. Prototype hardware is also developed in the laboratory for experimental validation. The 5L SCHB inverter is connected in a single‐phase power distribution system and controlled as a compensator. The voltage across both DC links of the H‐bridges is regulated to almost equal value by the proposed control algorithm. The closed loop system is designed to mitigate total harmonic distortion (THD) in the source current and improve the power quality of the proposed system. The system is analyzed under the steady state and dynamic state, and the results are also verified on the hardware prototype developed in the laboratory. The proposed algorithm is also compared with conventional least means square (LMS) algorithm and notch filter algorithm on several parameters. The paper discusses a detailed simulation and hardware analysis on the control of five‐level MLI topology. [ABSTRACT FROM AUTHOR]

Background and Objectives: The H-bridge (HB) driver design with high efficiency is one of the most challenging issues in power systems that drive AC/DC loads. HB driver circuit based upon complementary MOSFET type used as a driving system of DC motor, power converters, and battery charger for electrical vehicles. In Driving DC motors, dead-time (DT) generation has been considered a major factor such as preventive power line short-circuits (shoot-through) over high and low-side MOSFETs. In this paper, the HB driver is designed for linear actuators with consideration for the prevention of shoot-through. Methods: The propagation delay of logic gates are used to postpone the arrival gate drive signal for high/low side MOSFETs resulting in short circuit elimination on the DC source. Results: As mentioned, logic gates' propagation delay by their values causes interruption between the high and low-side power switches gate drive signal resulting in shoot-through elimination. Although the existence of DT influences the performance of the rotational speed and output torque of a DC motor by increasing the distortion and pulse interval, Linear actuators due to low-velocity linear motion do not require the PWM control, therefore DT has no substantial effect on driver performance. Conclusion: Simulation and experimental results validate the method proposed in this paper. According to the specifications of the circuit designed in this paper, for loads that do not need rotational speed control, logic gates with proper propagation delay can be chosen to eliminate short circuits in complementary MOS switches without requiring DT compensation methods. [ABSTRACT FROM AUTHOR]

In this paper, we propose a method for calculating the DC source amplitude in an extended multilevel inverter (MLI) structure so that the maximum number of levels and the output voltage waveform are as close as possible to the sinusoidal wave with minimum total harmonic distortion (THD). For the developed structure, three algorithms are suggested to determine the amounts of DC voltage resources. The first important point about choosing the right amounts for the DC resources is that the number of levels should be as large as possible, and the second important point is that the intervals between the levels should be the same throughout the waveform. By observing these two points, the output voltage waveform can be as near as possible to the sinusoidal wave that we want. In this study, we used iteration-based methods to find suitable values for DC sources. Simulation results are offered to confirm the capability of the extended multilevel converter. After we solved the problem through calculation and analysis, a code was written in MATLAB with the aim that this time the code will tell us for what values of DC sources we will have the largest number of levels and as we expected, the output of the MATLAB code confirmed the correctness of the calculations. [ABSTRACT FROM AUTHOR]

Simulation of SIMO based DC-DC Converter for multi level Solar PV Inverter is presented in this paper. In order to reduce the number of distinct DC supplies for an H-bridge inverter SIMO DCDC converter is applied which in turn allows the usage of single PV system for a multi level H-bridge inverter. Simulation model of three level and five level inverters is built and results are presented to validate the proposed ideas.