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This paper describes a flow control of the dye in the paper mill with the quasi-Z-source indirect matrix converter (QZSIMC) fed induction motor drive. More than a decade the voltage-source inverter (VSI) and current-source inverter (CSI) have been used to control the speed of the induction motor, which in turns controls the flow of dye. Recently, the matrix converter (MC) has been an excellent competitor for the VSI or CSI for its compactness. The voltage transfer ratio of the VSI, CSI, and MC has been limited to 0.866. Thus, the efficiency of these converters is less. To improve the voltage transfer ratio the quasi-Z-source network (QZSN) is to be used between voltage source and indirect MC (IMC). The modification in the shoot-through duty ratio of the QZSN varies the voltage transfer ratio greater than 0.866. Different voltage transfer ratios are needed for different voltage sag conditions. For a variation of the duty ratio of the QZSN, the fuzzy logic controller has been presented. To control the IMC vector control with space vector modulation has been presented. This paper proposes the implementation of QZSIMC adjustable speed drive for the flow control of dye in paper mill during different voltage sag conditions. A 4-kW prototype has been built and the effectiveness of the proposed system is verified with simulation results and experimental setup. Simulation is done in MATLAB, Simulink platform. Experimental setup is done with the aid of a TMS320F2812 (Texas Instrument) processor. The experimental results validate the maintenance of the speed of an induction motor at the set condition, thus controlling the perfect flow of dye in paper manufacturing technology. [ABSTRACT FROM AUTHOR]

The number of applicable carrier-based pulsewidth modulation (PWM) patterns increases with the growth of output levels in scalable multilevel topologies, such as active-neutral-point-clamped (ANPC) converters. Therefore, it is hard to optimize PWM for such topology, especially with large output levels. In this paper, a simplified and modular carrier-based PWM design approach for multilevel ANPC converters is proposed. Inspired by the decomposition theory, the topology decomposition is introduced in this paper to decompose an N-level ANPC converter into low-level subtopologies. Then, the complete set of applicable PWM patterns is derived based on ANPC operation principles, which makes it possible to optimize the performance based on the various requirements in applications. Meanwhile, the carrier-based PWM is implemented through the utilization of subtopologies with low-level modulation schemes, such that the design process of carrier-based PWM is greatly simplified and modularly realized. Both the complete PWM patterns and PWM design examples with experimental results of several ANPC converters are provided to show the feasibility and modularity of the proposed method. [ABSTRACT FROM AUTHOR]

Connection of an LC filter to the output of voltage source inverter (VSI) in squirrel cage induction motor (SQIM) drive converts the pulse-width modulated (PWM) voltages into smooth sinusoidal voltages. However, this connection may lead to closed-loop instability in the rotor flux-oriented (RFO) vector-controlled (VC) SQIM system. The closed-loop stability of the combined SQIM + LC filter (SQLC) system is complex and has not been analyzed properly in the literature. In this paper, a detailed closed-loop stability analysis of the SQLC system has been presented based on stability region (SR) and accordingly the PI gains of VC has been designed. The SR method is adopted to derive the common stability regions for the SQIM system and SQLC system. Thereby, the paper proves that connecting an LC filter in-between the VSI and the SQIM system does not always destabilize the closed-loop system. Further, for an SQLC system, the complete range of current controller gains is obtained at various operating points. The frequency-domain specifications have been used to select a proper stabilizing set and the effect of parametric variation of LC filter on the stabilizing set has also been discussed. The experimental results are provided to validate the analysis. [ABSTRACT FROM AUTHOR]

Multiphase variable-speed drives and generation systems (systems with more than three phases) have become one of the mainstream research areas during the last decade. The main driving forces are the specific applications, predominantly related to the green agenda, such as electric and hybrid electric vehicles (EVs), locomotive traction, ship propulsion, “more-electric” aircraft, remote offshore wind farms for electric energy generation, and general high-power industrial applications. As a result, produced body of significant work is substantial, making it impossible to review all the major developments in a single paper. This paper therefore surveys the recent progress in two specific areas associated with multiphase systems, namely power electronic supply control and innovative ways of using the additional degrees of freedom in multiphase machines for various nontraditional purposes. [ABSTRACT FROM AUTHOR]

This paper proposes a single-phase ac–dc–ac converter composed of a transformer and two three-leg converters connected in series. The proposed converter allows to supply the load with a voltage with constant amplitude and frequency, and to operate with the grid current with low harmonic distortion and high power factor. In addition, the converter can be used to mitigate fundamental overvoltage and voltage harmonics at the grid. The system model, regions of operation, a power flow analysis, and a method to regulate the dc-link voltages using the voltage vector redundancies are given. In the first version of this paper, two pulsewidth modulation (PWM) techniques (including space vector PWM) and a control system were provided. The proposed topology is compared with two conventional systems in terms of operation range, harmonic distortions, and semiconductor losses. Simulation and experimental results are provided to validate the feasibility of the system. [ABSTRACT FROM AUTHOR]

Light-emitting diodes (LEDs) are widely used in street lighting, landscape lighting, liquid crystal display (LCD) backlighting, healthcare, etc. As an important part of LED lighting products, LED driver plays a vital role in maintenance costs reduction, energy saving and lifetime prolongation. In this paper, a single-stage LED driver is proposed, which is integrated by a totem-pole bridgeless power factor correction (PFC) unit and several modular LCL-T resonant rectifiers. The totem-pole bridgeless PFC unit and the LCL-T resonant rectifiers are integrated by sharing switches, which can simplify the circuit and reduce the system cost. The output current can be regulated by applying the variable inductor control. Constant duty cycle and fixed switching frequency operation can be achieved as well. The operating principle and the performance of the proposed converter are analyzed in this paper. In addition, a precise parameter design method is proposed by considering the high-order harmonics. At last, an experimental prototype is established to validate the proposed parameter design and variable inductor control method. [ABSTRACT FROM AUTHOR]

This paper investigates the operation of the back-to-back neutral point clamped (BTBNPC) converters when the ac voltages on both ends are asynchronous. The zero-sequence injection (ZSI) technique has been used to extend the linear modulation range of the pulsewidth modulation operation. This paper investigates the ZSI of the BTBNPC to maximize the dc-bus voltage utilization while the ac voltages of both ends have different magnitudes and phases. This study further explores the reactive current injection to reduce the risk of overmodulation when grid voltages surge. The combination of these techniques can extend the operation range of the BTBNPC over varying ac voltages of both ends with the available dc-bus voltage. In addition, the issue of the neutral-point balance is also taken into consideration. Laboratory test results are provided to verify the proposed technique. [ABSTRACT FROM AUTHOR]

Four-level hybrid-clamped inverter is a newly proposed topology that can operate under a wide voltage range without switches connected in series. However, when it is applied in medium voltage high power conversions, the flying capacitors in each phase will occupy a huge volume and a high switching frequency is required to restrain the voltage ripples. In order to overcome this drawback, a four-level active neutral-point clamped inverter is discussed in this paper, which consists of only six switches and no diodes or flying capacitors are required. In order to balance the neutral-point voltages under the full power factor and modulation index range, a capacitor voltage balance method based on carrier-overlapped pulsewidth modulation is proposed in this paper. The upper and lower dc-link capacitor voltages are balanced by zero-sequence voltage injection and the central dc-link capacitor voltage is balanced by adjusting the duty cycles of switching signals slightly. Simulation and experimental results are presented to confirm the validity of this method. [ABSTRACT FROM AUTHOR]

A new single stage three-phase ac–dc converter with four switches and galvanic isolation is proposed in this paper. The new converter is simple and uses fewer switches than previously proposed ac–dc converters of the same type. It is a bridgeless converter that can operate with continuous input current and with any pulsewidth modulated method suitable for a standard three-phase six-switch voltage source rectifier. In this paper, the operation, control, analysis, and design of the proposed converter are explained and its features are discussed. Experimental results obtained from a prototype that confirm the feasibility of the converter are presented as well. [ABSTRACT FROM AUTHOR]

With the increasing of switching frequency in pulsewidth modulated motor system, common mode current (CMC) seriously affects the reliable operation of motor system and it has become a problem that cannot be ignored. This paper proposes a mathematical model of CMC and conducts detailed time–frequency characteristics analysis of CMC. The influence of several key parameters of motor system, such as distributed capacitance, dc bus voltage, and inverter switching frequency, on CMC characteristics has been analyzed in detail, and the corresponding variation rule of CMC oscillation amplitude and attenuation period/time has been summarized. The experimental results are presented to verify the correctness of theoretical analysis. The conclusions of this paper can lay theoretical foundation for the effective suppression of CMC in various practical applications. [ABSTRACT FROM AUTHOR]

In an open-end winding permanent magnet synchronous machines drive with single dc voltage source, zero-sequence current (ZSC) can lead to a high current stress of power modules and loss of motor. Therefore, some modulation strategies have been employed to alleviate ZSC by suppressing zero-sequence voltage (ZSV). However, ZSC still exists in the system because ZSV can also be generated by other nonlinear factors of inverter such as the dead time of system. In addition, zero-sequence back electromotive force in the zero-sequence path can also enlarge torque ripple and ZSC. In order to deal with above problems, first, this paper proposes a full-order adaptive zero-sequence observer to estimate future ZSC and ZSV, which are able to compensate one-step control delay. Second, to achieve the maximum voltage dc bus utilization, this paper proposes a novel deadbeat predictive current control (DPCC) scheme with alternate sub-hexagonal center pulsewidth modulation strategy to suppress ZSC and torque ripple simultaneously. Finally, this paper presents a comparative study of two types of methods, namely traditional DPCC scheme and the proposed DPCC scheme. Simulation and experimental results are demonstrated to verify the effectiveness of the proposed DPCC scheme. [ABSTRACT FROM AUTHOR]

This paper presents a novel control strategy to significantly reduce the high-frequency transformer loss in a modular solid-state transformer (SST) based converter system. The modular SST design is based on an ac–dc power-electronic building block comprised of an H-bridge at the ac input and a bidirectional soft-switching isolated dc–dc converter with a medium-voltage insulated high-frequency transformer. The ac terminals of input H-bridges are connected in series and directly coupled to the medium-voltage ac line, while the output dc terminals are all connected in parallel at a low voltage. The key innovation described in this paper, without sacrificing the output performance, is the control scheme that reduces core and winding losses associated with the dc–dc resonant stage by turning off the selected dc–dc converters in synchronism with the line voltage. The prototype for the test described in this paper is based on a modular SST where each module is rated at 50 kVA, with a 200 kHz transformer using 1.7 kV silicon carbide discrete mosfets, but the described control concepts are more broadly applicable to similar topologies. [ABSTRACT FROM AUTHOR]

The benefits of employing multilevel pulsewidth-modulated (PWM) waveforms for diagnostic purposes compared to sinusoidal- and square-shaped voltages are presented in this paper. Examples on how the high voltage circuits are designed to enable these studies, as well as results, are discussed. To demonstrate the approach, it is investigated what influence the choice of PWM levels has on the partial discharge (PD) characteristics for two similar wire specimens insulated by different materials. Here, to resemble a motor winding, two different twisted pair test objects insulated by either pure polyamide-imid (PAI) material or with added conductive Cr2O3 material were exposed to voltages with ultrashort rise times. The test objects were fed from either two-, three-, five-, or seven-level inverter waveforms of similar shape as in actual applications. To compare the performances, measurements of the PD characteristics were conducted. Specifically, the total number of PDs, as well as their average maximum amplitude per cycle, was obtained together with the phase-resolved PD pattern for each case. The experimental results presented in this paper show that the total peak and summed PD magnitude (exposure) drop considerably more for the Cr2O3 insulation compared to PAI when applying a five-level or higher level inverter. This reduction is more significant for the insulation with added Cr2O3 material and the usage of higher inverter levels reveals this. As more information can be obtained using higher inverter levels, the evaluation of new material constitutions is preferably done utilizing at least a three-level inverter or higher. [ABSTRACT FROM AUTHOR]

This paper provides an experimental discussion on a real-time real-power emulator that plays an important role in achieving a total test of medium-voltage, high-power, high-speed induction motor drives. The use of the emulator brings cost and time savings to the test. The test bench including the emulator is characterized by connecting two modular multilevel double-star chopper-cell (DSCC) converters connected in a front-to-front way. This paper designs, builds, and tests a 400- ${\rm V}_{\rm dc}$ , 10-kW downscaled test bench. It mainly consists of the following two identical DSCC converters: 1) one DSCC converter is used as an inverter under test; and 2) the other as a real-time real-power high-fidelity emulator. Experimental waveforms confirm that the emulator can reproduce electrical and mechanical operating performance of the three-phase 200-V, 10-kW, four-pole, 9000-r/min induction motor loaded with a centrifugal compressor. [ABSTRACT FROM AUTHOR]

This paper presents a neutral-point deviation and ripple compensating control method applied to a three-level neutral-point-clamped (NPC) converter. The neutral-point deviation and its harmonic components are analyzed with a focus on the average current flowing through the neutral-point of the dc link. This paper also proposes a control scheme compensating for the neutral-point deviation and dominant harmonic components under generalized unbalanced grid operating conditions. The positive and negative sequence components of the switching functions and ac input currents are employed to accurately explain the behavior of three-level NPC converter. Simulation and experimental results are presented to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

The dual-active bridge (DAB) topology is commonly preferred in bidirectional applications due to several attractive features, including auto-adjust of power flow, galvanic insulation, wide voltage gain, and zero voltage switching (ZVS) capability over some power ranges. However, the efficiency of the converter drops at light loads because the ZVS range is directly dependent on the circulating current. Assuming that the processed power is variable, the DAB converter's design must find a compromise between extending ZVS ranges and reducing the reactive power processing to ensure higher efficiency. Aiming this compromise, many papers propose hybrid approaches in which the modulation strategy is selected according to the processed power. However, this is not a simple solution because it demands multivariable control and offline optimizations. This paper proposes a modulation strategy to ensure ZVS and reduce the circulating current for the DAB converters. While the usual phase-shift modulation provides ZVS operation in a range of 40% to 100% of rated power, the proposed asymmetrical pulse-width modulation can obtain ZVS operation in a range of 2% to 100% of rated power. Experimental results demonstrated that the proposed strategy improves the converter efficiency for all power ranges, especially at light loads. [ABSTRACT FROM AUTHOR]

This paper presents a simple pulse width modulation algorithm for control of an ultracapacitor based energy storage system used for source and load support applications. As opposed to dual loop control philosophy that is widely used for backup applications, this paper presents a simple single loop current control that is only useful for controlling the ultracapacitor based DC/DC converters used in source and load support applications. The proposed PWM blocking method necessitates the DC/DC converter to operate in five states and takes into consideration the essential operational limits associated with the ultracapacitors. The performance of the proposed algorithm is verified experimentally using a 24 V laboratory prototype setup. Further, the shortcomings of dual loop control when applied to source and load support applications are demonstrated. [ABSTRACT FROM AUTHOR]

This paper suggests a cascade output voltage regulation strategy for dc/dc boost converters that embeds a robust inner-loop current controller against parameter variations. The contributions of this paper are divided into two parts. The first contribution is to present a simple and robust inner-loop current controller despite parameter uncertainties, guaranteeing the stability of the whole closed-loop system including the first-order internal dynamics. The second contribution is to show that an outer-loop proportional–integral regulator can stabilize the output voltage error without relying on any parameter information. Simulations and experiments using a 3-kW dc/dc boost converter showed that the proposed method offers satisfactory closed-loop performance in the presence of parameter uncertainties. [ABSTRACT FROM PUBLISHER]

This paper investigates the Multilevel Current Source Converter (MCSC) STATCOM. It proposes a new method of modulation. The new modulation method produces less THD and di/dt at the terminals of the MCSC STATCOM when compared to the widely used Phase-Shifted Carrier SPWM (PSC-SPWM). To ensure the inductors' currents remain balanced, a Current Balancing Algorithm (CBA) is presented. The CBA does not require any controls. It relies on assigning optimum switching states to each CSC module in real-time. In addition, two control strategies are presented in this paper. The first one assumes the STATCOM to be a SISO. Therefore, it only requires one PI controller. However, the gains for the controller must be changed if the STATCOM was to transition from capacitive mode to inductive mode, or vice versa. The second control strategy overcomes this problem by implementing a TITO integral state feedback controller. The contributions of this paper are validated via simulation and experimental results. [ABSTRACT FROM AUTHOR]

In this paper, we propose a loss calculation method considering minor hysteresis loops for permanent magnet (PM) motors driven by pulsewidth modulated (PWM) inverters. In the governing equation of the proposed method, both the effects of the major and minor hysteresis phenomena are expressed by a reaction magnetic field. This field is determined by iterative calculations of finite-element analysis (FEA) with a simple hysteresis modeling that considers the minor loops. The proposed method is applied to a PM motor, and the experimental verification is carried out. It is clarified that the minor hysteresis loops affect not only the hysteresis loss but also the eddy current loss because the skin depth varies with the differential permeability of the minor loops. [ABSTRACT FROM AUTHOR]

This paper discusses the dynamic interaction of multi active power filters (APFs) paralleled with a weak power grid. In order to analyze the dynamic interaction from multi APFs, the output impedance of an APF is solved. The influences of both circuit and control parameters on the output impedance are analyzed. Based on the output impedance of an APF, the dynamic influences of an APF on the other APF connected to the weak grid are discussed. As shown in this paper, the stability of an APF is improved with an increased output filter inductance and some control parameters to reduce its bandwidth. The proposed analysis methods can be used not only for multi APFs but also for the other multi-inverters connected to a weak grid. Experimental tests are carried out using two paralleled three-phase 10-kVA inverters to confirm the validity of the theoretical analysis. [ABSTRACT FROM PUBLISHER]

This paper presents the flexible dc capacitor voltages balancing control method for star-connected cascaded H-bridge converters. In this paper, the power flows are analyzed by investigating all the converter's control freedoms. Based on the analyses, users can accomplish the dc capacitor voltage balancing with both negative-sequence current and zero-sequence voltage. These two kinds of control options are further integrated together with the defined weighting factor $K$. The low-voltage ride-through operation of a proposed control method is also discussed in this paper. The control method is verified with a 220-V 1-kVA static synchronous compensators based on the star-connected cascaded H-bridge converters, and the experimental test results show that all the dc voltages are well regulated at the commanded value with different weighting factor $K$. [ABSTRACT FROM AUTHOR]

Active balancing architectures effectively increase the efficiency of large battery packs by equalizing charge between cells. For this purpose, a balancing circuit and appropriate control scheme have to be designed to enable the charge transfer via energy storage elements such as inductors. Using a manual approach to design balancing architectures can be tedious and error-prone, resulting in potentially suboptimal solutions. As a remedy, this paper presents an automatic synthesis of balancing circuits and their corresponding control, optimizing the number of required metal-oxide-semiconductor field-effect transistors, and necessary control signals. The proposed synthesis combines a satisfiability solver to explore the search space with a graph-based verification that iteratively excludes infeasible solutions until the optimal architectures are obtained. The experimental results are carried out for three given template circuits and two signal templates. The synthesis results in architectures that are superior in terms of all design objectives in comparison to solutions from literature that result from a manual design approach. [ABSTRACT FROM PUBLISHER]

The development of wide band-gap semiconductor devices is rapidly promoting the development of power electronics technology, especially in high frequency (HF) power converter region. A category of HF power converter is switch-mode power amplifier (PA). This paper focuses on the implementation of a multiphase dc–dc PA with high bandwidth and high power rate. When naturally sampled phase-shifted carrier modulation is implemented in the practical digital control system to control this HF power converter, the pulsewidth error problem caused by limited domain frequency of control chip becomes much severer. As a result, dc voltage component of each phase becomes different under several conditions, leading to current imbalance among phase inductors. This paper analyzes this problem and proposes a sensorless control method to solve it, based on the injection of random sequence in reference wave. A four-phase prototype employing GaN devices is fabricated, switching at 1 MHz. Current imbalance and effectiveness of the proposed control method are verified by experimental results. The prototype is capable of uniformly amplifying sine signal within 200 kHz and a 350 kHz bandwidth random signal, with peak output power up to 810 W. [ABSTRACT FROM AUTHOR]

Metallic joints are created in multivariable gas metal arc welding process by maintaining a balance between the quantum of heat generated and the feeding rate of electrode metal to the weld gap. The wire feeding control is often independently handled. The wire feeder unit should be simple, low cost, and capable of producing accurate speed. Arc welding controllers are often kept in clumsy conditions and the wire feeder unit is located close to the welder, could be much away from the controller. To reduce interconnections, separate sensing element for speed feedback should be avoided. Due to their negligible electrical and mechanical time constant, the pancake-type permanent magnet dc motor is suitable for wire feeding, where sensing of back electromotive force (EMF) for feedback is easy. When high frequency pulsewidth modulation (PWM) controller is used, the sensing of back EMF gets complicated. This paper explores the constraints on the choice of PWM frequency along with its maximum pulsewidth for different types of dc motors. It further elaborates comparatively on the choice of suitable control function for generating accurate speed control of wire feeding using back EMF as feedback. Finally, this paper also details the experimental results using the proposed control function. [ABSTRACT FROM AUTHOR]

This paper improves the position sensorless drive by sensing actual machine phase voltages. A high-bandwidth phase voltage measurement is developed for pulsewidth modulation (PWM) voltage inverters. On the basis, the actual phase voltage is obtained based on the digital integration of PWM voltage using the capture modulator in existing drive microcontrollers (MCU's). Comparing to existing phase voltage measurement, no separated A/D converter and communication hardware are required because PWM pulses are directly measured using MCUs. However, for standard machines without neutral points, only line-to-line ac PWM voltages can be measured for the phase voltage reconstruction. Since the capture based on transistor-transistor logic (TTL) logics receives only digital signals, a preprocess circuit to convert ac PWM line voltages to equivalent digital signals is proposed. This paper clearly explains the voltage sensing hardware using MCU capture modulator. According to experimental results, a 150-MHz sampling rate for phase voltage measurement is achieved based on the proposed capture-based voltage measurement. Although the physical limitation of back electromotive force estimation still appears, the proposed phase voltage measurement substantially enhances the sensorless drive performance at low speed. [ABSTRACT FROM AUTHOR]

High reliability and fault-tolerant operation capability are the application requirements of electric vehicles(EVs). In case of the drive system suffering from inter-turn short-circuit (ITSC) fault, it is necessary to avoid the aggravation of the fault and ensure the normal output performance, this paper proposed a torque ripple minimization control strategy for ITSC fault based on the open-winding (OW) five phase fault tolerant fractional slot concentrated winding interior permanent magnet (FTFSCW-IPM) motor drive system with common DC bus. Once the ITSC fault is detected, the fault phase is active open-circuit (OC) (null the current of the normal part in the fault phase) and connected to a voltage sensor. In this way, the torque ripple minimization control strategy can deal with the OC fault and ITSC fault. For the OC fault, the equal amplitude phase current modulation strategy is adopted based on the carrier-based pulse width modulation (CPWM). For the ITSC fault, this paper proposed a feedforward compensation approach to eliminate the influence of the short-circuit loop current. The novelty of the proposed method is that the compensation can be real-time estimated using the zero-sequence voltage (ZSV) and zero-sequence current (ZSC), even the ITSC level changes. Simulation and experimental results demonstrate the effectiveness and feasibility of the proposed method. [ABSTRACT FROM AUTHOR]

A drive train system (DTS) powered by an ideal voltage source and driving a permanent-magnet synchronous motor (PMSM) is discussed in this paper. A two-level three-phase voltage source inverter is used as a means of power conditioning. This converter is not equipped with any harmonic filters on neither the ac nor the dc side. The mechanical part of the DTS is modeled as a double oscillator according to a drive train in an electric vehicle (EV). Various inverter modulation schemes are applied, namely, a single-phase hysteresis scheme, two-space vector-based hysteresis control schemes, for one, a stator aligned hysteresis and for another, a rotor aligned hysteresis, a modulation scheme based on pulsewidth modulation (PWM), such as sinusoidal modulation (including zero-sequence components) and space-vector pulsewidth modulation (SVPWM). The hysteresis-based pulsing methods are nondeterministic and build a current controller in their structure by nature. The other pulsing methods are deterministic due to their underlying PWM and require a separate control unit. The influence of these modulation schemes on the performance of the DTS is determined by assessing the level of inverter generated harmonics flowing to the PMSM and to the tires [downforce, (mechanical part)] as well as the resulting switching frequency (electrical part). The simulated results presented in the paper indicate that the pulsing frequency can be reduced by means of the hysteresis controller. In addition, the dispersion of the harmonic energy of the inverter generated spectrum partly compensate the absence of filters. [ABSTRACT FROM PUBLISHER]

This paper investigates a method to increase fuel economy of motors for an electric vehicle (EV) traction system. The low-torque region of an EV motor is frequently used in everyday urban driving and in fuel economy measurement. Pulsewidth modulation (PWM) carrier harmonic iron loss accounts for a high percentage of total loss for EV motors in this region. This paper reveals the relationship between phase current and carrier harmonic iron loss for a permanent-magnet synchronous motor (PMSM) in the low-torque region. Thus, a novel carrier harmonic loss reduction technique is proposed and applied to two sets of three-phase windings for a concentrated winding PMSM. The loss is successfully reduced in a 70-kW EV motor as well as a two-dimensional finite-element method (2-D-FEM) calculation. The efficiency of the developed motor is calculated and compared with that of a conventional motor in the JC08 mode driving cycle. [ABSTRACT FROM PUBLISHER]

This paper characterizes the sampling effect in digital sinusoidal pulse width modulation (SPWM) of voltage source inverter (VSI). The time-domain analysis presented in this paper establishes the relation between the fundamental frequency, carrier frequency, and the sampling frequency at different modulation indices of the SPWM. The analysis investigates the effect of sampling frequency of the digital controller on the output of the VSI. It is shown that the low-frequency harmonic components appear in the frequency spectrum of the VSI output voltage due to sampling. As a result, the output current of digitally controlled VSI is stepped in nature. The double Fourier integral solution of the switched waveform for inner and outer integral limits has been used to derive the expression. The integral solution is obtained using Jacobi-Anger expansions. The generalized results developed in this paper are useful to investigate the sampling effect in high switching frequency DSPWM. The proposed sampling effect has been analyzed for SPWM of single-phase H-bridge inverter. The analytical results are verified using simulation and experimental results. The experimental results have been obtained with the use of field-programmable gate array (FPGA) as a digital controller. [ABSTRACT FROM PUBLISHER]

This paper presents an improved dc-link voltage balancing algorithm for a three-level neutral-point-clamped inverter by considering phase current direction. Detailed studies on the effects of change in load current direction on the dc-link capacitor voltages are presented. A maximum value of power factor is numerically derived, above which it affects the capacitor voltage balancing capability. Compared with the previously presented research work, the inputs to the space-vector pulsewidth-modulation block are the three phase currents and the difference between the two capacitor voltages. Depending on the states of the two dc-link capacitor voltages and phase current direction, redundant voltage vector sequences are selected. The selected vectors keep the capacitor voltage deviations within 5% of the total dc-link voltage. Two zero switching vectors (i.e., PPP and NNN) are also removed from all subsectors of the earlier proposed strategy, which one used to produce higher common-mode voltages. Detailed simulation and experimental results are presented in this paper for a 6.0-kW surface permanent-magnet synchronous machine. Both the simulation and experimental results show the required performance of the proposed system. [ABSTRACT FROM AUTHOR]

This paper proposes a two-degree-of-freedom (2DoF) interleaving scheme based on phase-disposition (PD) PWM for minimizing the high-frequency zero-sequence circulating current (ZSCC) in modular interleaved three-level converters. The method incorporates an internal interleaving by phase-shifting the carriers in each individual converter, and an external interleaving by phase-shifting the carriers of the different converters. A general harmonic distribution analysis which is valid for all types of voltage source converters is carried out to simplify the evaluation of the proposed method. A comprehensive evaluation of the proposed method shows that the PD-2DoF interleaving scheme produces the lowest ZSCC maximum value as compared to existing approaches. Moreover, it can achieve comparable performances as existing methods do in terms of output quality and common mode voltage magnitude, showing a great potential for practical implementation. Simulation and experimental results are obtained to demonstrate the performance of the proposed method. Generalization of the 2DoF interleaving scheme to high-level converter is also discussed in this paper. [ABSTRACT FROM AUTHOR]

This paper proposes a new carrier-based modulation strategy for symmetrical cascaded multilevel converters denominated phase disposition with sorting (PDS). It deals with the issue of irregular distribution of PWM signals and power for each converter cell that occurs when using the conventional phase disposition (PD) modulation. Although some alternatives have been proposed in the literature for overcoming these problems, most of them do not consider operation of the converter under fault conditions on the power cells. Therefore, one of the contributions of the proposed PDS modulation strategy is the ability to evenly distribute the pulse signals for the converter semiconductor switches, resulting in the same power being processed by all cells, maintaining the good quality of the synthesized output voltages, even with faults in one or more power cells. In addition, it allows implementation in commercial digital signal processors, not requiring additional hardware. The good performance of the proposed modulation strategy is validated through experimental results for a three-phase symmetrical cascaded multilevel converter with three cells per phase, considering normal and faulty conditions on the power cells. [ABSTRACT FROM AUTHOR]

Unipolar-pulsewidth modulation (UP-PWM) inverter takes advantages of high power efficiency and small output chokes which is widely used in the industry. However, UP-PWM inverters cannot be used in parallel operation due to a current unbalance problem. This paper studies the current unbalance problem of paralleled UP-PWM inverters with common dc bus and ac bus. First, the problem of unbalanced inductor current is defined and analyzed. Second, a technique to eliminate unbalanced currents is proposed. The proposed current balancing technique only requires one more current sensor in an inverter module rather than changing converter topology or modulation method, which makes it possible to apply UP-PWM inverters in parallel-operation while keeping the advantages of unipolar switching. The proposed current balancing method is verified by both simulation and hardware experiment. Experimental verification is performed on two 1 kW, 400 V input, and 120 V/60 Hz output prototypes, which shows a good agreement to the analytical study. [ABSTRACT FROM AUTHOR]

This paper investigates a Vienna rectifier as a charger for series-connected battery packs. Focusing on carrier-based pulsewidth modulation (CBPWM), the ripple current flowing through the neutral point (NP) results in the voltage oscillation if the loads are resistive. To reduce the ripple of average NP current with mitigated distortion under balanced and unbalanced dc-link voltages conditions, a novel CBPWM with segmented component injection scheme (SCIS) is proposed in this paper. After dc component injection, continuous intervals for optimized component injection and clamping intervals for compensation component injection are identified. Optimized components are calculated originally based on unbalanced factor to make the average NP current zero-size in one switching period. Moreover, unique compensation components generate suitable NP current to shape the sinusoidal input currents according to the circuit analysis. In consequence, the SCIS not only keeps the input current with low-harmonic distortion, but also minimizes the oscillation of dc-link voltage under balanced and unbalanced conditions. In addition, the value of the NP current during the clamping intervals is analyzed under various operating conditions. The effectiveness and the performance of the proposed SCIS are verified by simulation and experiments. [ABSTRACT FROM AUTHOR]

The supply-side current of an inverter-fed induction motor (IM) is easily accessible and less affected by noises than the motor stator current. This paper proposes a novel sensorless speed estimation method for an IM using the spectrum of the supply-side current. However, due to the influence of fundamental supply frequency, it is difficult to carry out the speed detection straight from the supply-side current signal. In this paper, an analytic model for characterizing the supply-side current of an inverter-fed IM using the modulation theory and the switching function concept is developed. Then, the Hilbert transform is applied to extract the speed harmonic component from the supply-side current. Finally, an interpolated Goertzel algorithm is put forward to enhance the estimation precision of IM speed. The performance of the proposed sensorless speed estimation method is proved by the speed estimation results obtained from hardware experiments of an IM fed by an inverter under different load conditions. [ABSTRACT FROM AUTHOR]

This paper suggests a design of pulsewidth modulation series-resonant converter (PWM SRC) for magnetron power supplies. The goal of this design is to make the PWM SRC have a wide output voltage maintaining mode 3 operation that shows good switching characteristics. To keep the mode 3 operation, a systematic design is required because the design is related to various parameters, such as resonant tank, transformer turns-ratio, magnetizing inductance, and duty-ratio. To establish the design procedure, converter analysis is performed related to the steady-state operation, input–output relationship, and critical design conditions, and several design equations are derived based on the analysis. Based on the design procedure, a PWM SRC with parallel-input-series-output-connected transformer has been designed for magnetron power supplies and verified. [ABSTRACT FROM AUTHOR]

The neutral-point voltage-balancing control is a critical issue of a neutral-point-clamped converter. The conventional control strategy is to inject the specific zero-sequence voltage to regulate the redundant vector, but it is unacceptable to the three-phase four-wire system. This paper provides a neutral-point voltage-balancing control by the dipolar modulation, and the control freedom of the zero-sequence voltage is flexible. Therefore, the proposed method is suitable for both three-phase three-wire and three-phase four-wire systems. Besides, the proposed method improves the control dynamic in a reactive power system. The proposed neutral-point voltage-balancing control is verified by the mathematical analysis and experimental results. The control dynamic, power loss estimation, and the output current performance are analyzed in this paper. [ABSTRACT FROM PUBLISHER]

Real-time frequency agility is one of the key limitations of current all-digital transmitters (ADTs). In this paper, to address this problem, an ADT based on direct-RF generation is proposed and implemented in a field-programmable gate array (FPGA). To achieve this, the pulse encoding is performed after the digital upconversion, which presents challenges in the pulse encoder implementation. However, the proposed design considerably improves the frequency agility when compared with current state-of-the-art approaches. Two different pulse encoders were designed in this paper, one is based on pulsewidth modulation (PWM) and the other on delta–sigma modulation ( \mathrm \Delta \Sigma \textM ). These units are implemented with high parallelization to achieve the required equivalent sampling rates. The proposed design enables the implementation of all-digital RF transmitters in FPGA with a widely tunable carrier frequency. In this paper, a variation from 0.1 up to 6 GHz of carrier frequency, with a maximum frequency resolution of 1.5625 MHz, is demonstrated. Measurement results in terms of signal-to-noise ratio (SNR) and error-vector magnitude are presented and discussed. In the case of the PWM, maximum SNRs of 39 and 36 dB were obtained for a 5 and 10 MBd of symbol rates (SRs). In the case of \mathrm \Delta \Sigma \textM , maximum SNRs of 38 and 35 dB were obtained for 20 and 40 MBd of the SR. [ABSTRACT FROM PUBLISHER]

The aim of this paper is to study the dynamics of a permanent magnet direct current (PMDC) brushed motor while two crucial space-domain effects, namely, slotting effect and commutation phenomenon are taken into account. Semi-analytical dynamic time-domain PMDC brushed motor model inclusive of these space-domain effects is used to analyze and investigate the dynamics. Pulse width modulation operated discontinuous current PMDC brushed motor drive with steady duty cycle is employed to acquire the bifurcation patterns. The chaotic nature due to slotting effect and commutation is identified from the bifurcation patterns and reported. It also has to be admired that such nonlinear dynamical behavior with the same set of parameters at similar operating condition has not been observed when a conventional PMDC brushed motor dynamic model is considered. These space-domain effects, namely, slotting effect and commutation also have a prominent impact to make some time-domain states of a PMDC brushed motor drive chaotic. The role of slotting effect and commutation phenomenon to analyze the chaos over time-domain state variables of the PMDC brushed motor drive is investigated and validated experimentally in this paper. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) with nearest level modulation (NLM) is widely used in the high voltage applications for low switching frequency and easy implementation. Existing literature has not provided a complete submodule (SM) fault ride-through scheme for MMC with NLM. In this paper, a strategy including fault detection, localization, redundancy, and recovery is proposed to ensure continuous operation of MMC under IGBT open-circuit faults conditions. It only requires a few hardware and software resources. The features of MMC and SMs with three types of failures are studied, respectively. Based on these, the fault detection method is proposed by using a simple hardware circuit, thus high computation complexity is avoided. Since current fault localization schemes are limited to MMC with carrier phase shifted pulse width modulation, this paper further proposes a strategy for MMC with NLM to locate the faulty SM and identify the fault type. After this, the fault redundancy and the proposed fault recovery method are applied to eliminate the fault and then exit the failure state. Therefore, the ability of SM fault ride-through can be realized. Analysis of failure characteristics are verified in simulation. Experimental results based on a single-phase MMC prototype with 11 SMs per arm are presented to demonstrate the validity of the proposed fault ride-through strategy. [ABSTRACT FROM AUTHOR]

This paper presents a new all-digital transceiver architecture fully integrated into a single field-programmable gate array chip. Both the radio frequency (RF) receiver and the transmitter were entirely implemented using a digital datapath from the baseband up to the RF stage without the use of conventional analog-to-digital converter, digital-to-analog converter, or analog mixer. The transmitter chain uses delta-sigma modulation and digital upconversion to produce a two-level RF output signal. The receiver uses a high-speed comparator and pulsewidth modulation to convert the RF signal into a single-bit data stream, which is digitally filtered and then downconverted. Both the transmitter and the receiver are agile with flexible carrier frequency, bandwidth, and modulation capabilities. The transceiver error vector magnitude and the signal-to-noise ratio figures of merit were analyzed in a point-to-point transmission to evaluate the transmitter’s performance. The results show the feasibility of this approach as a more flexible alternative to common radio architectures. [ABSTRACT FROM PUBLISHER]

This paper discusses and compares phase-shifted pulse-width modulation (PS-PWM) and level-shifted PWM (LS-PWM) in a modular multilevel single-delta bridge-cell (SDBC) inverter for utility-scale grid-tied photovoltaic applications. This three-phase SDBC inverter provides the capability of operating even under power-distribution imbalances not only among three clusters, but also among cascaded bridge cells in each cluster. The main focus of this research lies in analyzing the capability of operation under severe power-distribution imbalances and presenting power-balancing methods based on zero-sequence current injection, which result in an extended power-balancing capability. This paper highlights that LS-PWM is superior to PS-PWM in both power-balancing capability and harmonic performance at the ac side of the SDBC inverter when operating under power-distribution imbalances. Experimental results obtained from a three-phase 10-kW downscaled system show good agreement with those from the theoretical analysis. [ABSTRACT FROM AUTHOR]

When the permanent magnet synchronous motor (PMSM) works in the high-speed region with low carrier ratios, the performance of the rotor flux observer has a great influence on the loading capacity and stability of the speed sensorless vector control system. The problem of the adaptive compensation flux observer (ACFO) of the PMSM at low carrier ratios is analyzed in this paper, and an ACFO with a feedback delay component is presented. After retuning the PI regulator parameters, the new expression related to carrier ratio is obtained, which can improve the performance of the flux observer at low carrier ratios and make the torque and current loop response faster. Meanwhile, the stability of different Euler approaches of the integrator for ACFO in the discrete domain is analyzed, and a new Euler with a coefficient is proposed to combine the merits of the backward Euler and the trapezoid Euler. It shows better performance at low carrier ratios. Finally, the effectiveness of the discrete ACFO is verified by experiments. [ABSTRACT FROM AUTHOR]

An improved two-stage model predictive current control (MPCC) for three-phase three-level converters in the paper, which can simultaneously achieve common-mode voltage (CMV) reduction, effective dc-link capacitor voltage control, and decreased computational burden, is proposed. Compared to the other current control strategies, it has the capability of handling multiple control objectives and possesses a simple structure. Furthermore, it greatly reduces the CMV since the peak CMVs of all the candidate voltage vectors are constrained to be less than one sixth of the dc-link voltage. In addition, an optimal two-stage voltage vector selection mechanism is employed in the proposed method. It helps to significantly reduce the computational complexity. Simulation and experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents Space Vector Modulation (SVM) sequences that reduce Common Mode Voltage (CMV) in Dual Three-phase Asymmetrical Induction Motor (DTAIM). At first, two existing SVM techniques such as Reference SVM (RSVM) and CMV1 are studied. Additionally, three new switching sequences are developed as CMV2, CMV3 and DCMV3, which reduce peak magnitude of CMV by 66.8% in comparison with RSVM technique. In SVM techniques, to obtain least CMV, zero vectors are usually replaced by two opposite large Active voltage Vectors (AV) with equal time duration. In such topologies like CMV1, total six AVs are utilized to synthesize the reference vector. The proposed SVM technique CMV2 utilizes only five large AVs to synthesize the reference vector and reduces CMV. Selection of five neighbouring AVs is reflected in reduction of harmonic flux trajectories and stator current ripple in proposed techniques. Additionally, two more switching sequences (CMV3 and DCMV3) are developed related to utilization of specific zero voltage vectors in all sectors (7 and 56) that produce zero CMV. These two switching sequences also provide easy implementation feature during the development of c-code program. In this study, CMV and stator current ripple are considered as performance parameters for different SVM techniques. All SVM techniques are analysed by analytical results, computer simulations, and using prototype test setup of DTAIM fed by Dual Three-phase Voltage Source Inverters (DTVSIs). [ABSTRACT FROM AUTHOR]

In this paper, a photovoltaic (PV) microinverter capable of operating in both island mode and grid-connected mode by means of a reconfigurable control scheme is proposed. The main advantage of control reconfiguration is that in grid-connected mode, the microinverter works as a current source in phase with the grid voltage, injecting power to the grid. This is the operation mode of most commercial grid-connected PV microinverters. The idea is to provide those microinverters with the additional functionality of working in island mode without changing their control algorithms for grid-connected mode, which were developed and refined over time. It is proposed that in island mode, the microinverter control is reconfigured to work as a voltage source using droop schemes. These schemes consist in implementing P/Q strategies in the inverters, in order to properly share the power delivered to the loads. The aim of the paper is to show that the proposed control reconfiguration is possible without dangerous transients for the microinverter or the loads. Simulation and experimental results on an 180-W PV microinverter are provided to show the feasibility of the proposed control strategy. [ABSTRACT FROM PUBLISHER]

Utility engineers, professionals from regulatory agencies, manufacturers and researchers have discussed if high-frequency distortions produced by rooftop photovoltaic generators are a general power quality concern for distribution systems. In this context, this paper presents the results of an extensive research to investigate the emission and propagation characteristics of such high-frequency distortions. Analytical and theoretical analyses, computer simulations, laboratory experiments and field measurements revealed that high-frequency distortions emitted by rooftop photovoltaic inverters are produced with a voltage source characteristic. As a result, the equivalent grid impedance limits and attenuates significantly the high-frequency distortions injection and propagation into the distribution systems. Moreover, the front-end, low-pass filters found in many home appliances also contribute with such attenuation by sinking part of the high-frequency distortions. In summary, the results indicate that these distortions are unlikely to become a generalized power quality concern, so that the front-end filters commonly available for such devices, when properly designed, are enough to deal with this issue. [ABSTRACT FROM AUTHOR]