Search

A methodology for the assessment of cell concentration, in the range 5–100 cells/μL, suitable for in vivo analysis of serous body fluids is presented in this work. This methodology is based on the quantitative analysis of ultrasound images obtained from cell suspensions and considers applicability criteria, such as short analysis times, moderate frequency, and absolute concentration estimation, all necessary to deal with the variability of tissues among different patients. Numerical simulations provided the framework to analyze the impact of echo overlapping and the polydispersion of scatterer sizes on the cell concentration estimation. The cell concentration range that can be analyzed as a function of the transducer and emitted waveform used was also discussed. Experiments were conducted to evaluate the performance of the method using 7-μm and 12-μm polystyrene particles in water suspensions in the 5–100 particles/μL range. A single scanning focused transducer working at a central frequency of 20 MHz was used to obtain ultrasound images. The method proposed to estimate the concentration proved to be robust for different particle sizes and variations of gain acquisition settings. The effect of tissues placed in the ultrasound path between the probe and the sample was also investigated using 3-mm-thick tissue mimics. Under this situation, the algorithm was robust for the concentration analysis of 12 μm particle suspensions, yet significant deviations were obtained for the smallest particles. [ABSTRACT FROM AUTHOR]

This article is focused on the design of a high-voltage (800 V) bidirectional boost converter with high efficiency at medium-low power levels. Triangular current mode (TCM) enhances the efficiency of the converter at low power, thanks to soft-switching operation, but it requires variable switching frequency and large current ripple through the inductor. The former can be implemented by using silicon carbide (SiC) mosfets and the latter can be minimized by using interleaved modules. At low power, TCM requires high switching frequency, a minimum negative inductor current, and a minimum deadtime to obtain zero voltage switching. These values vary for different input/output voltage ratios and must be properly selected to reduce deadtime losses, normally neglected in the literature since it is assumed that they have low impact. However, it can be relevant at high frequencies (especially for devices with high reverse conduction voltage drop, such as SiC mosfets). In this article, deadtime losses are included in the proposed losses models and the selection of optimum values of deadtime and minimum inductor current to minimize these deadtime losses are analytically evaluated and experimentally validated. [ABSTRACT FROM AUTHOR]

In this paper, the third quadrant behavior of a high-voltage superjunction mosfet (SJ-FET) in cascode configuration (CC) with a low-voltage silicon mosfet is deeply studied by means of an analytical model and experimental data. The third quadrant dynamic behavior of the SJ-CCs is compared to the standalone counterparts by evaluating their reverse recovery time (tRR), reverse recovery peak current (IRRM), and reverse recovery charge (QRR). An analytical model and experimental results show that the SJ-CC avoids or mitigates the activation of the SJ-FET body diode during the third quadrant operation. As a consequence, the SJ-CC strongly improves the widely used figure-of-merit RON·QRR, which considers the on-state resistance of the transistors (RON). In addition, the results obtained using an SJ-CC are similar or better than those achieved by SJ-FETs with enhanced reverse recovery (i.e., irradiated SJ-FETs). This paper also includes a comparison with commercial wide bandgap switches, concluding that the RON·QRR value provided by the SJ-CC is around eight times higher than that provided by a commercial GaN cascode. [ABSTRACT FROM AUTHOR]

This paper discusses the energization and start-up process of modular three-stage solid-state transformers (SSTs) based on a cascaded H-bridge topology. A key element of the SST is the auxiliary power supply (APS) feeding the auxiliary circuitry. Redundancy and simpler implementation can be achieved by powering the APSs from the dc-link capacitors of cells, but at the expense of a more challenging start-up process of the SST. The first step of this process must be performed before APSs are operative. This can result in undesired transient events (inrush currents, voltage sags in the capacitors voltages, etc.), which could prevent a proper start-up of the SST or even jeopardize the power devices or other elements. A simple strategy for the energization and start-up of SSTs using this APS structure is proposed. The method is valid for both grid-forming and grid-feeding operations of the SST, regardless of the energization port and without the addition of any extra circuitry. Simulation and experimental results are provided. [ABSTRACT FROM AUTHOR]

Using a generic model of how active array imaging systems operate, a formal definition of the image as a projection of the reflected wave field onto the wave field emitted to probe the medium is proposed. This definition is applied to the case of imaging in homogeneous and isotropic media to which, by using the frequency-domain solution of the wave equation, the relationship between the calculated image, the emitted and received signals, the positions of the transducers, the speed of the waves used, and the reflectivity of the medium is shown at each point. Then, a general algorithm for the formation of images of a region in this kind of media is derived. Finally, using real and simulated ultrasound signals, images obtained with the proposed signal projection method are compared with those produced by the “de facto” standard delay and sum-based algorithms. [ABSTRACT FROM AUTHOR]

Superjunction MOSFETs in cascode configuration with low-voltage silicon MOSFETs are evaluated in this paper. The proposed structure combines the good switching performance provided by the cascode configuration with the benefits of the silicon technology such as its robustness, maturity, and low cost. This paper aims to explain and to demonstrate the reduction of switching losses of superjunction MOSFETs in cascode configuration with respect to their standalone counterparts (directly driven). A detailed simulation analysis of power loss contributions is carried out under hard-switching operation. Moreover, experimental evidence is provided using a boost converter (100–400 V) operating in continuous conduction mode for different switching frequencies (100–400 kHz) and output power levels (180–500 W). [ABSTRACT FROM AUTHOR]

A converter intended to be used for the interconnection of battery-based energy storage systems with the cells of a multilevel converter is addressed in this paper. High efficiency at light and medium loads is important in these applications and it can be achieved using soft switching techniques. Two control techniques with fixed and variable switching frequency are proposed and compared. The use of silicon carbide (SiC) mosfets provides a higher attainable switching frequency, which is especially interesting in variable frequency control techniques, allowing the operation at high voltages and high switching frequencies, with high efficiencies over a wide power range. A synchronous boost DC/DC converter rated for 400 to 800 V and 10 kW is designed and developed with SiC mosfets obtaining efficiencies higher than 97% from 100% to 3.5% of full load using a variable switching frequency (up to 200 kHz) control. Significant efficiency improvement is achieved at medium and light loads. [ABSTRACT FROM PUBLISHER]

Quasi-square wave mode with zero voltage switching (QSW-ZVS) is an operation mode in which the switching losses can be minimized. However, a large inductance current ripple is needed in this mode, which limits the maximum attainable power of the topology. A possible way to increase the power managed by a QSW-ZVS mode converter is to use a modular converter. An input parallel output parallel (IPOP) arrangement, in which the current can be shared among the modules, can increase the total power proportionally to the number of modules. This paper addresses two main proposals. The first one is a master–slave technique to extend the QSW-ZVS mode to an IPOP modular converter, achieving an interleaved solution which minimizes the total input current ripple and assures the current balance among the modules. The second one is a comparison of four different control techniques applied to the IPOP modular converter to improve the overall efficiency at light to medium load: balanced master–slave technique, master–slave with phase-shedding, asymmetrical master–slave, and burst mode (or hysteretic control). These four strategies are theoretically analyzed, experimentally validated and compared using a 150–400 V 2 kW modular IPOP prototype made up of four synchronous boost converter operating in QSW-ZVS mode. [ABSTRACT FROM PUBLISHER]

This paper is focused on a high-voltage (400 to 800 V) bidirectional converter, which is intended to be used for the interconnection of battery-based energy-storage systems with the cells of a modular multilevel converter, providing distributed energy-storage capability to a solid-state transformer. This converter must have a high efficiency at medium and light load and also a low current ripple due to the charging and discharging processes. This work takes advantage of the use of SiC MOSFETs into a synchronous boost converter to accomplish the previous requirements. First, the adoption of a variable-switching frequency control to keep the efficiency high is analyzed, and second, the use of a modular converter with different control techniques to provide a current ripple reduction is also addressed in this study. An input-parallel–output-parallel synchronous boost converter, made up with three modules (3 kW per module), is used to validate experimentally the advantages of the use of SiC MOSFETs and to compare different control techniques. [ABSTRACT FROM PUBLISHER]

This paper describes a modular architecture based on the dual-active bridge (DAB) converter in input-series–output-parallel (ISOP) connection. This work is focused on the input voltage sharing to ensure a proper operation of each module by means of an active control of input and output voltages. A small-signal model of the modular architecture is proposed and a decoupled control loops’ scheme is used to implement the control strategy. An experimental setup has been built in order to validate the model of the DAB converter in ISOP connection and the proposed control strategy, taking different operating conditions and constructive parameter values into account. [ABSTRACT FROM AUTHOR]

Envelope tracking (ET) is a technique designed to enhance the efficiency of radio frequency power amplifiers (RF PA). It is based on providing the voltage to the RF PA with variations that mimic the shape of the envelope of the communication signal that the RF PA is processing. As the bandwidth of these signals can be around several megahertz, the switching frequency of the switching mode power supply designed for ET applications has to be very high. The good switching characteristics of Gallium Nitride devices makes them suitable for this application. This paper presents two multiphase converters to be used as envelope modulators in envelope tracking applications. [ABSTRACT FROM AUTHOR]

This paper addresses the performance of the bidirectional dual active bridge (DAB) converter. One of the advantages of the DAB is the possibility to achieve the zero-voltage switching (ZVS) operation in all the switches of this converter. However, the ZVS operation range can be lost for light loads, especially if high voltage is required in at least one of the DAB ports and the phase-shift control is used to regulate the power processed by the converter. Theoretically simple averaged and small-signal models are presented for the DAB converter. Using the study presented in this paper, the boundaries of the ZVS operation can be easily evaluated. The proposed models and analysis of the ZVS boundaries allow the proposal and evaluation of two different design strategies with different purposes: on the one hand, increasing the ZVS operation range and, on the other, improving efficiency at full load. Moreover, some techniques are presented for increasing the ZVS operation range and improving the efficiency of the DAB at full load (both using phase-shift control) employing the aforementioned analysis to obtain certain design criteria and conclusions. Finally, the proposed models, design strategies, and techniques to improve the performance of the DAB are experimentally tested using a 1-kW prototype with input and output voltages of 48 and 400 V, respectively. [ABSTRACT FROM AUTHOR]

The new wide band-gap semiconductor devices provide new properties to be explored. Normally on silicon carbide (SiC) JFET power devices have several advantages, in particular low switching losses and the potential capabilities of high temperature and high reverse blocking voltage. Looking for improving the overall efficiency in power converters, new structures based on these power devices might be studied. In this paper, a cascode rectifier based on normally on SiC JFET is presented and analyzed. This rectification structure can be applied as front-end rectifier stage for ac-dc power converters, increasing the overall efficiency of these topologies. A second cascode rectifier based on silicon (Si) MOSFET is also studied, as a low-cost alternative. A simple static forward characterization and a brief dynamic behavior analysis of the proposed cascode rectifier structure are made. Both cascode structures are compared with traditional Si rectifier diodes and front-end rectifiers, using an active power factor corrector (PFC) interleaved boost converter. As a result of this comparison, an efficiency improvement as high as two points is obtained. An additional OR gate based on a diode is also used as second test circuit to compare the proposed structures to the traditional Si rectifiers. A reduction between 75% and 55% of the total loss are obtained in this second experimental test. [ABSTRACT FROM AUTHOR]

Presentation skills, such as oral expression and public speaking, have normally been relegated to the background in engineering degree programs. In recent years, however, the labor market has specifically demanded these kinds of skills in engineers. Accordingly, new engineering degrees, adapted to the goals of the Bologna Declaration or ABET criteria, consider presentation skills as being fundamental transferable skills. In practice, however, many engineering degree programs do not specifically foster these skills even though they are included in the syllabus. This paper proposes a presentation-skills training that uses the Master's thesis as an opportunity for fostering presentation-related skills. This activity has students deliver a scheduled series of rehearsals, in front of their classmates and tutors, for their officially assessed presentation of their Master's thesis work. The paper also presents a Web tool specifically designed for uploading recordings of the rehearsal presentations for feedback online as a complementary method for fostering presentation-related skills. Finally, the results of carrying out the proposed resource over a 4-year period from 2009 to 2013 are discussed; they show that students following the proposed methodology had higher than average marks, all receiving an A+, and 82% of them receiving an A+ with distinction. [ABSTRACT FROM AUTHOR]

The efficiency of linear power amplifiers can be improved by modulating its supply voltage according to the peak value of the signal that is being amplified in a technique usually known as envelope tracking. High bandwidth dc/dc converters called envelope amplifiers (EAs) are used to carry out the supply modulation in an efficient manner. In the case of linear RF power amplifiers, the bandwidth requirements over the EA strongly depend on the signal being amplified: in modern telecommunication applications it can range from several hundred kilohhertzs to a few tens of megahertz. The path to achieve such bandwidths usually goes through increased switching frequencies and/or reduced ratio of switching frequency to converter bandwidth. However, these may lead to lower converter efficiency and increased distortion, making the design of EAs a challenging task. This paper addresses the analysis and design of the output filter for Buck converters operating as EA. The output filter must provide enough attenuation at the switching frequency and harmonics to guarantee a desired level of distortion while enabling tracking of wide-bandwidth envelope signals with high converter efficiency. This paper focuses on the use of high-order filters (up to sixth-order Bessel-Thomson, Butterworth, and Legendre-Papoulis filters) in a buck dc/dc converter working as an EA. The filters are analytically described and characterized, and a design procedure that takes into account the major design constraints is proposed, allowing the selection of the appropriate filter for a given application. The proposed analysis and design method are supported by simulation results, as well as by experiments obtained using a 1 MHz buck converter operating as an EA. [ABSTRACT FROM AUTHOR]

This paper presents a new control strategy for power factor correctors (PFCs) used to drive high-brightness light-emitting diodes (HB-LEDs). This control strategy is extremely simple and is based on the use of standard peak-current-mode integrated controllers (PCMICs), reducing its cost and complexity in comparison to traditional PFC controllers. In fact, this method is an alternative implementation of the one-cycle control to PFCs belonging to the flyback family of converters, without introducing high complexity for reducing the total harmonic distortion. In this case, the use of a simple exponential compensation ramp instead of a linear one is the proposed solution for drawing a sinusoidal input current. Moreover, the line current is cycle-by-cycle controlled, and therefore, the input-current feedback loop is extremely fast, which allows the use of this type of control with high-frequency lines. The proposed idea is to apply this simple control to a one-stage PFC in order to design a low-cost ac–dc HB-LED driver. However, the application of this control strategy to PFC belonging to the flyback family of converters is not obvious. Design-oriented considerations about its implementation in PCMIC will be provided. Finally, an experimental prototype of this driver was developed. [ABSTRACT FROM PUBLISHER]

This paper revisits the notion of free configuration space and reviews some of its path-connectivity-related properties. The literature on motion planning reveals at least three different definitions for the free configuration space of a robot in the presence of obstacles. This paper shows that, assuming regularity of both object and obstacles, those three definitions are equivalent. We show that the three definitions regularize the free space and therefore prevent the existence of “thin bits,” or low-dimensional strata. The paper concludes by discussing a series of properties regarding the existence and smoothability of contact-free paths between pairs of configurations. [ABSTRACT FROM AUTHOR]

This paper presents the introduction of problem-based learning (PBL) in a power electronics course at the University of Oviedo, Gijón, Spain, by means of two practical projects: the design and construction of a switching-mode power supply (SMPS) prototype and the static study of a dc–dc converter topology. The goal of this innovation was for students to apply in practice the knowledge they had acquired in theory classes. PBL is known to be a motivating, problem-centered teaching method that brings the real professional world closer to the student. The instructors thus considered PBL to be the most suitable methodology to obtain the desired results. The underlying methodology, task planning, and assessment of these projects will be presented. Furthermore, the influence of the introduction of PBL in practical sessions versus the traditional teaching method will be discussed. Finally, the instructors' reflections and conclusions regarding the application of PBL in this course from 2007–2009 will be presented. [ABSTRACT FROM PUBLISHER]

The static design of ac/dc and dc/dc switching-mode power supplies (SMPS) relies on a simple but repetitive process. Although specific spreadsheets, available in various computer-aided design (CAD) programs, are widely used, they are difficult to use in educational applications. In this paper, a graphic tool programmed in MATLAB is presented, which allows students to apply and to reflect upon the knowledge acquired in theoretical classes. This tool has been successfully employed in the course “Sistemas Electrónicos de Alimentación” in the Telecommunications Engineering degree as part of a project in new education methods (University of Oviedo project PB-08–019). During practical sessions, the students used the tool to design a SMPS, achieving better learning results than was the case without the tool. In addition, the tool was successfully used to improve the students' theoretical knowledge of the subject. [ABSTRACT FROM AUTHOR]

An improved vector network analyzer (VNA) calibration approach is demonstrated that utilizes planar lumped short-open-load-thru standards and achieves accuracy comparable to thru-reflect-line (TRL) at high frequency, without the commonly occurring errors in TRL at low frequency. The approach relies on complex load and thru models for coplanar waveguide and microstrip standards that are not currently available in typical VNA firmware. It is shown that the RF performance changes due to variations in fabrication of load can be addressed by "calibrating" or adjusting the load model with the measured dc resistance for a particular load. Good results are shown for a wide range of substrates (GaAs, alumina, and FR-4) and frequencies to 110 GHz. [ABSTRACT FROM AUTHOR]