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We experimentally demonstrated high-speed logic operations of adiabatic quantum-flux-parametron (AQFP) gates through the use of quantum-flux-latches (QFLs). In QFL-based high-speed test circuits (QHTCs), the output data of the circuits under test (CUTs), which are driven by high-speed excitation currents, are stored in QFLs and are slowly read out using low-speed excitation currents. We designed and fabricated three types of QHTCs using QFLs with different circuit parameters, where the CUTs were buffer gates and and gates. We confirmed the correct operation of buffer gates and and gates at 1 GHz. The obtained bias margins of the 1 GHz excitation currents were more than \pm 30% for each QHTC, which is wide enough for high-speed logic operations of AQFP gates. [ABSTRACT FROM PUBLISHER]

We performed yield analysis of large-scale adiabatic-quantum-flux-parametron (AQFP) circuits using circuit simulations based on the Monte Carlo method assuming the distribution of the critical current of Josephson junctions. Based on the simulation results, we also made an analytical model for the circuit yield of large-scale AQFP circuits. The yield analysis indicates that AQFP integrated circuits containing 1 million gates can be realized when the interconnect inductance is about 40 pH and the normalized standard deviation of the critical current is less than 1%. [ABSTRACT FROM AUTHOR]