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Two-dimensional transition metal dichalcogenide (TMD) semiconductors have risen as an important material class for novel nanoelectronic applications. Molybdenum disulfide (MoS2) is the most representative TMD compound due to its superior stability and attractive properties for (opto-) electronic devices. However, the synthesis of single-crystalline and functional MoS2 across large-area substrates remains crucial for its successful integration in semiconductor industry platforms. Therefore, this work focuses on the study of MoS2 epitaxy via two well-established industry-compatible synthesis methods, promising for the large-area and single-crystalline integration of van der Waals (vdW) materials. These methods are molecular beam epitaxy (MBE) and metalorganic vapor phase epitaxy (MOVPE) and have studied MoS2 quasi-vdW heteroepitaxy on reconstructed sapphire substrates and MoS2 vdW homoepitaxy on exfoliated MoS2 flakes. By examining the MoS2 structural properties using diffraction and spectroscopy techniques, the epitaxial relation and crystal quality are assessed, which reveals insights into the prevalence of inter- and intragrain defects such as grain boundaries and sulfur vacancies. The MBE method yields superior epitaxial MoS2 registry on both sapphire and MoS2 surfaces as compared to MOVPE, although inferior defectivity arises from the typical lower MBE growth temperature and chalcogen partial pressure. Moreover, both synthesis methods generate high densities of twinned MoS2 grain boundaries, which hamper defect-free integration. As a result, this challenging integration might become an important bottleneck for industrial TMD-based applications with a low tolerance for material defects. [ABSTRACT FROM AUTHOR]

Here, we review the most recent developments in the field of 2-D electronics. We focus first on the synthesis of 2-D materials, discussing the different growth techniques currently available and assessing their strengths and weaknesses. Moreover, we describe a possible roadmap to enable CMOS compatible integration of 2-D materials. We then shift our attention to 2-D devices and circuits and review the state of the art. Among the plethora of device concepts, we look closely at 2-D tunnel FETs (TFETs) and negative-capacitance FETs (NC-FETs) for low-power applications. We also put a particular emphasis on doping-free polarity-controllable systems that use electrostatic doping to eliminate the need for physical or chemical doping. We conclude with an analysis of simulations of scaled devices and discuss the possibilities enabled at circuit level by 2-D electronics. [ABSTRACT FROM AUTHOR]

SnS2 and SnS are two-dimensional (2D) semiconductors with distinct properties, as they exhibit a different type of conduction. They are of interest for applications in nanoelectronics, optoelectronics and sensors. To enable these applications, the deposition of SnS2 and SnS layers with a well-controlled phase, crystallinity and thickness at the nanometer level is required on large-area substrates. Chemical vapor deposition (CVD) of SnS2 and SnS using SnCl4 and H2S has previously been reported to give micrometer level polycrystalline SnS2 and SnS layers, which were insulating due to the uncontrolled grain orientations. In this work, we investigate the formation mechanism and phase control of nanometer level 2D SnS2 and SnS by SnCl4/H2S CVD. Nanometer level and phase-pure 2D hexagonal SnS2 and orthorhombic SnS layers are obtained. The SnSx phase depends on both the temperature and the H2S/SnCl4 concentration ratio. Compared to the formation of the SnS2 phase, the formation of the SnS phase is favorable at higher temperature and, surprisingly, at a higher H2S/SnCl4 concentration ratio. This is explained by the catalytic decomposition of H2S by SnS2 with the formation of H2, where the as such generated H2 reduces SnS2 to SnS at temperatures equal to or higher than 350 °C. By adjusting the conditions of the CVD process, the product can be tuned to either n-type SnS2 or p-type SnS, as demonstrated by back-gated field effect transistors. [ABSTRACT FROM AUTHOR]

Large area MoS2 films with tunable physical-chemical properties are grown on dielectric substrates by annealing of ultrathin Mo layers in the presence of a sulfur-containing gaseous precursor. Different growth conditions are found to have a significant impact on material properties, including chemical composition, roughness, and grain sizes, thus shedding light on critical parameters that govern sulfurization processes for the synthesis of large area 2D transition metal dichalcogenides. Optimized growth conditions in combination with the use of single crystal sapphire substrates with atomically flat interface result in the formation of oriented MoS2 films with improved quality and electrical performance. On the basis of this versatile synthesis technique, an original double-step process is presented for the synthesis of WS2/MoS2 vertical heterostructures. Good uniformity of layers over large area has enabled first isolation of defects by electron spin resonance spectroscopy with densities correlated with mobility degradation and the first experimental characterization of the band alignment at the interfaces of MoS2, WS2, and their vertical stacks with the underlying SiO2 insulator. [ABSTRACT FROM AUTHOR]

2D transition metal dichalcogenide based van der Waals materials are promising candidates to realize tunnel field effect transistors (TFETs) with a steep subthreshold swing (SS) for low‐power applications. Their atomically flat, self‐passivated layers offer potentially defect free interlayer tunneling. There are still several issues that need to be addressed to experimentally achieve a steep SS, e.g., the Schottky contacts, impact of thick layers, and device architecture with respect to gate configuration. This paper resolves these challenges by experimentally demonstrating MoS2/MoTe2 TFETs and their electrical characteristics, in conjunction with ab initio simulations and surface Kelvin probe microscopy. The Schottky barrier's effect at the contact regions are isolated by fabricating individual buried gates below the contacts. Devices with different top and bottom gate configurations are produced to understand the impact of gate placement on the heterostructure characteristics. Quantum transport simulations are performed on MoS2/MoTe2 multilayer stack to evaluate the impact of multiple layers on TFET performance, effect of gate placement, and the mechanism behind indirect tunneling over the heterojunction region. This work highlights the influence of the Schottky contacts, multiple layers and the role of different gate configurations on the band‐to‐band tunneling phenomenon in 2D heterojunction TFETs. [ABSTRACT FROM AUTHOR]

Atomically thin two-dimensional (2D) materials belonging to transition metal dichalcogenides, due to their physical and electrical properties, are an exceptional vector for the exploration of next-generation semiconductor devices. Among them, due to the possibility of ambipolar conduction, tungsten diselenide (WSe 2 ) provides a platform for the efficient implementation of polarity-controllable transistors. These transistors use an additional gate, named polarity gate, that, due to the electrostatic doping of the Schottky junctions, provides a device-level dynamic control of their polarity, that is, n- or p-type. Here, we experimentally demonstrate a complete doping-free standard cell library realized on WSe 2 without the use of either chemical or physical doping. We show a functionally complete family of complementary logic gates (INV, NAND, NOR, 2-input XOR, 3-input XOR, and MAJ) and, due to the reconfigurable capabilities of the single devices, achieve the realization of highly expressive logic gates, such as exclusive-OR (XOR) and majority (MAJ), with fewer transistors than possible in conventional complementary metal-oxide-semiconductor logic. Our work shows a path to enable doping-free low-power electronics on 2D semiconductors, going beyond the concept of unipolar physically doped devices, while suggesting a road to achieve higher computational densities in two-dimensional electronics.

As scaling of conventional silicon-based electronics is reaching its ultimate limit, considerable effort has been devoted to find new materials and new device concepts that could ultimately outperform standard silicon transistors. In this perspective two-dimensional transition metal dichalcogenides, such as MoS2 and WSe2, have recently attracted considerable interest thanks to their electrical properties. Here, we report the first experimental demonstration of a doping-free, polarity-controllable device fabricated on few-layer WSe2. We show how modulation of the Schottky barriers at drain and source by a separate gate, named program gate, can enable the selection of the carriers injected in the channel, and achieved controllable polarity behaviour with ON/OFF current ratios >10(6) for both electrons and holes conduction. Polarity-controlled WSe2 transistors enable the design of compact logic gates, leading to higher computational densities in 2D-flatronics.