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The temperature-dependent thermal conductivities of a GaAs pseudomorphic high-electron mobility transistor’s (pHEMT) substrate and epilayer regions are extracted to develop a 3-D finite-element-method thermal model. The thermal characterization is based on electrical gate-metal-finger temperature measurements of a customized GaAs pHEMT test structure. Heat flow from an integrated thin-film resistor is shown to be sensitive to the device’s substrate thermal conductivity, while heat flow from the device’s channel is most significantly affected by the epilayer region thermal conductivity. These observations are used in the formulation of the thermal parameter extraction technique, which serves as a useful and convenient device modeling tool that can be integrated into an engineering design flow. Specific knowledge about the semiconductor material fabrication process, which may be unavailable to the design engineer, is not required for accurate thermal characterization; this is the overriding advantage of the technique presented. [ABSTRACT FROM PUBLISHER]

The thermal impact of device bias-state and structures (such as source connected field plates, gate-pitch, back-vias, and number of gate fingers) in AlGaN/GaN-on-Si high electron mobility transistors (HEMTs) are measured using gate metal resistance thermometry (GMRT). The technique characterizes the thermal response of device gate metallization to determine the gate-epilayer junction temperature (Tj) , which is directly influenced by the channel heat source due to its close proximity. It is found that low gate leakage levels in GaN HEMTs make them favorable candidates for GMRT. Bias-dependent self-heating, independent of power dissipation, is observed in the devices. Therefore, Tj of different device configurations are compared at constant bias state, as well as constant power density (3.75 W/mm) to improve accuracy. Tj reduction is observed at high drain bias due to the migration of the channel heat source toward the gate field plate edge. This provides independent experimental validation for a reported electrothermal model [7]. A 3-D thermal finite element method model is presented, which simulates measured Tj rise to within \sim6\% across a range of device configurations and operating conditions. This is ultimately made possible upon implementation of a thermal boundary resistance layer and extraction of its temperature response using GMRT data. [ABSTRACT FROM PUBLISHER]

Gate junction temperature is presented as the crucial parameter for modeling thermal degradation in GaAs device reliability studies, and sufficient for modeling the impact of temperature on device terminal characteristics. Gate metal resistance thermometry (GMRT) is applied to a GaAs pseudomorphic high-electron mobility transistor to measure its gate junction temperature. It is found that gate leakage current due to impact ionization can interfere with dc GMRT measurements. To the best of our knowledge, for the first time it is demonstrated that this can be largely avoided by instead applying an ac version of GMRT. However, the dynamic resistance of the gate leakage current path can interfere with ac GMRT. Measurements and thermal finite element method simulations of devices at constant power dissipation conclude that the bias dependence of the channel heat source profile affects the gate junction temperature. A parameter extraction technique is presented and used in device lifetime calculations to demonstrate MTTF variations of more than an order of magnitude (despite fixed power) due to bias-dependent self-heating. [ABSTRACT FROM AUTHOR]

Thermal-impedance models of single-finger and multifinger InGaP/GaAs heterojunction bipolar transistors (HBTs) are extracted from low-frequency S-parameters that are measured on wafer and at room-temperature, and from temperature-controlled dc measurements. Low-frequency S-parameters at room temperature are accurate for extracting thermal corner frequencies. However, the dc value of the thermal impedance depends on the emitter resistance and the dc current definitions of the HBT model; hence, they need to be extracted together from temperature-dependent dc measurements. The resulting thermal-impedance model explains the low-frequency dispersion well at varying bias conditions, and it is suitable for nonlinear circuit analysis. [ABSTRACT FROM AUTHOR]