Search

This paper presents recent results on CMOS integrated circuits for automotive radar sensor applications in the 77 GHz frequency band. It is well demonstrated that nano-scale CMOS technologies are the best solution for the implementation of low-cost and high-performance mm-wave radar sensors since they provide high integration level besides supporting high-speed digital processing. The present work is mainly focused on the RF front-end and summarizes the most stringent requirements of both short/medium- and long-range radar applications. After a brief introduction of the adopted technology, the paper addresses the critical building blocks of the receiver and transmitter chain while discussing crucial design aspects to meet the final performance. Specifically, effective circuit topologies are presented, which concern mixer, variable-gain amplifier, and filter for the receiver, as well as frequency doubler and power amplifier for the transmitter. Moreover, a voltage-controlled oscillator for a PLL efficiently covering the two radar bands is described. Finally, the circuit description is accompanied by experimental results of an integrated implementation in a 28 nm fully depleted silicon-on-insulator CMOS technology. [ABSTRACT FROM AUTHOR]

This paper presents a 77-GHz automotive radar receiver in a 28-nm fully depleted silicon-on-insulator CMOS technology. It exploits a mixer-first direct-conversion architecture to trade-off noise and linearity performance. The receiver is composed of a 77-GHz downconverter, a variable-gain amplifier, and a switched-capacitor low-pass filter. It adopts an effective and robust approach for leakage suppression due to the TX to RX crosstalk, which overcomes both gain and linearity limitations. The receiver draws an overall quiescent current as low as 27 mA from a 1-V supply voltage and provides an overall gain up to 75 dB with a noise figure of 8.2 dB. Despite the low supply voltage, an excellent blocker immunity of −9.5 dBm is achieved along with an output 1-dB compression point as high as −1.5 dBV. [ABSTRACT FROM AUTHOR]

This brief presents a variable-gain amplifier (VGA) for automotive radar applications integrated in a 28-nm fully depleted (FD) silicon-on-insulator (SOI) CMOS technology. The amplifier operates at a power supply as low as 1 V and guarantees 30-dB linear-in-dB gain variation with a 3-dB step. The back-gate of the MOS transistors has been exploited to implement a back-gate control-based offset cancelation loop, thus avoiding the use of inter-stage coupling capacitors that introduce frequency limitations due to parasitic capacitances. The VGA exhibits a bandwidth from 100 kHz to 20 MHz, which is compliant with typical frequency-modulated continuous wave (FMCW) radars. It also guarantees a 1-dB compression point (${P} _{\mathrm{ 1dB}}$) better than −36 dBm and an input-referred noise (IRN) of 12.5 nV/ $\surd $ Hz and 7 nV/ $\surd $ Hz at 1 MHz and 10 MHz, respectively, with a power consumption as low as 1.7 mW. [ABSTRACT FROM AUTHOR]

This brief presents a fully CMOS voltage reference based on a self-biased topology, which provides low current consumption while saving silicon area. Temperature compensation is achieved by means of a subthreshold triode-based Widlar current reference and a proper arrangement of an active load. The proposed voltage reference was fabricated in a standard 0.13- $\mu {\text{m}}$ CMOS technology and occupies a core area as low as 0.003 mm2. The circuit properly operates with a power supply ranging from 2.4 V to 1.1 V while providing a reference voltage of around 800 mV with an average temperature coefficient of 100 ppm/°C and an overall current consumption below 25 nA. This performance makes the proposed voltage reference very suitable for RF-powered applications. [ABSTRACT FROM AUTHOR]

This brief demonstrates a fully contactless wafer-level testing based on UHF radio identification (RFID) technology enriched by high-quality on-chip antenna. The antenna, which uses exactly the same tag IC area (i.e., 0.45 mm2), exploits a low-cost post-process consisting of a thick dielectric layer and a copper metal, thus significantly improving the quality factor with respect to a standard CMOS implementation. Contactless wafer-level testing of a tag array is performed by simultaneous inductive coupling with a customized near-field reader. With a 27-dBm standard UHF RFID reader, a reading range up to 2.5 mm is demonstrated at 865 MHz. Anti-collision algorithm and memorized x–y device coordinates allow IC identification on the wafer under test to be achieved. Thanks to its cost-effectiveness, the proposed approach can be easily extended to general purpose IC contactless testing. [ABSTRACT FROM AUTHOR]

This paper presents an RF-powered transceiver for wireless sensor network applications. The circuit is composed of an RF energy harvesting system, implemented by means of a threshold-compensated multistage rectifier, power management unit, and phase-locked loop (PLL)-based RF front end. Initially, the PLL in closed-loop condition locks the voltage-controlled oscillator (VCO) to a multiple of the RF input frequency and allows frequency-shift keying (FSK) data recovery. Then, the PLL feedback loop is opened and the VCO signal is used to generate the uplink carrier, thus enabling active transmission without requiring external quartz for frequency reference. This approach overcomes the reader self-jamming drawback that greatly limits the operating range of backscattering-based RF-powered devices. Moreover, uplink and downlink operations are performed by exploiting a single carrier frequency according to a half-duplex communication scheme, which results in a low-complexity and low-cost wireless solution. The circuit was fabricated in a 130-nm CMOS technology and operates with a minimum input power as low as −18.8 dBm. It supports the FSK and ASK demodulation and OOK data transmission in the industrial scientific and medical band at 915 MHz. [ABSTRACT FROM PUBLISHER]

This paper presents a 90-nm CMOS batteryless transceiver for RF-powered wireless sensor networks. The circuit is made up of a RF energy harvesting module that is implemented through a multi-stage rectifier, a power management unit, and a PLL-based RF front-end that enables TX carrier synthesis by exploiting the RF input signal as a reference frequency. This avoids the use of a local crystal oscillator, thus implementing a highly integrated low-cost wireless transceiver. An active narrowband transmission scheme is adopted with the aim of overcoming the reader self-jamming that limits the operating range of backscattering-based RF-powered devices. The circuit supports a 915-MHz FSK downlink and a 2.45-GHz OOK uplink, while achieving a data rate up to 5 Mbps. It operates with an RF input power as low as –17.1 dBm. [ABSTRACT FROM PUBLISHER]

This paper presents a flash frequency tuning technique for switched-capacitor-based, voltage-controlled oscillators operating at mm wave frequencies. The proposed strategy exploits a capacitor array and a small varactor for coarse and fine tuning, respectively, which are simultaneously operated thanks to a flash A/D-based control circuit. This avoids additional delay in the frequency calibration, thus enabling very fast-frequency locking operation. The VCO was fabricated in a 28 nm FD-SOI CMOS technology and provides an oscillation frequency around 39 GHz with an overall tuning range of 3.3 GHz. The circuit dissipates 8.4 mW from a power supply as low as 0.7 V, while occupying a silicon area of 210 µm × 150 µm. [ABSTRACT FROM AUTHOR]

A transformer-based voltage-controlled oscillator for a W-band frequency-modulated continuous-wave (FMCW) automotive radar application is presented. The design challenges imposed by the millimeter-wave frequency operation were faced through a circuit and layout co-design approach, supported by extensive electromagnetic simulations and accurate analysis of both the start-up condition and the tank quality factor. The oscillator was implemented in a 28-nm fully depleted silicon-on-insulator (SOI) complementary metal–oxide–semiconductor (CMOS) technology. It provided a 37 GHz oscillation frequency with a variation of around 4 GHz, thus achieving a tuning range of 11%. Moreover, a 77 GHz output signal was also delivered, which was extracted as a second harmonic from the input-pair common-mode node. The circuit exhibited low phase noises, whose average performances were −97 dBc/Hz and −121 dBc/Hz at 1 MHz and 10 MHz offset frequencies, respectively. It delivered a 77-GHz output power of −10.5 dBm and dissipated 26 mW with a 1 V power supply. The silicon area occupation was 300 × 135 µm. [ABSTRACT FROM AUTHOR]