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In this paper, a novel parallel-coupled quadrature LC oscillator (PC-QO) is presented that can automatically eliminate imbalances of output phase and amplitude resulting from mismatches in the LC tanks. The method of using unequal coupling factors in a parallel-coupled quadrature oscillator is the base of this design; canceling the phase and amplitude errors takes place by tuning the imbalanced coupling factor using tuneable tail currents. First, the proposed circuit senses the amplitude error and then adjusts the coupling factors according to the situation. We show that using the inversely proportional coupling factors can eliminate the phase and amplitude error simultaneously. In other words, this design uses the amplitude control loop to cancel the phase and amplitude error. The circuit has been simulated using TSMC 0.18 CMOS practical model to confirm the high accuracy of the analysis and capability of the canceling I / Q mismatch technique. The simulation results show that the phase noise of the proposed quadrature voltage controlled oscillator (QVCO) is −123.9 dBc/Hz at 1 MHz offset from 4.4 GHz operation frequency. The total power consumption of the QVCO is 3.4 mW. [ABSTRACT FROM AUTHOR]

Summary: In this article, an injection‐locked frequency divider (ILFD) is presented. By assuming the maximum phase of the tank current, we obtain a relation for the lock range. Besides, the effects of parasitic capacitors on the lock range have been probed. The analysis shows that the greater the phase difference between the tail current and injected signal, the phase of the tank current increases and, consequently, the lock range also increases. The accomplished simulations confirm the correct performance of the proposed design and the extracted relationships. The simulations have been CMOS technology and with a 0.9‐V supply voltage. The results show that the current consumption equals 3.7 mA and the power consumption equals 3.33 mW. The proposed ILFD lock range with phase shift technique with power input signal 0 dBm is equal to 5.1 GHz (3.6–8.7 GHz), and the relative percentage of the lock range is also 83%. [ABSTRACT FROM AUTHOR]