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A method for fault type discrimination and faulted phase identification using instantaneous local current measurements is proposed. Seven current components are obtained from the measured three-phase instantaneous currents through a transformation and band passed filtered to remove the fundamental components and high frequency content. Upon detecting a fault, nine fault discrimination indices are computed taking different ratios of the maximum rates of change of these filtered current components. The indices are used to (i) separate ground faults from the phase-to-phase and three-phase faults, (ii) discriminate phase-to-ground from phase-to-phase-to-ground faults, (iii) differentiate phase-to-phase faults from the three-phase faults, and (iv) identify the faulted phases. As the indices are ratios, decisions are less affected by the fault resistance. The algorithm was validated using a power system simulated in PSCAD/EMTDC. Extensive testing involving more than 10,000 fault scenarios showed that fault type and faulted phases can be successfully identified. The algorithm found some difficulty in identifying the phases involved in phase-to-phase-to-ground faults at certain fault inception angles, and one of the thresholds can be affected by the transposition scheme. [ABSTRACT FROM AUTHOR]

A simple and yet dependable technique for fault-type identification in HVDC transmission systems is presented in this paper. A set of indices is defined for pairs of rate of change of current measurements to identify the pole(s) involved in the fault to discriminate the ground faults from those involved with the dedicated metallic return conductor. The proposed fault discrimination method will identify the faulty pole within a 1-ms window, and therefore, it can be used to improve the sensitivity and reliability of DC fault protection. Furthermore, the knowledge—whether or not the dedicated return conductor is involved in the fault—is useful for determining the post-fault configuration of bipole grids. Considerable discrimination margins are observed during the rigorous evaluation of the technique for two-conductor and three-conductor HVDC systems under various fault scenarios, for both considerably long overhead transmission lines and cables. The indices can be computed using local current measurements made using low-bandwidth sensors. They are independent of the fault resistance, and therefore, settings can be found easily. [ABSTRACT FROM AUTHOR]

In this paper, clearing of DC faults in a hybrid multi-terminal HVDC transmission system consisting of line commutated converters (LCCs) and voltage source converters (VSCs) implemented using half-bridge modular multilevel converter (MMC) technology is investigated. While the hybrid HVDC system has several possible configurations, this paper focuses on two of them: 1) a half-bridge MMC-HVDC link piggy-backing on the transmission line of a LCC-HVDC link and 2) LCC-HVDC link tapped by half-bridge MMC inverters. The proposed dc fault recovery strategy employs a high rating series diode valve placed at each VSC inverter pole to block fault currents; AC circuit breakers to isolate the faulty VSC rectifier pole; and force retardation applied at LCC rectifier to extinguish the arc. Detailed simulations demonstrate fast fault recovery performance with the proposed fault recovery procedure. In the case where a single transmission line is shared by the LCC and VSC links, the VSC rectifier is subjected to considerably high current for a period of few hundreds of milliseconds, and the ac side voltage dips momentarily. During a single pole fault, interrupting power flow on the healthy pole of VSC rectifier may be necessary to maintain smooth operation. [ABSTRACT FROM AUTHOR]

A selective fault clearing scheme is proposed for a hybrid voltage source converter (VSC)-line commutated converter (LCC) multi-terminal high voltage direct current (HVdc) transmission structure in which two small capacity VSC stations tap into the main transmission line of a high capacity LCC-HVdc link. The use of dc circuit breakers (dc CBs) on the branches connecting to VSCs at the tapping points is explored to minimize the impact of tapping on the reliability of the main LCC link. This arrangement allows clearing of temporary faults on the main LCC line as usual by force retardation of the LCC rectifier. The faults on the branches connecting to VSC stations can be cleared by blocking insulated gate bipolar transistors (IGBTs) and opening ac circuit breakers (ac CB), without affecting the main line's performance. A local voltage and current measurement based fault discrimination scheme is developed to identify the faulted sections and pole(s), and trigger appropriate fault recovery functions. This fault discrimination scheme is capable of detecting and discriminating short circuits and high resistances faults in any branch well before 2 ms. For the test grid considered, 6 kA, 2 ms dc CBs can easily facilitate the intended fault clearing functions and maintain the power transfer through healthy pole during single-pole faults. [ABSTRACT FROM AUTHOR]