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Transistor mismatch data and analysis from poly/SiON and high-k/metal-gate (HKMG) bulk CMOS technologies are presented. It is found that the traditional mismatch figure of merit from the Pelgrom plot (AVT) continuously scales down as technology advances. Furthermore, the AVT values for both nFET and pFET in the HKMG technology are significantly reduced from poly/SiON technologies. By normalizing the mismatch data against electrical oxide thickness (TINV), threshold voltage (VTH), and effective work function, a direct comparison of the mismatch data from various technologies is made. The differences in nFET and pFET mismatch behaviors in both poly/SiON and HKMG technologies are discussed in detail. Correlation between transistor VTH mismatch and flicker noise variation is observed in both poly/SiON and HKMG technologies. Finally, it is quantitatively demonstrated that effective work function variation does not generate significant VTH variability in the present HKMG technology. [ABSTRACT FROM AUTHOR]

This letter presents a novel test structure to accurately extract the substrate network parameters for RF MOSFET modeling from two-port measurements. The test structure used in the common-gate configuration isolates the gate network to make the substrate network distinctly accessible to measurements. A methodology is developed to directly extract the substrate network from the measured data. The method is further verified and validated by the excellent match obtained between measured and simulated two-port parameters. [ABSTRACT FROM AUTHOR]