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Copyright of Electric Drive is the property of Electric Drive Editorial Office and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

The performance of operating systems like computers requires the proper functioning of the computer language interpreter. This interpreter follows various types of programming languages that make the performing of computer programming easy and effective. The application of the programming language of Java helps in processing multiple tasks at once. This research analyzes the novelty of Java-based data communication models in advanced computing services. This performance makes the saving of the resources used for the development of the programming language. All these development includes the performing of the multiple threads communication data processing. These multiple threads help distribute the single processed input in the multi-channel language processing, thus helping the work competition in time. It also reduces the cost of maintaining the programming languages reduced. Thus, the implementing cost of resources required for programming performance is reduced. Therefore, this implementation impacts the programmer to become more indented to use the language transformation process of Java. Moreover, it creates a more effective representation of the audio or visual content represented by a multi-tasking operating system. In this process of development in the language transformation of the operating system, the ability of the operating system for data processing improves. The systematic process of this language transformation helps in systematically transforming multiple programs at once. [ABSTRACT FROM AUTHOR]

Copyright of Journal of Computer Engineering & Applications is the property of Beijing Journal of Computer Engineering & Applications Journal Co Ltd. and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

Copyright of Computer Measurement & Control is the property of Magazine Agency of Computer Measurement & Control and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

Real-time messaging and opinion sharing in social media websites have made them valuable sources of different kinds of information. This source provides the opportunity for doing different kinds of analysis. Sentiment analysis as one of the most important of these analyses gains increasing interests. However, the research in this field is still facing challenges. The mainstream of the sentiment analysis research on social media websites and microblogs just exploits the textual content of the posts. This makes the analysis hard because microblog posts are short and noisy. However, they have lots of contexts which can be exploited for sentiment analysis. In order to use the context as an auxiliary source, some recent papers use reply/retweet to model the context of the target post. We claim that multiple sequential contexts can be used jointly in a unified model. In this article, we propose a context-aware multi-thread hierarchical long short-term memory (MHLSTM) that jointly models different kinds of contexts, such as tweep, hashtag and reply besides the content of the target post. Experimental evaluations on a real-world Twitter data set demonstrate that our proposed model can outperform some strong baseline models by 28.39% in terms of relative error reduction. [ABSTRACT FROM AUTHOR]

With the rapid development of general hardware technology, microcomputers with multi-core CPUs have been widely applied in commercial services and household usage in the last ten years. Multi-core chips could, theoretically, lead to much better performance and computational efficiency than single-core chips. But so far, they have not shown general advantages for users, other than for operating systems and some specialized software. It is not easy to transform traditional single-core-based algorithms into multi-core-, multi-thread-based algorithms that can greatly improve efficiency, because of difficulties in computation and scheduling of hardware kernels, and because some programming languages cannot support multi-core, multi-thread programming. Therefore, a kind of multi-core-, multi-thread-based fast algorithm was designed and coded with Delphi language for the medium- and large-scale traveling salesman problem instances from TSPLIB, which can fully speed up the searching process without loss of quality. Experimental results show that the algorithm proposed can, under the given hardware limitations, take full advantage of multi-core chips and effectively balance the conflict between increasing problem size and computational efficiency and thus acquire satisfactory solutions.

The role of the interconnect network, which connects computing nodes to each other, is important in highperformance computing (HPC) systems. In recent years, the peripheral component interconnect express (PCIe) has become a promising interface as an interconnection network for high-performance and cost-effective HPC systems having the features of non-transparent bridge (NTB) technologies. OpenSHMEM is a programming model for distributed shared memory that supports a partitioned global address space (PGAS). Currently, little work has been done to develop the OpenSHMEM library for PCIe-interconnected HPC systems. This paper introduces a prototype implementation of the OpenSHMEM library through a switchless interconnect network using PCIe NTB to provide a PGAS programming model. In particular, multi-interrupt, multi-thread-based data transfer over the OpenSHMEM shared memory model is applied at the implementation level to reduce the latency and increase the throughput of the switchless ring network system. The implemented OpenSHMEM programming model over the PCIe NTB switchless interconnection network provides a feasible, cost-effective HPC system with a PGAS programming model. [ABSTRACT FROM AUTHOR]

Summary: With the development of genome sequencing technology, the cost of genome sequencing is continuously reducing, while the efficiency is increasing. Therefore, the amount of genomic data has been increasing exponentially, making the transmission and storage of genomic data an enormous challenge. Although many excellent genome compression algorithms have been proposed, an efficient compression algorithm for large collections of FASTA genomes, especially can be used in the distributed system of cloud computing, is still lacking. This article proposes two optimization schemes based on HRCM compression method. One is MtHRCM adopting multi‐thread parallel technology. The other is HadoopHRCM adopting distributed computing parallel technology. Experiments show that the schemes recognizably improve the compression speed of HRCM. Moreover, BSC algorithm instead of PPMD algorithm is used in the new schemes, the compression ratio is improved by 20% compared with HRCM. In addition, our proposed methods also perform well in robustness and scalability. The Java source codes of MtHRCM and HadoopHRCM can be freely downloaded from https://github.com/haicy/MtHRCM and https://github.com/haicy/HadoopHRCM. [ABSTRACT FROM AUTHOR]

With the smooth upgrade of the access network, multiple tuning-time devices will coexist in the long-reach access network, and the subsequent problems of high round-trip time (RTT) and optical network unit (ONU) tuning delay need to be solved urgently. In this paper, a multi-thread multiple tuning-time devices coexistence (MT-MTDC) bandwidth allocation algorithm is proposed. This algorithm can solve the problems of high RTT and ONU tuning delay in virtual passive optical network (VPON) based on long-reach wavelength division multiplexing/time division multiplexing passive optical network (LR WDM/TDM PON). Firstly, Multi-threaded polling mechanism is introduced into multi-mode coexistence VPON. Next, the number of wavelengths and threads is selected adaptively to ensure high bandwidth utilization. Then, the mechanism of dynamically adjusting the thread window is proposed. The mechanism strengthens the collaboration ability between threads and solves the degradation problem of the multi-thread algorithm. Furthermore, the construction of tuning buffer and the setting of time flag effectively solve the problem of more frequent ONU tuning pressure and ONU transmission conflict caused by multi-threaded polling algorithm. Finally, by comparing with the multi-thread longest-first first-available (MT-LFFA) algorithm and the multi-tuning-time ONU scheduling (MOS) algorithm, the proposed algorithm demonstrates its effectiveness in terms of polling cycle time, average tuning delay, bandwidth utilization and average packet delay.

The Boolean satisfiability (SAT) problem is the key problem in computer theory and application. his paper proposes a parallel SAT solver based on incomplete algorithm on FPGA. The algorithm uses a multi-threaded strategy to reduce the waiting time of related components and improve the efficiency of the solver. In addition, different threads use data storage structures that share addresses and clause information to reduce the resource overhead of on-chip memory. When all data is stored in the FPGA, s on-chip memory, the solver can achieve the best performance. The experimental results show that, compared with the single-threaded solver, the solver proposed in this paper can achieve a speedup of more than 2 times. [ABSTRACT FROM AUTHOR]

Apriori is one technique of data mining association rules that aims to extract correlations between sets of items in the transaction database. The main problem with the Apriori algorithm is the process of scanning databases repeatedly to generate itemset candidates. This research examines the combination of pruning by using the trieapproach and multi-thread implementation in three algorithms to obtain frequent itemset. Trie is a data structure in the form of an ordered tree to store a set of strings where every node in the tree contains the same prefix. The use of a full combination trie (different from frequent pattern (FP) tree using links) allows the implementation of arrays and the hash calculation to achieve the addressing of itemset combination. In this research, the measure to get the address is called Hash-node calculation used to update support value. For these three alternatives, run time processing is analyzed based on the number of itemset combinations and transaction data at a certain minimum support value. The experimental results show that an algorithm thatexploits resource capabilities by applying multi-threadperforms almost seven times betterthanan algorithm implemented in single-thread in calculating hash-node. The fastest run time of the multi-thread approach is 43 minutes with 150-itemset combinations on 100,000 transaction data. [ABSTRACT FROM AUTHOR]

With the rapid development of general hardware technology, microcomputers with multi-core CPUs have been widely applied in commercial services and household usage in the last ten years. Multi-core chips could, theoretically, lead to much better performance and computational efficiency than single-core chips. But so far, they have not shown general advantages for users, other than for operating systems and some specialized software. It is not easy to transform traditional single-core-based algorithms into multi-core-, multi-thread-based algorithms that can greatly improve efficiency, because of difficulties in computation and scheduling of hardware kernels, and because some programming languages cannot support multi-core, multi-thread programming. Therefore, a kind of multi-core-, multi-thread-based fast algorithm was designed and coded with Delphi language for the medium- and large-scale traveling salesman problem instances from TSPLIB, which can fully speed up the searching process without loss of quality. Experimental results show that the algorithm proposed can, under the given hardware limitations, take full advantage of multi-core chips and effectively balance the conflict between increasing problem size and computational efficiency and thus acquire satisfactory solutions. [ABSTRACT FROM AUTHOR]

High accuracy and a real-time system are priorities in the development of a prosthetic hand. This study aimed to develop and evaluate a real-time embedded time-domain feature extraction and machine learning on a system on chip (SoC) Raspberry platform using a multi-thread algorithm to operate a prosthetic hand device. The contribution of this study is that the implementation of the multi-thread in the pattern recognition improves the accuracy and decreases the computation time in the SoC. In this study, ten healthy volunteers were involved. The EMG signal was collected by using two dry electrodes placed on the wrist flexor and wrist extensor muscles. To reduce the complexity, four time-domain features were applied to extract the EMG signal. Furthermore, these features were used as the input of the machine learning. The machine learning evaluated in this study were k-nearest neighbor (k-NN), Naive Bayes (NB), decision tree (DT), and support vector machine (SVM). In the SoC implementation, the data acquisition, feature extraction, machine learning, and motor control process were implemented using a multi-thread algorithm. After the evaluation, the result showed that the pairing of the MAV feature and machine learning DT resulted in higher accuracy among other combinations (98.41%) with a computation time of ~1 ms. The implementation of the multi-thread algorithm in the pattern recognition system resulted in significant impact on the time processing.

Currently, most monitor devices are developed based on foreign software and hardware. The core technology is controlled by others. So that this paper designs an monitor software which is applied on native software and hardware platform. By means of multi-database storage, the method of insert and query is optimized. A large number of parallel data is realized by using multi-threaded design. Using object-oriented program design method makes the data receiving layer, processing layer and display layer separated. Through testing by the actual environment, the carrying capacity, real-time and reliability of monitor is enhanced. At the same time, the software designed has good scalability and maintainability.

In this paper, we propose a method of analyzing the types and causes of concurrency bugs that can occur in multi-process/multi-thread environments by analyzing the information gathered in the execution environment. Our method reduces the false detection rate by employing a hooking technique that intercepts the software's execution at runtime and reduces the overhead that can occur in the original software due to defect detection methods using optimized data collection. We implemented the proposed method as a tool and demonstrated its effectiveness by applying it to weapon system software that previously had concurrency bugs. In addition, the proposed method's high performance was proven by applying it to software into which faults were injected and comparing the results with those obtained using other tools. [ABSTRACT FROM AUTHOR]

In the traditional video and image processing technology field, researchers often focus on the processing of the image content, especially the accuracy and the speed. However, the geographic information data carried by UAV video and image is often ignored, resulting in the image only containing the scene information and losing the geographic data information after the image processing is completed, so that the user cannot quickly obtain the geographic information of the target of interest from image processing results. In order to process the geographic information efficiently, an image mosaicking and verification algorithm for UAV image with geographic information regards geographic information data as multi-channel double floating-point matrix data, which can be calculated synchronously using matrix processing algorithms. Meanwhile, the accuracy and speed of a large number of image mosaicking tasks can be improved by using image-splicing algorithm based on grouping control with geographic information. The experimental results show that the proposed algorithm can effectively process the UAV image with geographic information, especially in image mosaicking. [ABSTRACT FROM AUTHOR]

Copyright of Experimental Technology & Management is the property of Experimental Technology & Management Editorial Office and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

The aesthetic appeal of s-shaped curves in art and landscape design may help explain the prevalence of single-thread meandering channels in river restoration projects where the channel planform is reconfigured. In some restoration projects, the channel planform follows repeating symmetrical bends. To see if freshwater scientists would draw a similar restored planform, we asked scientists to illustrate a restored channel and observed what patterns emerged from the drawings. Most scientists depicted single-thread meanders for the restored channel form with some drawings including large wood in the channel, multi-thread channel forms, and wildlife and human elements. We consider possible explanations for why respondents depicted idealized meanders. We also describe drawings that did not depict the ideal meander but showcased a diversity of channel forms and restored river scenes. While recognizing the role of aesthetics in river restoration, especially in urban settings, designs can be expanded to include disorderly planform designs with non-symmetrical single-thread meanders and multi-threaded channels with forms inspired by local ecology, geomorphology, and social values. [ABSTRACT FROM AUTHOR]

At present, finite element method (FEM) is still the mainstream tool in a range of complex science and engineering applications, including the analysis of structures, heat, fluid, and electromagnetics. However, FEM becomes computationally very intensive when the number of physics equations grows and the mesh is refined. In this paper, we investigated the parallel computing techniques in the nonlinear magnetostatic field solution of an axisymmetrical actuator with permanent magnet by proposing a generalized black-box transmission line method (BB-TLM). A novel black-box circuit model was built to represent complex FEM element data. By means of the transmission line model, each element is isolated and then a series of parallel procedures is considered during the solution stages. The magnetic field distribution and magnetic force of the studied actuator are calculated by the proposed method and the simulation results are compared with COMSOL. Compared with the conventional N-R method, the generalized BB-TLM algorithm greatly reduces the computation time. [ABSTRACT FROM AUTHOR]

This research presented how to use a multi-thread programming technique to improve the performance of a program written by Windows Presentation Foundation (WPF). The Computer Assisted Instruction (CAI) software, named GAME24, was selected to use as a case study. This study composed of two main parts. The first part was about design and modification of the program structure upon the Object Oriented Programing (OOP) approach. The second part was about coding the program using the multi-thread technique which the number of threads were based on the calculated Catalan number. The result showed that the multi-thread programming technique increased the performance of the program 44%-88% compared to the single-thread technique. In addition, it has been found that the number of cores in the CPU also increase the performance of multithreaded program proportionally.

Developing an efficient and robust lightweight graphic user interface (GUI) for industry process monitoring is always a challenging task. Current implementation methods for embedded GUI are with the matters of real-time processing and ergonomics performance. To address the issue, an embedded lightweight GUI component library design method based on quasar technology embedded (Qt/E) is proposed. First, an entity-relationship (E-R) model for the GUI library is developed to define the functional framework and data coupling relations. Second, a cross-compilation environment is constructed, and the Qt/E shared library files are tailored to satisfy the requirements of embedded target systems. Third, by using the signal-slot communication interfaces, a message mapping mechanism that does not require a call-back pointer is developed, and the context switching performance is improved. According to the multi-thread method, the parallel task processing capabilities for data collection, calculation, and display are enhanced, and the real-time performance and robustness are guaranteed. Finally, the human-computer interaction process is optimized by a scrolling page method, and the ergonomics performance is verified by the industrial psychology methods. Two numerical cases and five industrial experiments show that the proposed method can increase real-time read-write correction ratios by more than 26% and 29%, compared with Windows-CE-GUI and Android-GUI, respectively. The component library can be tailored to 900 KB and supports 12 hardware platforms. The average session switch time can be controlled within 0.6 s and six key indexes for ergonomics are verified by different industrial applications. [ABSTRACT FROM AUTHOR]

Massive trajectory data contains wealth useful information and knowledge. Spectral clustering, which has been shown to be effective in finding clusters, becomes an important clustering approaches in the trajectory data mining. However, the traditional spectral clustering lacks the temporal expansion on the algorithm and limited in its applicability to large-scale problems due to its high computational complexity. This paper presents a parallel spatiotemporal spectral clustering based on multiple acceleration solutions to make the algorithm more effective and efficient, the performance is proved due to the experiment carried out on the massive taxi trajectory dataset in Wuhan city, China. [ABSTRACT FROM AUTHOR]

Finite-element method (FEM) has been widely used in industrial applications for many years. With the increase of finite-element model complexity and the number of elements, computation burden has become a serious issue and requires more attention. In this paper, the transmission line method (TLM) is adopted to the solution of FEM-based nonlinear axisymmetric magnetostatic problem and an equivalent finite-element network’s circuit model is given. Several methods were investigated to speed up the computation, such as Newton preconditioners, simplification of nonlinear equation solution and parallel computation. Compared with traditional Newton FEM iteration, our results show that the proposed method has more obvious advantages on computational efficiency at the same calculation accuracy. The method is applicable and valuable in the characteristic analysis and design of the magnetic device with a cylindrical structure. [ABSTRACT FROM AUTHOR]

This paper proposed multi-thread latent-friendship recommendation algorithm based on community detection (MTFRCD) due to the low running speed of a method for latent-friendship recommendation based on community detection (FRCD). Firstly, MTFRCD figured out kernel sub-networks on network topological diagram by multi-thread technology. Secondly, it regarded kernel sub-networks as seed nodes，the algorithm detected every community structure on network topological diagram by multi-thread paralleling label propagation. At the end，it recommended latent-friendships in all communities. The experiment on artificial network shows MTFRCD maintains performance and elevates running speed notably comparing to traditional method FRCD. Therefore, MTFRCD can apply to the real social network(Scholat. com) to complete latent-friendship recommendation. According to recommendation assessment，MTFRCD is able to achieve a good recommendation. [ABSTRACT FROM AUTHOR]

For a decision table, it is firstly proved that the effective pair is equivalent to improved discernibility matrix to guarantee that the attribute reduction based on discernibility matrix can be calculated by effective pair. To get the attribute reduction more quickly, a parallel radix sort model is proposed. Then a simple decision table and effective pair are obtained. Taking the length of distinguishable or indistinguishable elements string among the effective pair as heuristic information, an attribute reduction algorithm based on parallel Logical OR is proposed. Finally, the examples and experiments are shown to verify the effectiveness and feasibility of the proposed algorithm. [ABSTRACT FROM AUTHOR]

Video synopsis is one of the popular research topics in the field of digital video and has broad application prospects. Current research of it focuses on the methods of generating video synopsis or studying to utilize optimization algorithms such as fuzzy theory, minimum sparse reconstruction, and genetic algorithm to optimize its computing steps. This paper mainly studies the object-based video synopsis technology in distributed environment. We propose an effective video synopsis algorithm and a distributed processing model to accelerate the computing speed of video synopsis. The algorithm is proposed for studies of surveillance videos, which focuses on several key algorithmic steps, for instance, initialization of original video resources, background modeling, moving object detecting, and nonlinear rearrangement. These steps can be performed in parallel. In order to obtain good video synopsis effect and fast computing speed, some optimization methods are applied to these steps. With the aim of employing much more computing resources, we propose a distributed processing model, which splits the original video file into multiple segments and distributes them to different computing nodes to improve the computing performance by leveraging the multi-core and multi-thread capabilities of CPU. Experimental results show that the proposed distributed model can significantly improve the computing speed of video synopsis. [ABSTRACT FROM AUTHOR]

In this paper, we present a sparse memory allocation data structure for sequential and parallel data mining. We explored three algorithms utilizing the proposed data structure: MASP-tree, apriori-TID, and FP-growth. We modified the data structure of apriori-TID and FP-growth algorithms to reduce memory allocation cost. Five data sets are used for comparison. The results show that the modified apriori-TID has a higher speed-up than the modified FP-growth when the proposed data structure is used. A maximum speed-up of 3.42 is observed when MASP algorithm is tested. [ABSTRACT FROM AUTHOR]

To cope with extremely large-scale logistic optimization for strategic planning and real time operational optimizations as well, in this paper, we have proposed an extended algorithm of our hybrid method so that it becomes available for parallel computing. We have also developed a novel algorithm of particle swarm optimization (PSO) associated with binary decision variables. It is quite effective for finding the optimum opening distribution centers in three-echelon logistic network by parallel computing. Eventually, we have implemented the procedure in the parallel algorithm deployed as a multi-population based approach using multi-thread programming technique. Taking two topologies belonging to a coarse grain parallelism, we compared their effects on the performance of the algorithm through large scale logistics optimization. Finally, we confirmed that the proposed method can bring about high performance for the parallel computing that is suitable for the present goal and circumstance through numerical experiments.

Several dynamic bandwidth allocation (DBA) algorithms have been proposed for long-reach passive optical networks (LR-PONs). The gains in the current protocols, however, are incremental and limited to a specific range of loads. Using an analytical framework, we first examine the main sources of performance degradation specific to LR-PONs. From this, we conclude that there is a large scope for improvement in the performance by using an optimal cycle length, which is not influenced by reach, and which polls users according to their reported load while providing opportunities for pre-granting bandwidth at the optical network units. The fraction of bandwidth that is pre-granted should be decreased with load. To tailor these optimal design concepts in a DBA algorithm, we propose Synergized-Adaptive Multi-GATE polling with Void-filling (S-AMGAV), which reduces both the delay bound and packet loss rate by at least 50% when compared to the state-of-the-art DBAs like interleaved polling with adaptive cycle time (IPACT), IPACT with grant estimation (IPACT-GE), multi-thread polling (MTP), double phase polling (DPP), gate driven (GD), and AMGAV. S-AMGAV also maintains simplicity of the protocol while removing bandwidth inefficiencies prevailing in the existing protocols. We verify the usefulness of the algorithm through both analytical modeling and simulations. [ABSTRACT FROM PUBLISHER]

Due to next-generation sequencing (NGS) technology, genome sequencing is able to process much more data at low cost. In NGS data analysis, the mapping of sequences into a reference genome takes the largest amount of time to process. Although the Burrows-Wheeler Aligner (BWA) tool is one of the most widely used open-source software tools to align read sequences, it is still limited in that it does not fully support multi-thread mechanisms during the alignment steps. In this paper, we propose a BWA-MT tool, evolved from BWA but supporting multi-thread computation, designed to fully utilize the underlying multi-core architecture of computing resources. By using multi-thread computation, BWA-MT can significantly shorten the time needed to generate an alignment for single-end read sequences. Meanwhile, it generates an identical Sequence Alignment Map (SAM) result file as BWA. To evaluate BWA-MT, we use an evaluation system equipped with twelve cores and 32 GB memory. As a workload, we used the hg19 human genome reference sequence and various numbers of read sequences from 1M to 40M. In our evaluation, BWA-MT displays up to 3.7 times faster performance and generates an identical SAM result file to BWA. Although the increased speed might be dependent on computing resources, we confirm that BWA-MT is highly efficient and effective. [ABSTRACT FROM AUTHOR]

To solve the problem that the AVS video decoding scheme in present digital television monitoring system was rigid which caused difficulty in change and upgrading and so on, the AVS video C ++ class player was designed based on FFMpeg codec library and DirectX platform. The design adopted the multi-thread database queue technology to share data, and synchronized to the audio play clock by controlling the video playback speed to ensure the smooth play of audio and video. The test result showed that the video player was supporting most media fomiats, less dependent and easy to expand,and it had a certain market prospects. [ABSTRACT FROM AUTHOR]

As a new generation video coding standard, High Efficiency Video Coding (HEVC) achieves higher compression efficiency, but also requires a large amount of calculation. The parallel HEVC encoding algorithm is important to improve the encoding speed, therefore the design of parallel coding algorithm suitable for multi-core processors is of great significance to meet the requirements of High Density (HD) video real-time transmission and large-scale sharing. In this paper, a parallel entropy-coding framework based on Syntax-level grouping and multi-thread processing is presented. Firstly, the coding messages of a Coding Tree Unit(CTU) in HEVC are grouped according to the syntax elements; secondly, the parallel encoder based on Syntax-level is built according to the correlation between the data blocks; finally, frame-level parallel coding in HEVC is achieved by combining with the multi-threaded calculation. Experimental results show that the encoding speed of the proposed solution is 65% ~70% faster than that of the traditional serial architecture, meanwhile the video quality doesn't lose much. [ABSTRACT FROM AUTHOR]

A self-supervised multilayer perceptron online learning algorithm was proposed to improve the adaptability and real-time performance for unmanned ground vehicle unstructured road recognition. The road recognition results were used to update the training data set characteristic vector, and an evaluation function was created to trigger classifier retraining, as a result, the current classifier can recognize the road surface efficiently. Also, in the algorithm the processing operations such as the road surface image data sampling, classifier training, training data set updating and classifier recognition were calculated in their own threading. The structure can take advantage of faster classification calculation character of multilayer perceptron, and overcome its problem of time consuming training process. The real vehicle road recognition tests show that the proposed algorithm has a better adaptability and can meet the real-time requirements of unmanned ground vehicle unstructured road navigation. [ABSTRACT FROM AUTHOR]

The use of multi-core processors will become a trend in safety critical systems. For safe execution of multithreaded code, automatic code generation from formal specification is a desirable method. Signal, a synchronous language dedicated for the functional description of safety critical systems, provides soundness semantics for deterministic concurrency. Although sequential code generation of Signal has been implemented in Polychrony compiler, deterministic multi-threaded code generation strategy is still far from mature. Moreover, existing code generation methods use certain multi-thread library, which limits the cross platform executions. OpenMP is an application program interface (API) standard for parallel programming, supported by several mainstream compilers from different platforms. This paper presents a methodology translating Signal program to OpenMP-based multi-threaded C code. First, the intermediate representation of the core syntax of Signal using synchronous guarded actions is defined. Then, according to the compositional semantics of Signal equations, the Signal program is synthesized to dependency graph (DG). After parallel tasks are extracted from dependency graph, the Signal program can be finally translated into OpenMP-based C code which can be executed on multiple platforms. [ABSTRACT FROM AUTHOR]

Data deduplication, as a compression method, has been widely used in most backup systems to improve bandwidth and space efficiency. As data exploded to be backed up, two main challenges in data deduplication are the CPU-intensive chunking and hashing works and the I/O intensive disk-index access latency. However, CPU-intensive works have been vastly parallelized and speeded up by multi-core and many-core processors; the I/O latency is likely becoming the bottleneck in data deduplication. To alleviate the challenge of I/O latency in multi-core systems, multi-threaded deduplication (Multi-Dedup) architecture was proposed. The main idea of Multi-Dedup was using parallel deduplication threads to hide the I/O latency. A prefix based concurrent index was designed to maintain the internal consistency of the deduplication index with low synchronization overhead. On the other hand, a collisionless cache array was also designed to preserve locality and similarity within the parallel threads. In various real-world datasets experiments, Multi-Dedup achieves 3-5 times performance improvements incorporating with locality-based ChunkStash and local-similarity based SiLo methods. In addition, Multi-Dedup has dramatically decreased the synchronization overhead and achieves 1.5-2 times performance improvements comparing to traditional lock-based synchronization methods. [ABSTRACT FROM AUTHOR]

Abstract: Multi-threading in Java enhances computational performance and facilitates the development of parallel software. To obtain high performance on multi-core systems, this study develops a multi-threaded simulation code using Java for the chemical reacting flow of ethanol. Three ethanol reaction models were implemented in this code to investigate the effects of multi-threaded processing on three multi-core CPUs. The computational load for the chemical reaction significantly increases with the number of chemical equations and high temperature portion of the domain. To enhance parallel performance, the domain in which the chemical reaction occurs is appropriately decomposed at each time step, resulting in improved parallel performance. [Copyright &y& Elsevier]

ABSTRACT Restoration approaches such as dam removal and channel reconstruction have moved beyond the realm of small streams and are being applied to larger rivers. This development has substantial economic and ecological implications but may test gaps in our understanding of larger river systems and of restoration science. We examine how information about historical ranges of geomorphic variability can inform stream restoration in the context of the Clark Fork River, Montana, focusing on a study reach where one of the largest restoration projects to date was implemented, upstream of the recently removed Milltown Dam. Analysis of historical sources and aerial photographs of the Clark Fork River's pre-mining, mining, and more recent history suggest that a wandering channel pattern has persisted despite variations in sediment supply and transport capacity. Predictive metrics for channel pattern also suggest a wandering pattern, transitional between braided and meandering, in this geomorphic setting. These analyses suggest that the creation of a single-thread meandering channel, which incorporates structures to limit erosion and channel movement, is inconsistent with the historical range of variability in this reach. The perils of restoring channels to a condition different than the historical range of variability for their geomorphic setting were illustrated on the Clark Fork by flood-induced avulsions of the restored channel that occurred soon after project construction. Application of an experimental approach to restoration, founded on the method of multiple working hypotheses, provides a means for embracing uncertainty, can maximize the potential for site-specific restoration success, and can foster advances in restoration science. Copyright © 2012 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]

Abstract: The one-to-multiple file transfer problem has not been solved under the Linux system. In this paper, we take socket programming to accomplish Client/Server model based file transfer system and develop efficient software which not only support multiple clients and files transferring simultaneously, but also support transmission resuming from breakpoint. Our research focuses on solving the multi-thread concurrency, transmission resuming from breakpoint, thread pool, buffer queue and other aspects of problem. Our work is the basic foundation of FTP servers, file transfer software in local area network and large-scale examination system, etc. [Copyright &y& Elsevier]

Abstract: In this paper, we achieve the alarm receiving software and discuss programming ideas of the multi-threaded asynchronous receiver about SOCKET and picture field technology of DataGridView in the process of development. [Copyright &y& Elsevier]

We present a new algorithm for implementing a multi-word compare-and-swap functionality supporting the Read and CASN operations. The algorithm is wait-free under reasonable assumptions on execution history and benefits from new techniques to resolve conflicts between operations by using greedy helping and grabbing. Although the deterministic scheme for enabling grabbing somewhat sacrifices fairness, the effects are insignificant in practice. Moreover, unlike most of the previous results, the CASN operation does not require the list of addresses to be sorted before the operation is invoked, and the Read operation can read the current value without applying helping when the word to be read is within an ongoing transaction. Experiments using micro-benchmarks varying important parameters in three dimensions have been performed on two multiprocessor platforms. The results show similar performance as the lock-free algorithm by Harris et al. for most scenarios, and significantly better performance on scenarios with very high contention. This is altogether extraordinary good performance considering that the new algorithm is wait-free. [ABSTRACT FROM AUTHOR]

To achieve the production information management of the coning, drawing and twisting's workshop, and promote a good and fast development of the textile enterprise, firstly, we analyze the information technology development status of the textile enterprise at home and abroad, study the weaknesses of the existing computer monitoring system, introduce the system design project, and propose a system network model based on client/server (C/S) mode. Secondly, a multi-agent production monitoring and control system is developed, and the communication of the single-port-multi-protocol and a multi-thread data collection technology are studied via the multi-thread and standard template library (STL) technologies. Thirdly, the system management functions, the structure design of the database, and the technical difficulties in the process of software design are also introduced. As proved in practice, the system satisfies the production management requirements of the workshop, and implements the network management of the production information. [ABSTRACT FROM AUTHOR]

Recently GPUs have acquired the ability to perform fast general purpose computation by running thousands of threads concurrently. This paper presents a new algorithm for dense matrix-vector multiplication on the NVIDIA CUDA architecture. The experiments are conducted on a PC with GeForce 8800GTX and 2.0 GHz Intel Xeon E5335 CPU. The results show that the proposed algorithm runs a maximum of 11.19 times faster than NVIDIA's BLAS library CUBLAS 1.1 on the GPU and 35.15 times faster than the Intel Math Kernel Library 9.1 on a single core x86 with SSE3 SIMD instructions. The performance of Jacobi's iterative method for solving linear equations, which includes the data transfer time between CPU and GPU, shows that the proposed algorithm is practical for real applications. [ABSTRACT FROM AUTHOR]

Abstract: We present a practical lock-free shared data structure that efficiently implements the operations of a concurrent deque as well as a general doubly linked list. The implementation supports parallelism for disjoint accesses and uses atomic primitives which are available in modern computer systems. Previously known lock-free algorithms of doubly linked lists are either based on non-available atomic synchronization primitives, only implement a subset of the functionality, or are not designed for disjoint accesses. Our algorithm only requires single-word compare-and-swap atomic primitives, supports fully dynamic list sizes, and allows traversal also through deleted nodes and thus avoids unnecessary operation retries. We have performed an empirical study of our new algorithm on two different multiprocessor platforms. Results of the experiments performed under high contention show that the performance of our implementation scales linearly with increasing number of processors. Considering deque implementations and systems with low concurrency, the algorithm by Michael shows the best performance. However, as our algorithm is designed for disjoint accesses, it performs significantly better on systems with high concurrency and non-uniform memory architecture. [Copyright &y& Elsevier]

Abstract: This paper presents an approach that integrates a legacy component into a software system for storm sewer simulation. The legacy component employed here is the Storm Water Management Model (SWMM). The Extended Transport (EXTRAN) block of the SWMM that applies the finite difference method (FDM) with explicit numerical schemes, solving the de Saint-Venant equations, is used to route the storm sewer flow. A storm sewer simulation system, named S4, that integrates SWMM-EXTRAN and implements a visualization model, has been developed to demonstrate the proposed approach. The approach makes use of the multi-thread technology to alternate the execution between SWMM-EXTRAN for flow simulation on one thread and the program controller that updates simulation state variables and displays the computed temporal water-stages at the junctions on the other thread at every time step of the FDM process. Two test examples are used to verify and demonstrate the feasibility of the proposed approach. The results show that the multi-thread technology is applied successfully for integrating legacy components, such as SWMM-EXTRAN, into a software system (in this case, S4). In addition, the proposed approach is generally applicable for integrating legacy models or components developed using FDM with explicit numerical schemes. [Copyright &y& Elsevier]

In a previous paper, we developed an algebraic theory about threads and multi-threading based on the assumption that a deterministic interleaving strategy determines how threads are interleaved. The theory includes interleaving operators for a number of plausible deterministic interleaving strategies. The interleaving of different threads constitutes a multi-thread. Several multi-threads may exist concurrently on a single host in a network, several host behaviors may exist concurrently in a single network on the internet, etc. In the current paper, we assume that the above-mentioned kind of interleaving is also present at these other levels. We extend the theory developed so far with features to cover the multi-level case. We use the resulting theory to develop a simplified formal representation schema of systems that consist of several multi-threaded programs on various hosts in different networks. We also investigate the connections of the resulting theory with the algebraic theory of processes known as ACP. [ABSTRACT FROM AUTHOR]

Abstract: We report on the development of a computational framework for the parallel, mesh-adaptive solution of systems of hyperbolic conservation laws like the time-dependent Euler equations in compressible gas dynamics or Magneto-Hydrodynamics (MHD) and similar models in plasma physics. Local mesh refinement is realized by the recursive bisection of grid blocks along each spatial dimension, implemented numerical schemes include standard finite-differences as well as shock-capturing central schemes, both in connection with Runge–Kutta type integrators. Parallel execution is achieved through a configurable hybrid of POSIX-multi-threading and MPI distribution with dynamic load balancing. One-, two- and three-dimensional test computations for the Euler equations have been carried out and show good parallel scaling behavior. The Racoon framework is currently used to study the formation of singularities in plasmas and fluids. [Copyright &y& Elsevier]

Abstract: We present an efficient and practical lock-free implementation of a concurrent priority queue that is suitable for both fully concurrent (large multi-processor) systems as well as pre-emptive (multi-process) systems. Many algorithms for concurrent priority queues are based on mutual exclusion. However, mutual exclusion causes blocking which has several drawbacks and degrades the overall performance of the system. Non-blocking algorithms avoid blocking, and several implementations have been proposed. Previously known non-blocking algorithms of priority queues did not perform well in practice because of their complexity, and they are often based on non-available atomic synchronization primitives. Our algorithm is based on the randomized sequential list structure called Skiplist, and a real-time extension of our algorithm is also described. In our performance evaluation we compare our algorithm with a well-representable set of earlier known implementations of priority queues. The experimental results clearly show that our lock-free implementation outperforms the other lock-based implementations in practical scenarios for 3 threads and more, both on fully concurrent as well as on pre-emptive systems. [Copyright &y& Elsevier]

Presently, the trend is to increase the number of cores per chip. This growth is appreciated in Multi-Processor System-On-Chips (MPSoC), composed of more cores in heterogeneous and homogeneous architectures in recent years. Thus, the difficulty of verification of this type of system has been great. The hardware/software co-simulation Virtual Platforms (VP) are presented as a perfect solution to address this complexity, allowing verification by simulation/emulation of software and hardware in the same environment. Some works parallelized the software emulator to reduce the verification times. An example of this parallelization is the QEMU (Quick EMUlator) tool. However, there is no solution to synchronize QEMU with the hardware simulator in this new parallel mode. This work analyzes the current software emulators and presents a new method to allow an external synchronization of QEMU in its parallelized mode. Timing details of the cores are taken into account. In addition, performance analysis of the software emulator with the new synchronization mechanism is presented, using: (1) a boot Linux for MPSoC Zynq-7000 (dual-core ARM Cortex-A9) (Xilinx, San Jose, CA, USA); (2) an FPGA-Linux co-simulation of a power grid monitoring system that is subsequently implemented in an industrial application. The results show that the novel synchronization mechanism does not add any appreciable computational load and enables parallelized-QEMU in hardware/software co-simulation virtual platforms. [ABSTRACT FROM AUTHOR]

Summary: FDK algorithm is a popular analytical reconstruction method for practical cone‐beam CT scanners. Compared with iterative methods, the FDK algorithm is computationally efficient. However, the reconstruction speed remains a limitation for its application when dealing with high resolution images. In this paper, we propose a fast method for parallel implementation of the FDK algorithm by the use of multi‐GPU. First, we optimize the backprojection operation of FDK according to the property of geometric symmetry and the correlation between adjacent slices. Then, we utilize the multi‐thread technology to realize the parallel implementation of the optimized FDK algorithm on multi‐GPU. Finally, we implement the proposed method on a multi‐GPU platform. Numerical experiment shows that the proposed multi‐GPU‐based approach can reconstruct a 512 cubed volume in 1.9 seconds from 360 projections of resolution 512 ×512, which is 511 times faster than a traditional CPU–based approach and 5 times faster than a single GPU–based approach. In addition, the reconstruction results also indicate that the proposed method can maintain the same precision with traditional method. [ABSTRACT FROM AUTHOR]

Due to next-generation sequencing (NGS) technology, genome sequencing is able to process much more data at low cost. In NGS data analysis, the mapping of sequences into a reference genome takes the largest amount of time to process. Although the Burrows-Wheeler Aligner (BWA) tool is one of the most widely used open-source software tools to align read sequences, it is still limited in that it does not fully support multi-thread mechanisms during the alignment steps. In this paper, we propose a BWA-MT tool, evolved from BWA but supporting multi-thread computation, designed to fully utilize the underlying multi-core architecture of computing resources. By using multi-thread computation, BWA-MT can significantly shorten the time needed to generate an alignment for single-end read sequences. Meanwhile, it generates an identical Sequence Alignment Map (SAM) result file as BWA. To evaluate BWA-MT, we use an evaluation system equipped with twelve cores and 32 GB memory. As a workload, we used the hg19 human genome reference sequence and various numbers of read sequences from 1M to 40M. In our evaluation, BWA-MT displays up to 3.7 times faster performance and generates an identical SAM result file to BWA. Although the increased speed might be dependent on computing resources, we confirm that BWA-MT is highly efficient and effective.