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The demand for highly efficient and dynamic electric vehicles (EVs) has increased dramatically. The traction inverter, a pivotal component in an EV powertrain, plays a crucial role. This study is dedicated to designing a traction inverter with focus on achieving high efficiency and elevated power density and mitigating electromagnetic interference (EMI) issues. To realize these objectives, autonomous gate drivers (AGDs) are proposed and designed using LTspice simulation software. The aim is to achieve zero voltage switching (ZVS) at both turn-on and turn-off through the utilization of triangular current mode (TCM) control on the gate driver. The AGDs implement a current modulation scheme by sensing the current and voltage and generating gate-source voltage signals with minimal delays. The implemented current modulation scheme by the AGDs results in an efficiency exceeding 99% for a 10 kW power rating. The sinusoidal output waveforms not only contribute to extending the motor lifespan by mitigating sharp-edge voltages but also bring advantages such as reduced switch stress, decreased EMI, and simplified thermal management. [ABSTRACT FROM AUTHOR]

An increasing share of fluctuating and intermittent renewable energy sources can cause over-currents (OCs) in the power system. The heat generated during OCs increases the junction temperature of semiconductor devices and could even lead to thermal runaway if thermal limits are reached. In order to keep the junction temperature within the thermal limit of the semiconductor, the power module structure with heat-absorbing material below the chip is investigated through COMSOL Multiphysics simulations. The upper limits of the junction temperature for Silicon (Si) and Silicon Carbide (SiC) are assumed to be 175 and 250 ∘ C, respectively. The heat-absorbing materials considered for analysis are a copper block and a copper block with phase change materials (PCMs). Two times, three times, and four times of OCs would be discussed for durations of a few hundred milliseconds and seconds. This article also discusses the thermal performance of a copper block and a copper block with PCMs. PCMs used for Si and SiC are LM108 and Lithium, respectively. It is concluded that the copper block just below the semiconductor chip would enable OC capability in Si and SiC devices and would be more convenient to manufacture as compared to the copper block with PCM. [ABSTRACT FROM AUTHOR]

Inverter‐based generators (IBGs) are becoming popular in modern power systems. When the penetration of IBGs is increasing in power systems, new stability, protection, and monitoring challenges are introduced in the grid. Grid‐forming (GFM) control of converters is seen as a promising solution for future power grids to overcome particular stability challenges. Here, the technical challenges of the GFM‐based IBGs are reviewed from the point of view of TSOs and academic research. The properties of different GFM methods are studied for different GFM‐based IBGs for a single grid‐tied IBG and using the IEEE 9‐bus test system. Simulation results are provided by using the PSCAD‐EMT simulation software. [ABSTRACT FROM AUTHOR]

Wireless control of modular multilevel converter (MMC) submodules can benefit from different points of view, such as lower converter cost and shorter installation time. In return for the advantages, the stochastic performance of wireless communication networks necessitates an advanced converter control system immune to the losses and delays of the wirelessly transmitted data. This article proposes an advancement to the distributed control of MMCs to be utilized in wireless submodule control. Using the proposed method, the operation of the MMC continues smoothly and uninterruptedly during wireless communication errors. The previously proposed submodule wireless control concept relies on implementing the modulation and individual submodule-capacitor-voltage control in the submodules using the insertion indices transmitted from a central controller. This article takes the concept as a basis and introduces to synthesize the indices autonomously in the submodules during the communication errors. This new approach allows the MMC continue its operation when one, some, or all submodules suffer from communication errors for a limited time. The proposal is validated experimentally on a laboratory-scale MMC. [ABSTRACT FROM AUTHOR]

Recent advancements in the silicon carbide (SiC) power semiconductor technology offer improvements for high-power converters, where today silicon (Si) devices are still dominant. Bipolar SiC devices feature particularly good conduction capability while blocking high voltages. With expected advances in SiC material quality and processing technology, resulting in higher charge carrier lifetimes, methods for tailoring will be required. In this article, three differently optimized 10-kV SiC p-i-n diodes are compared regarding their switching and conduction performance in a 50-kHz LCC converter with a high output voltage. The converter topology features capacitively assisted switching, resulting in reduced switching losses for diodes with short reverse recovery tails. One diode group was subjected to a novel carrier lifetime tailoring method, involving simultaneous annihilation and generation of carbon vacancies. Another group was tailored via proton irradiation. Tradeoffs for the optimization of the diodes are highlighted. The analysis is supported by circuit simulations, device simulations, static measurements, switching waveform measurements, and calorimetric loss measurements. The results show a total rectifier loss reduction of 37%, compared to a state-of-the-art implementation with eight 1-kV Si diodes. The switching losses account for 3%–19% of the total losses, indicating a much higher possible operation frequency. [ABSTRACT FROM AUTHOR]

Recent developments in medium-voltage (MV) silicon and silicon carbide (SiC) power semiconductor devices are challenging state-of-the-art converter and auxiliary power supply (APS) designs. The APS is an important converter component, which energizes the gate-drive units and, therefore, has an influence on the overall reliability and efficiency of the converter system. There has, however, been comparably little research on how the APS of high-power converter submodules can be realized, in particular, for high-voltage applications. New, or improved, solutions may build on state-of-the-art topologies in the near future, but utilize MV SiC technology in the APS circuit itself to enable improved efficiency, reliability, simplicity, and compactness. Externally-fed APS concepts could provide several further advantages. Their various benefits on converter and system level may enable them to be a competitive solution for future APS concepts. Especially, light-based power supply systems are considered most useful since they offer extreme voltage isolation capability and immunity to electromagnetic interference. This article presents a review of the wide range of solutions for APSs, possible implementation options, and the most important design considerations. The different solutions are evaluated in a qualitative fashion, providing an overview of available APS concepts with regard to the requirements for high-power converter applications. [ABSTRACT FROM AUTHOR]

The voltage at the point of common coupling (PCC) in a weak network is very sensitive to load changes. A sudden change in active load will cause both a phase jump and a magnitude fluctuation in the bus voltage (voltage at the PCC), whereas reactive load changes mainly affect the voltage magnitude. With the addition of energy storage to a static synchronous compensator (StatCom), it is possible to compensate for the active power change as well as providing reactive power support. In this paper effective active power compensation schemes are proposed. Simulation and experimental results verify the compensation schemes by showing that a StatCom with energy storage can significantly reduce phase jumps and magnitude deviations of the bus voltage under load disturbances. Index Terms--Active power compensation, energy storage, phase jump, StatCom, voltage dip, voltage source converter (VSC), weak network.

Enhanced active resonant (EAR) dc circuit breakers (DCCBs) are a novel type of DCCB that use a discharge closing switch as interruption medium. A technical limitation of discharge closing switches is the minimum voltage across the main gap required for successful triggering. A novel commutation process creating the minimum voltage internally is proposed, which allows to simplify the EAR DCCB configuration and to reduce its component count. In the prototype, the discharge closing switch is implemented with a TVG. Experiments show that the TVG can be triggered reliably down to a voltage of 50  $\mathrm{V}$ and that the discharge in the TVG is highly oscillatory at low current. The originally proposed EAR DCCB configuration has to be tuned such that the commutation to the TVG succeeds at low current. Conversely, the novel commutation process decouples the minimum voltage from the current level by adjusting the triggering delay. This allows reliable commutation irrespective of the operating conditions. It is shown that the novel commutation process does not adversely affect dc interruption. Proactive commutation operation and auto-reclosing strategies are demonstrated. [ABSTRACT FROM AUTHOR]

Phase-modular buck–boost dc/ac inverters extend the voltage conversion range of conventional buck-type inverter topologies, and accordingly offer significant advantages for variable-speed motor drives powered from dc sources with wide-voltage-ranges like fuel cells or batteries. In this letter, two new modulation schemes are applied to the six-switch buck–boost Y-inverter (6YI) topology, with an analysis of the efficiency improvement for the proposed third harmonic injection pulsewidth modulation (TPWM) and discontinuous PWM (DPWM) schemes relative to conventional sinusoidal PWM (SPWM). Third harmonic injection PWM (TPWM) substantially reduces conduction losses and discontinuous PWM (DPWM) extends this gain by eliminating high-frequency switching for one-third of the fundamental period. These gains are validated on a 1 kW hardware demonstrator across a dc input voltage from 80 to 240 V, with DPWM reducing total converter losses by 31% over SPWM for a peak efficiency at nominal load of 95.6% with a power density of $62.3\ {\rm W/in^3}$. [ABSTRACT FROM AUTHOR]

DC grid has become an important application in power transmission. However, the exist works only have the method to obtain the droop coefficient in a radial topology. Also, this droop coefficient is for V-I droop control. There is no such like method to obtain the droop coefficient for the P-V droop control. This paper proposed a new method for a complex dc grid to obtain the droop coefficients. Firstly, based on the converter control strategies, the types of converter were classified. It will help to find out which kinds of converter can be participated into the dc-side voltage control. Secondly, a virtual node was defined, and the matrix of the dc grid was reshaped to fit the new added virtual node by using the proposed simplification method. An example was shown how this method worked. After that a new method of calculating the P-V droop coefficient was proposed. Finally, a simulation model was investigated to verify if the proposed method can operate in a real system. The results showed that the simplification method can ensure the mathematical relationships of the dc system. And simulations show good performances of the droop coefficient calculation method. [ABSTRACT FROM AUTHOR]

A transformer might be driven into saturation by faults in the connected system. In a transmission system with a Static synchronous Compensator and transformers connected at the point of common coupling, different modulation schemes utilized by the voltage source converter influence the transformer saturation in different ways. This paper compares the saturation effect during fault recovery when two alternative modulation schemes are utilized: voltage modulation and flux modulation. The comparison shows that utilization of flux modulation scheme tends to soften the saturation problem during fault recovery. However, this is achieved at a higher converter transient peak current. Index Terms--Converters, fault recovery, pulse width modulated power converters, StatCom, static synchronous compensator, transformer saturation, transformers, voltage source converter (VSC).

Previous results concerning instability of the dc link in inverter drives fed from a dc grid or via a rectifier are extended. It is shown that rectifier-inverter drives equipped with small (film) dc-link capacitors may need active stabilization. The impact of limited bandwidth and switching frequency in the inverter-motor current control loop is considered, and recommendations for selection of the dc-link capacitor, the switching frequency, and the dc-link stabilization control law in relation to each other are given. This control law is incorporated in a field-weakening (to enhance voltage sag ride-through) current controller for which design recommendations are presented. Index Terms--Active stabilization, field weakening, induction motor, variable-speed drive, voltage sag ride-through.

This article presents an online health monitoring scheme for dc capacitors in modular multilevel converters (MMCs). The health monitoring algorithm is based on detecting changes in the dc capacitance value over time. The proposed algorithm only utilizes measurements that are typically available in flexible alternating current transmission systems and high-voltage direct current applications. Hence, in the proposed estimation method, no additional sensors are used. The estimation scheme considers the presence of noise in voltage and current measurements, and utilizes a recursive least square estimator in conjunction with a special low-pass filter to minimize the estimation errors. Simulation results of a hardware replica, as well as experimental results on a low-power MMC prototype show that the proposed scheme can identify the dc-link capacitance value with a maximum error of 1%. [ABSTRACT FROM AUTHOR]

In this paper, the internal model control (IMC) method is applied to ac machine current control. Permanent magnet synchronous machines and induction machines are considered. The result is synchronous-frame proportional integral (PI) or PI-type controllers, the parameters (gain and integration time) of which are expressed directly in certain machine parameters and the desired closed-loop bandwidth. This simplifies the controller design procedure, eliminating or reducing the need for trial-and-error steps, and is the main purpose for using IMC. Index Terms - Current control, internal model control, inverterfed machines.

Recent advancements in silicon carbide (SiC) power semiconductor technology enable developments in the high-power sector, e.g., high-voltage-direct-current (HVdc) converters for transmission, where today silicon (Si) devices are state-of-the-art. New submodule (SM) topologies for modular multilevel converters offer benefits in combination with these new SiC semiconductors. This article reviews developments in both fields, SiC power semiconductor devices and SM topologies, and evaluates their combined performance in relation to core requirements for HVdc converters: grid code compliance, reliability, and cost. A detailed comparison of SM topologies regarding their structural properties, design and control complexity, voltage capability, losses, and fault handling is given. Alternatives to state-of-the-art SMs with Si insulated-gate bipolar transistors (IGBTs) are proposed, and several promising design approaches are discussed. Most advantages can be gained from three technology features. First, SM bipolar capability enables dc fault handling and reduced the energy storage requirements. Second, SM topologies with parallel conduction paths in combination with SiC metal–oxide–semiconductor field-effect transistors offer reduced losses. Third, a higher SM voltage enabled by a higher blocking voltage of SiC devices results in a reduced converter complexity. For the latter, ultrahigh-voltage bipolar devices, such as SiC IGBTs and SiC gate turn-off thyristors, are envisioned. [ABSTRACT FROM AUTHOR]

Wireless control of modular multilevel converter (MMC) submodules offers several potential benefits to exploit, such as decreased converter costs and ease in converter installation. However, wireless control comes with several challenging engineering requirements. The control methods used with wired communication networks are not directly applicable to the wireless control due to the latency and reliability differences of wired and wireless networks. This article reviews the existing control architectures of MMCs and proposes a control and communication method for wireless submodule control. Also, a synchronization method for pulsewidth modulation carriers is proposed suitable for wireless control. The imperfections of wireless communication, such as higher latency and packet losses compared to wired communication, are analyzed for the operation of MMCs. The latency is fixed with a proper controller and wireless network design. The converter is rendered immune to the packet losses by decreasing the closed-loop control bandwidth. The functionality of the proposal is verified, for the first time, experimentally on a laboratory-scale MMC using a simple wireless network. It is shown that wireless control of MMC submodules with the proposed approach can perform comparably to the wired control. [ABSTRACT FROM AUTHOR]

Direct current circuit breakers (DCCBs) have become a large research topic and are considered one of the critical components for future DC grids. Proposed DCCB concepts may be grouped into hybrid DCCBs and active resonant DCCBs. In this work, the enhanced active resonant (EAR) DCCB family is introduced. EAR DCCBs combine elements of hybrid and active resonant DCCBs. The EAR DCCB family consists of one unidirectional and six bidirectional concepts. All concepts feature proactive commutation. The main characteristic of the EAR DCCBs is that discharge closing switches are used instead of semiconductors with turn-off capability. Relevant discharge closing switch technology is reviewed, a laboratory prototype is explained, and experimental results are presented to demonstrate the feasibility of the proposed DCCB concepts. [ABSTRACT FROM AUTHOR]

The performance of theoretical ultrahigh-voltage power semiconductor devices has been predicted by means of numerical simulations using the Sentaurus technology computer-aided design tool. A general silicon carbide punch-through insulated-gate bipolar transistor (IGBT) structure has been implemented with suitable physics-based models and parameters to reflect the device characteristics in a wide range of device blocking voltages from 20 to 50 kV. The models for 20 kV class IGBTs have been implicitly validated by means of published experimental results. Mixed-mode simulations were performed that predicted total switching energy loss densities of 335, 629, 906, and 999 mJ/cm2 for 20, 30, 40, and 50 kV class devices, respectively, at 25 °C, JC = 20 A/cm2, and an ambipolar carrier lifetime of 20 μs. While the IGBT on-state forward voltage drop reduces, the switching losses increase with higher charge-carrier lifetime for a given current density (e.g., 20 A/cm2). The large span of simulation results will be used as an input support to the design of future high-power converters. [ABSTRACT FROM AUTHOR]

Results are reported from a successful field test with a silicon carbide (SiC) metal‐oxide‐semiconductor field‐effect transistor (MOSFET) traction inverter. The train has been operated over a 3‐month period in the Stockholm metro system. Increased traction inverter power density has been achieved, with volume and weight reductions of 51% and 25%, respectively. Lower power losses permit the use of car motion cooling. A sound pressure level reduction of 9 dB(A) was measured in the field with the higher inverter switching frequency permitted by using SiC. Complementing tests have been performed in the laboratory to compare thermal performance of silicon and SiC in the same power semiconductor housing. Propulsion system power losses are reduced by 19% with SiC. Acoustic noise reductions while increasing switching frequency are also reported. [ABSTRACT FROM AUTHOR]

The temperature evolution during a short-circuit (SC) fault in the dies of three different silicon carbide (SiC) 1200-V power devices is presented in this article. Transient electrothermal simulations are performed based on the reconstructed structure of commercially available devices. The simulations reveal the location of the hottest point in each device. The nonisothermal electrical analysis supports the necessity to turn-off SC events rapidly to protect the immunity of the device after a fault. The analysis also reveal differences in delay required to turn-off devices depending on their type. A thorough analysis of the temperature rise in the die of the SiC metal-oxide semiconductor field-effect transistors (MOSFET) device is also presented, where the maximum temperature with regards to different fault cases and circuit characteristics is presented. The impact of the gate resistance, circuit inductance, detection time, drain-source voltage, and gate-source voltage are considered. [ABSTRACT FROM AUTHOR]

This article studies a new hybrid converter that utilizes thyristors and full-bridge (FB) arms for achieving high-power capability with reduced semiconductor power rating compared to the FB modular multilevel converter. The study covers the theoretical analysis of the energy balancing, the dimensioning principles, the maximum power capability, and the limitations imposed by the discontinuous operation of the converter. Based on the analysis of these aspects, the theoretical analysis is concluded by identifying the operational constraints that need to be fulfilled for maximizing the power capability of the converter. It is concluded that the maximum power capability can be achieved for a certain range of modulation indices and is limited by both the commutation time of the thyristors and the power angle. Moreover, the P–Q capability of the hybrid converter is presented and discussed. Finally, simulation and experimental results that confirm the theoretical analysis and the feasibility of the studied converter are presented and discussed. [ABSTRACT FROM AUTHOR]

Future meshed high-voltage direct current grids require modular multilevel converters with extended functionality. One of the most interesting new submodule topologies is the semi-full-bridge because it enables efficient handling of dc-side short circuits while having reduced power losses compared to an implementation with full-bridge submodules. However, the semi-full-bridge submodule requires the parallel connection of capacitors during normal operation, which can cause a high redistribution current in case the voltages of the two submodule capacitors are not equal. The maximum voltage difference and resulting redistribution current have been studied analytically by means of simulations and in a full-scale standalone submodule laboratory setup. The most critical parameter is the capacitance mismatch between the two capacitors. The experimental results from the full-scale prototype show that the redistribution current peaks at 500 A if the voltage difference is 10 V before paralleling and increases to 2500 A if the difference is 40 V. However, neglecting very unlikely cases, the maximum voltage difference predicted by simulations is not higher than 20–30 V for the considered case. Among other measures, a balancing controller is proposed, which reduces the voltage difference safely if a certain maximum value is surpassed. The operating principle of the controller is described in detail and verified experimentally on a down-scaled submodule within a modular multilevel converter prototype. It can be concluded that excessively high redistribution currents can be prevented. Consequently, they are no obstacle for using the semi-full-bridge submodule in future HVdc converters. [ABSTRACT FROM AUTHOR]

Converter-grid interaction is of great interest in a weak-grid condition. This paper presents a single-input–single-output (SISO) open-loop transfer function for the stability analysis of grid-connected voltage-source converters. Differing from the conventional input impedance method and the eigenvalue analysis, an alternative multi-input–multi-output closed-loop system is developed in the paper and it eventually yields an SISO open-loop transfer function. This enables the application of a single Nyquist curve for analyzing the overall system stability. The model is validated against time-domain simulations as well as experimental results showing excellent accuracy for predicting the system stability. [ABSTRACT FROM AUTHOR]

The interest in permanent-magnet synchronous motors (PMSMs) is increasing in a wide area of applications. Since most PMSMs will operate without a shaft sensor in the future, valuable information for experimental determination of machine parameters will be lost. In this paper, therefore, a method is presented where the induced EMF and the d-axis reactance are determined in a no-load test and the q-axis reactance is determined in a load test. The load angle [Delta] is determined from the load test by means of a new analytical method. In this way, no separate measurement of the load angle is required. The method is especially suitable for line-start PMSMs which normally operate with negative d-axis current and, therefore, are not saturated in the d-axis flux paths. Moreover, the method is very simple to carry out for any laboratory technician, since the only tests that have to be made are standard tests which are made on standard induction motors on a regular basis. Index Terms--dq model, permanent-magnet machine, power factor, synchronous reactances.

A computationally efficient speed and position estimation algorithm, generally applicable to ac motor drives, is designed and analyzed. Applications include: a) sensorless permanent-magnet and reluctance synchronous motor drives using the fundamental excitation as information source; b) sensorless drives using saliency and signal injection; and c) sensored drives using resolvers. Particular attention is given case a). Low parameter sensitivity in the entire speed range (except at low speeds for the reluctance motor)--implying a small position estimation error--and good dynamic properties at nominal speeds are verified. Index Terms--Phase-locked loop, position estimation, resolver, sensorless control, speed estimation.

In this paper, a novel $dv/dt$ filter is presented targeted for 100-kW to 1-MW voltage source converters using silicon carbide (SiC) power devices. This concept uses the stray inductance between the power device and the converter output as a filter component in combination with an additional small RC-link. Hence, a lossy, bulky, and costly filter inductor is avoided and the resulting output $dv/dt$ is limited to 5–10 kV/$\mu$s independent of the output current and switching speed of the SiC devices. As a consequence, loads with $dv/dt$ constraints, e.g., motor drives can be fed from SiC devices enabling full utilization of their high switching speed. Moreover, a filter-model is proposed for the selection of filter component values for a certain $dv/dt$ requirement. Finally, results are shown using a 300-A 1700-V SiC metal–oxide–semiconductor field-effect transistor (mosfet). These results show that the converter output $dv/dt$ can be limited to 7.5 kV/ $\mu$s even though values up to 47 kV/ $\mu$s were measured across the SiC mosfet module. Hence, the total switching losses, including the filter losses, are verified to be three times lower compared to when the mosfet $dv/dt$ was slowed down by adjusting the gate driver. [ABSTRACT FROM AUTHOR]

In this paper, a new low-loss turn-on concept for the silicon insulated-gate bipolar transistor (Si-IGBT) in combination with silicon p-i-n diode is presented. The concept is tailored for two-level motor converters in the 100 kW to 1 MW range under the constraint that the output voltages slopes are limited in order to protect the motor windings. Moreover, analyses of the IGBT turn-on and diode reverse recovery voltage slopes are presented concluding that the diode reverse recovery is the worst case. The concept includes a low-cost measurement of the free-wheeling diode current and temperature by the gate driver without necessity of acquiring this information from the converter control board. By using this concept, the output dv/dt at the diode turn-off can be kept approximately constant regardless of the commutated current and junction temperature. Hence, the switching losses could be decreased for the currents and temperatures where the voltage slopes are lower when using a conventional gate driver optimized for the worst case. Moreover, results are shown for one such power semiconductor, showing a total switching loss reduction of up to 28% in comparison with a gate driver without current and temperature measurement. Finally, this concept is particularly suitable for high power semiconductor modules in half-bridge configuration which are recently proposed by several suppliers. [ABSTRACT FROM AUTHOR]

This paper presents an experimental methodology for the characterization of thermomechanical displacement and friction properties in a free-floating press-pack structure, and evaluation of the tensile stress on the semiconductor die through simulation of different mechanical and thermal loading conditions. The press-pack structure consists of a single silver-metallized (1 \mu \textm ) silicon carbide die ( 400~\mu \textm ) in contact with rhodium-coated (0.4 \mu \textm ) molybdenum square plates. The thermomechanical displacements in the press-pack structure have been obtained using the digital image correlation technique, and the mean random error has been ±0.1 \mu \textm , which is approximately 10 ppm of the measured length (10.5 mm). The developed experimental method has led to an analytical estimation of friction coefficients on the interfaces’ silicon carbide-molybdenum and molybdenum-copper. The results demonstrate that the thin silver layer behaves as a solid film lubricant. A 2-D finite-element model representing the experimental setup has been implemented. The difference in displacement between measurement and simulation is less than 8%. Furthermore, the coinfluence of the design parameters on the thermomechanical performance of the stacked structure has been analyzed through simulations. Finally, design guidelines to reduce the tensile stress on the silicon carbide die have been proposed regarding free-floating press-pack power electronics packaging. [ABSTRACT FROM PUBLISHER]

This work investigates sources of measurement errors that result for common mode/differential mode (CM/DM) separators in a practical measurement environment, with a particular focus on the recently presented input impedance criterion for CM/DM separators, derives the respective analytical expressions, and employs a detailed analytical model to verify the obtained findings. Furthermore, a method is derived, which determines the worst-case measurement error by reason of cross coupling for given measured DM and CM output voltage components. Based on an example, this work illustrates how the obtained expressions can be advantageously used in a computer program to automatically decide whether a particular spectral measurement component represents a useful measurement result or if it is strongly affected by cross coupling (CM to DM and DM to CM). Finally, the paper presents the realization and accompanying experimental results of an active CM/DM separator, which allows for low realization effort and features competitive separation capabilities (DMTR/CMRR > 50\; \textdB and CMTR/DMRR > 42\; \textdB for frequencies up to 10\; \textMHz ). [ABSTRACT FROM AUTHOR]

The stacked polyphase bridges (SPB) converter consists of several submodules that all are connected in series to a voltage source. The total dc-link voltage should split in a balanced way among the submodules. This does not always occur inherently. This paper presents an analysis of the capacitor voltage stability for the SPB converter. From the analysis, criteria for stability are derived and three alternatives of a suitable balancing controller are designed. The proposed controller alternatives and their associated stability properties are verified on an experimental setup and by simulation. [ABSTRACT FROM PUBLISHER]

An experimental analysis of the behavior under short-circuit conditions of three different silicon-carbide (SiC) 1200-V power devices is presented. It is found that all devices take up a substantial voltage, which is favorable for detection of short circuits. A transient thermal device simulation was performed to determine the temperature stress on the die during a short-circuit event, for the SiC MOSFET. It was found that, for reliability reasons, the short-circuit time should be limited to values well below Si IGBT tolerances. Guidelines toward a rugged design for short-circuit protection (SCP) are presented with an emphasis on improving the reliability and availability of the overall system. A SiC device driver with an integrated SCP is presented for each device-type, respectively, where a short-circuit detection is added to a conventional driver design in a simple way. The SCP driver was experimentally evaluated with a detection time of 180 ns. For all devices, short-circuit times well below 1 \upmu\texts were achieved. [ABSTRACT FROM AUTHOR]

A general platform is introduced to study the dynamics of power systems with high voltage dc (HVDC) transmission links. Small-signal stability, voltage stability, and interaction phenomena of power systems with both line-commutated-converter HVDC (LCC-HVDC) and voltage-source-converter HVDC (VSC-HVDC) are addressed using the proposed platform. In this platform, the entire power system is modeled as a multivariable feedback control system (FCS) which consists of three interconnected blocks. The contents as well as the inputs and outputs of the blocks are selected such that the conventional analysis tools for power system stability are applicable, both in the time and frequency domains. In the FCS model, the relationships between different instabilities are clear, and participant agents of each instability can be determined. The model is developed in a modular and hybrid style, to make it feasible for a large power system. The proposed model is validated against an electromagnetic transient simulation program (PSCAD) using time responses. [ABSTRACT FROM AUTHOR]

This paper presents the design process of a 312-kVA three-phase silicon carbide inverter using ten parallel-connected metal–oxide–semiconductor field-effect-transistor power modules in each phase leg. The design processes of the gate-drive circuits with short-circuit protection and power circuit layout are also presented. Measurements in order to evaluate the performance of the gate-drive circuits have been performed using a double-pulse setup. Moreover, electrical and thermal measurements in order to evaluate the transient performance and steady-state operation of the parallel-connected power modules are shown. Experimental results showing proper steady-state operation of the power converter are also presented. Taking into account measured data, an efficiency of approximately 99.3% at the rated power has been measured for the inverter. [ABSTRACT FROM PUBLISHER]

The feasibility of future multiterminal dc (MTDC) systems depends largely on the capability to withstand dc-side faults. Simulation models of MTDC systems play a very important role in investigating these faults. For such studies, the test system needs to be accurate and computationally efficient. This paper proposes a detailed equivalent model of the modular multilevel converter (MMC), which is used to develop the MTDC test system. The proposed model is capable of representing the blocked-mode operation of the MMC, and can be used to study the balancing control of the capacitor voltages. In addition, the operation of the MMC when redundant submodules are included in the arms can also be studied. A simplified model of a hybrid high-voltage dc breaker is also developed. Hence, the developed test system is capable of accurately describing the behavior of the MMC-based MTDC system employing hybrid HVDC breakers, during fault conditions. Using time-domain simulations, permanent dc-side faults are studied in the MTDC system. In addition, a scheme to control the fault current through the MMC using thyristors on the ac side of the converter is proposed. [ABSTRACT FROM AUTHOR]

In modular multilevel converters, there is a tradeoff between the switching frequency and the voltage ripple in the submodule capacitors. The reason for this is that it becomes increasingly difficult to balance the capacitor voltages when the switching frequency is reduced. This paper presents a new submodule circuit, which improves the balancing of the capacitor voltages at low switching frequencies. The proposed submodule circuit consists of two capacitors and eight switches, forming a three-level submodule. Ideally, the voltage and current ratings of the switches can be chosen such that the combined power rating of the semiconductors is the same as for the equivalent solution with conventional halfbridge submodules. The proposed submodule circuit provides the possibility of connecting the two capacitors in parallel when the intermediate voltage level is used. This will reduce the capacitor voltage ripple, especially at low switching frequencies, and thus, allow for a reduction of the size, weight, and cost of the submodule capacitors. The proposed submodule circuit is validated by both simulations and experimental results. It is found that the parallel connection of the submodule capacitors will, in fact, significantly improve the balancing of the capacitor voltages. [ABSTRACT FROM AUTHOR]

This paper discusses the $\Delta$-networks and other circuits designed to separate the conducted electromagnetic interference (EMI) into its common mode (CM) and differential mode (DM) components. The input impedances of CM/DM separators must be 50 $\Omega$ resistive in the measurement frequency range, and they must be independent of the values of the noise signals and noise source impedances. The conditions for achieving such input impedances are derived. It is shown that many of the proposed separators, including the $\Delta$-network suggested in the International Special Committee on Radio Interference (CISPR) 16-1-2 standard, do not fulfill the input impedance requirement. This leads to unreliable CM and DM measurements and, consequently, to the oversizing of EMI filters and design by trial and error. [ABSTRACT FROM AUTHOR]

A high-voltage tapped-inductor buck converter utilizing a novel autonomous high-voltage valve is presented in this paper. Its application as auxiliary power supply for high-power cascaded-converter submodules is discussed, followed by a presentation of the most challenging problems in designing a low-power high-voltage step-down converter. The TI-buck converter topology is analyzed, which together with the novel autonomous high-voltage valve overcomes most of the problems. Analytical expressions describing the operation as well as circuit simulations are presented. Finally, an experimental evaluation of a 3-kV 70-W prototype converter utilizing the proposed autonomous high-voltage valve with series-connected super-junction MOSFETs is presented. [ABSTRACT FROM PUBLISHER]

Many publications have been presented on the modulation and control of the modular multilevel converter, some of which are based on phase-shifted carrier modulation. This paper presents an analysis of how the switching frequency affects the capacitor voltages, circulating currents, and alternating voltages using phase-shifted carrier modulation. It is found that switching frequencies that are integer multiples of the fundamental frequency should be avoided as they can cause the capacitor voltages to diverge. Suitable switching frequencies are derived for which the arm and line quantities will be periodic with symmetric operating conditions in the upper and lower arms. Thus, the practical outcome of this paper is a detailed description of how the switching frequency should be chosen in order to achieve advantageous operating conditions. The theoretical results from the analysis are validated by both simulations and experimental results. [ABSTRACT FROM AUTHOR]

Variable-speed drives have reduced voltage requirements when operating below the base speed. In a modular-multilevel-converter-based (M2C-based) motor drive, it is then possible to operate with reduced voltage in the submodule capacitors, than at the base speed. In this sense, a greater capacitor-voltage ripple can be accommodated, without exceeding the maximum peak-capacitor voltage. This paper presents an analytical investigation for the optimal selection of the average capacitor voltage for M2Cs, when the motor is operating with rated torque, below the base speed. This method does not require any power exchange between the converter arms, so it keeps the conduction losses at the minimum level. Additionally, the method decreases the switching losses, due to the decreased capacitor-voltage level. The overall ratings of the converter remain the same as in the base-speed operation. It is shown that this method can be applied at a speed range between the base speed and down to approximately one third of it, i.e., an operating range that covers the requirements for typical pump- and fan-type applications. The results obtained from the analytical investigation are experimentally verified on a down-scaled laboratory prototype M2C. [ABSTRACT FROM AUTHOR]

The balancing of the capacitor voltages in modular multilevel converters becomes increasingly difficult when the switching frequency is reduced. Typically, a reduced switching frequency will increase the spread in the capacitor voltages and, thus, the voltage ripple in the individual submodules. This paper presents a capacitor voltage balancing strategy which aims to combine a low switching frequency with a low capacitor-voltage ripple. This is done by a predictive algorithm that controls the converter in such a way that the stored charge in the submodule capacitors is evenly distributed among all the submodules when the capacitor voltages reach their maximum values. In this way, it is possible to limit the peak voltages in the submodule capacitors at switching frequencies as low as 2-3 times the fundamental switching frequency. The proposed capacitor voltage balancing strategy is validated by both simulations and experimental results with 130-Hz and 140-Hz switching frequency. In the simulations, the capacitor voltage ripple was reduced by 24% compared to the case when a conventional sorting algorithm is used, and the experimental results show that it is possible to combine the proposed voltage balancing strategy with a circulating-current controller. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (M2Cs) are increasingly used in high-voltage direct current (HVDC) systems. The efficiency of M2Cs is influenced by the modulation and cell selecting methods, which determines the switching frequency and capacitor voltage ripple in the converter station. A new approach to modulation of the M2C is presented in this paper. Tolerance band methods are employed to obtain the switching instants, and also cell selection. The proposed methods overcome the modulation problem for converters with few cells on one hand and also reduce the sorting efforts for cell balancing purposes of many cells converter on the other hand. Three different algorithms are also proposed to balance the cell capacitor voltages. The evaluation is done in time-domain simulation by which the performance of each method is studied in both the steady-state and transient cases. It is observed that using tolerance band methods not only reduces the switching frequency but also allows for handling severe fault cases in a grid-connected system. Eventually, the most promising tolerance band method has been implemented and verified in a real-time digital simulator, RTDS®. The average switching frequency of 70 Hz has been achieved for the system under study, while the capacitor voltage ripple is limited to 10% of the nominal cell voltage. [ABSTRACT FROM AUTHOR]

In this paper, previously developed stability results for open-loop sum-capacitor-voltage control of modular multilevel converters are extended. To give improved damping, circulating-current feedback is included in the control law. With the output-current control loop and a first-order measurement lag taken into account, global asymptotic stability is proven. Careful consideration of the on-line sum-capacitor-voltage reference computation is given, since this is the most critical part of the control system. [ABSTRACT FROM AUTHOR]

A circuit solution to the normally-ON property of the normally-ON silicon carbide junction field-effect transistor, namely the self-powered gate driver, has been recently proposed. This letter sheds some light on the design process of the self-powered gate driver concept as well as limitations from the system perspective. It is experimentally shown that the parameters of the self-powered gate driver must be chosen taking into account a tradeoff between a fast response and stable operation of the driver. Moreover, the influence of the shoot-through current in the fast activation of the self-powered gate driver is also presented. [ABSTRACT FROM AUTHOR]

Soft-switching converters equipped with insulated gate bipolar transistors (IGBTs) in silicon (Si) have to be dimensioned with respect to additional losses due to the dynamic conduction losses originating from the conductivity modulation lag. Replacing the IGBTs with emerging silicon carbide (SiC) transistors could reduce not only the dynamic conduction losses but also other loss components of the IGBTs. In the present paper, therefore, several types of SiC transistors are compared to a state-of-the-art 1200-V Si IGBT. First, the conduction losses with sinusoidal current at a fixed amplitude (150 A) are investigated at different frequencies up to 200 kHz. It was found that the SiC transistors showed no signs of dynamic conduction losses in the studied frequency range. Second, the SiC transistors were compared to the Si IGBT in a realistic soft-switching converter test system. Using a calorimetric approach, it was found that all SiC transistors showed loss reductions of more than 50%. In some cases loss reductions of 65% were achieved even if the chip area of the SiC transistor was only 11% of that of the Si IGBT. It was concluded that by increasing the chip area to a third of the Si IGBT, the SiC vertical trench junction field-effect transistor could yield a loss reduction of approximately 90%. The reverse conduction capability of the channel of unipolar devices is also identified to be an important property for loss reductions. A majority of the new SiC devices are challenging from a gate/base driver point-of-view. This aspect must also be taken into consideration when making new designs of soft-switching converters using new SiC transistors. [ABSTRACT FROM AUTHOR]

This paper describes issues related to parallel connection of SiC bipolar junction transistors (BJTs) in discrete packages. The devices are applied in a high-frequency dc/dc boost converter where the switching losses significantly exceed the conduction losses. The design and construction of the converter is discussed with special emphasis on successful parallel-operation of the discrete BJTs. All considerations are experimentally illustrated by a 6-kW, 250-kHz boost converter (300 V/600 V). A special solution for the base-drive unit, based on the dual-source driver concept, is also shown in this paper. The performance of this driver and the current sharing of the BJTs are both presented. The power losses and thermal performance of the parallel-connected transistors have been determined experimentally for different powers and switching frequencies. An efficiency of 98.23% (±0.02%) was measured using a calorimetric setup, while the maximum temperature difference among the four devices is 12 °C. [ABSTRACT FROM AUTHOR]

The paper presents an inductor with reduced self-capacitance, designed and evaluated with fast-switching SiC transistors in dc-dc converters. A conventional inductor with the same core and number of turns was also build for comparison. The two inductors are tested experimentally on two different 2 kW, 100 kHz dc-dc converters with silicon carbide switches-one with a junction field-effect transistor (JFET) and the other with a bipolar junction transistor (BJT). Replacing the conventional inductor with the one that has lower self-capacitance improved the switching performance of the converter and reduced its electromagnetic emissions. Furthermore, the efficiency of the converter is improved-in the case of the JFET boost converter the power losses were reduced by 16% and by 20% in the case of BJT. [ABSTRACT FROM AUTHOR]

Operation of parallel-connected 4H-SiC vertical junction field effect transistors (VJFETs) from SemiSouth is modeled using numerical simulations and experimentally verified. The unbalanced current waveforms of parallel-connected VJFETs are investigated with respect to the spread in the critical parameters of the device structure and to the influence of the parasitic inductances in the measurement circuit. The device structures are reconstructed based on scanning electron microscopy (SEM) analysis, electrical characterization, and device simulations. The doping concentration and profile depth of a p-grid formed by angular implantation are studied as main contributors that influence the variation of the on-state characteristics, and the threshold voltage of the experimental devices. It has been shown elsewhere that similar differences in p-grid also lead to differences in gate-source breakdown voltage. The switching performance of the parallel-connected JFETs is measured using single and double gate drivers in a double-pulse test and compared with simulations. The switched current and voltage waveforms from measurements are reproduced in simulation by introducing the parasitics. From the analysis, it is found that reasonable differences in doping levels and profiles of the p-grid give rise to significant differences in device parameters. However, even with these parameter differences and circuit asymmetries, it is possible to successfully operate parallel-connected VJFETs of this type. [ABSTRACT FROM AUTHOR]

Silicon Carbide high-power modules populated with several parallel-connected junction field-effect transistors must be driven properly. Parasitic elements could act as drawbacks in order to achieve fast and oscillation-free switching performance, which are the main goals. These two requirements are related closely to the design of the gate-drive unit, and they must be kept under certain limits when high efficiencies are targeted. This paper deeply investigates several versions of gate-drive units and proposes a dual-function gate-drive unit which is able to switch the module with an acceptable speed without letting the current suffer from significant oscillations. It is experimentally shown that turn-on and turn-off switching times of approximately 130 and 185 ns respectively can be reached, while the magnitude of the current oscillations is kept at an adequate level. Moreover, using the proposed gate driver an efficiency of approximately 99.7% is expected for a three-phase converter rated at 125 kVA and having a switching frequency of 2 kHz. [ABSTRACT FROM AUTHOR]