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A high speed data system is designed and built to test digital devices running at 10 gigabits per second. The design and performance of the interface board and the performance of the complete system whose bit-error rate was found to be 1 X 10(super -7) are reported.

We fabricated a dc SQUID phase qubit with a sub-\mum Al/AlOx/\rm Al qubit junction and an interdigitated shunting capacitor on a sapphire substrate. The qubit junction had a critical current of 135 nA, and the isolation junction had a critical current of 8.3 \muA. The shunting capacitance was about 1.5 pF. To reduce the unwanted effects of two-level systems and increase the relaxation time T1, we have removed unnecessary dielectrics, used a small qubit junction area (450 nm \times 500 nm), isolated the qubit from the leads with an on-chip LC filter, and fabricated the device on a bare sapphire substrate. However, at a temperature of 20 mK, we found T1\approx 300\ ns and the coherence time T2\approx 110\ ns, which was much lower than one would expect from loss attributed to the leads and to dielectrics in the tunnel junction and substrate. Measurements of T1 versus applied flux (which tuned the qubit frequency) revealed a correlation between the strength of the coupling of the microwave excitation line to the qubit and the rate of energy dissipation in the qubit. This result suggests that the relaxation time was being limited by coupling to the microwave line. [ABSTRACT FROM AUTHOR]