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We investigated the growth per cycle (GPC) for SiO2 and HfO2 on n-GaN/native oxide and p-Si/SiO2 substrates by plasma-enhanced atomic layer deposition using tris(dimethylamino)silane and tetrakis(dimethylamino)hafnium precursors, respectively, and O2 plasma gases. On the basis of the estimated GPC, we also examined the characteristics of n-GaN/Hf0.57Si0.43Ox/Pt capacitors with an inserted interfacial layer (IL) such as subnanometer-thick HfO2 and SiO2. We found that the GPC for SiO2 on n-GaN/native oxide was slightly smaller than that on p-Si/SiO2, whereas the GPC for HfO2 was the same on both substrates. The GPC for ALD-SiO2 could be reasonably plotted on the basis of the relationship between the GPC and the difference in electronegativity between the metal and oxygen in the metal-O underlayers including native oxide (Ga2O3) on GaN. On the basis of the GPC on n-GaN, Hf0.57Si0.43Ox (23 nm) capacitors were fabricated without and with a HfO2-IL (0.3 and 0.5 nm) or SiO2-IL (0.3 and 0.6 nm). These capacitors exhibited similar leakage current properties and a high breakdown electric field greater than 8.3 MV cm−1. No frequency dispersion and a flatband voltage (Vfb) hysteresis smaller than 50 mV were observed for all of the capacitors. Compared with the SiO2-IL [Si-rich HfSiOx (Si: > 0.43)] capacitors, the HfO2-IL [Hf-rich HfSiOx (Hf: > 0.57)] capacitors showed a smaller interface state density [(1.2–1.7) × 1011 cm−2 eV−1 at −0.4 eV from the conduction band] and a smaller negative Vfb shift. Therefore, the Hf-rich HfSiOx (Hf: > 0.57) grown using a HfO2-IL at the n-GaN/HfSiOx interface plays a substantial role in improving the electrical properties of n-GaN/HfSiOx capacitors. [ABSTRACT FROM AUTHOR]

Hafnium silicate (HfSiOx) has been applied to AlGaN/GaN high-electron-mobility transistors (HEMTs) as a high κ gate dielectric. The (HfO2)/(SiO2) laminate structure was deposited on the AlGaN surface by a plasma-enhanced atomic layer deposition, followed by a post-deposition annealing at 800 °C. The HfSiOx-gate HEMT showed good transfer characteristics with a high transconductance expected from its κ value and a subthreshold swing of 71 mV/decade. For the metal–oxide-semiconductor (MOS) HEMT diode, we observed excellent capacitance–voltage (C–V) characteristics with negligible frequency dispersion. The detailed C–V analysis showed low state densities on the order of 1011 cm−2 eV−1 at the HfSiOx/AlGaN interface. In addition, excellent operation stability of the MOS HEMT was observed at high temperatures up to 150 °C. [ABSTRACT FROM AUTHOR]

A 16-element phased-array receiver has been developed for advanced W-band automotive radars. The phased-array receiver is based on a single SiGe chip with RF beamforming capabilities, which is packaged using low-cost bond-wire techniques and attached to a 16-element linear microstrip array. The antenna results in a directivity of 29.3 dB and a gain of 28.0 dB at 77–81 GHz, and can be scanned to \pm \50^\circ in the azimuth plane in \sim \ 1^\circ steps. The packaging details are presented together with the steps taken to ensure a wideband impedance match and low coupling between the phased-array channels. Gain measurements done at 79 GHz agree well with simulations. The 16-element phased array receiver was used with a 2-element frequency-modulated continuous-wave transmitter at 76.5–77 GHz and high-resolution millimeter-wave images were obtained. The work shows that complex millimeter-wave phased arrays can be packaged using traditional bond-wire techniques, and can be a powerful solution for advanced automotive radars. [ABSTRACT FROM AUTHOR]

This paper presents an isolated on-board vehicular battery charger that utilizes silicon carbide (SiC) power devices to achieve high density and high efficiency for application in electric vehicles (EVs) and plug-in hybrid EVs (PHEVs). The proposed level 2 charger has a two-stage architecture where the first stage is a bridgeless boost ac-dc converter and the second stage is a phase-shifted full-bridge isolated dc-dc converter. The operation of both topologies is presented and the specific advantages gained through the use of SiC power devices are discussed. The design of power stage components, the packaging of the multichip power module, and the system-level packaging is presented with a primary focus on system density and a secondary focus on system efficiency. In this work, a hardware prototype is developed and a peak system efficiency of 95% is measured while operating both power stages with a switching frequency of 200 kHz. A maximum output power of 6.1 kW results in a volumetric power density of 5.0 kW/L and a gravimetric power density of 3.8 kW/kg when considering the volume and mass of the system including a case. [ABSTRACT FROM AUTHOR]

e (for fabrication of advanced structures). Cu-Sn TLP bonding is employed herein because of its high remelting temperature and desirable thermal and electrical conductivities. The bonding starts with a stack of Cu-Sn-Cu metal layers that eventually transforms to Cu-Sn alloys. As the alloys have melting temperatures (Cu3Sn: > 600 ?C, Cu6Sn5: > 400 ?C) significantly higher than the process temperature, the process can be repeated without damaging previously bonded layers. A Cu-Sn TLP bonding process was developed using thin Sn metal sheets inserted between copper layers on silicon die and direct bonded copper substrates, emulating the process used to construct automotive power modules. Bond quality is characterized using (1) proof-of-concept fabrication, (2) material identification using scanning electron microscopy and energy-dispersive x-ray spectroscopy analysis, and (3) optical analysis using optical microscopy and scanning acoustic microscope. The feasibility of multiple-sided Cu-Sn TLP bonding is demonstrated by the absence of bondline damage in multiple test samples fabricated with double- or four-sided bonding using the TLP bonding process. [ABSTRACT FROM AUTHOR]