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Critical conduction mode boost power factor (PF) correction converter is widely used in low-to-medium power applications for its advantages of high PF, zero-current turn-on of the switch, and no reverse recovery in diode. Nevertheless, the switching frequency varies continually with the input voltage phase angle with traditional constant on-time control. This makes the electromagnetic interference (EMI) spectra display great differences and complicates the design of EMI filter. An optimal switching frequency variation range control strategy is proposed in this article. The optimal harmonics amounts for the lowest switching frequency variation range without and with a limited PF are both figured out. In addition, a lower output voltage ripple is obtained. A prototype has been built and tested in the lab to demonstrate the validity of the theoretical analysis. [ABSTRACT FROM AUTHOR]

The discontinuous conduction mode boost power factor correction converter features zero-current turn-on for the switch, no reverse recovery in diode, and constant frequency operation. With traditional constant duty ratio control, the power transfer in each switching cycle exhibits great difference during a half-line cycle. Consequently, the peak and root mean square values of the inductor current are large, the same goes for the switch and diode. This increases not only the current stress of the power components but also the conduction and switching turn-off loss, and lowers the efficiency of the converter. Introducing third and fifth harmonics into the input current and varying the duty cycle correspondingly can reduce the aforementioned power transfer difference, and provide huge space for the increment of boundary inductance as well. An optimum boundary inductance control concerning limited power factor (PF) is proposed in this paper. For the maximum boundary inductance of the converter within wide input voltage range, the optimum harmonics amounts are analyzed and figured out. The proposed method brings about efficiency improvement, output voltage ripple reduction, and PF increase as well, especially at high input voltages. A prototype has been built and the experimental results are presented to show the validity of the scheme. [ABSTRACT FROM AUTHOR]