Search

Energy harvesting (EH) technologies provide a promising solution for the self-power supply of wearable devices. However, it is challenging due to strict constraints of wearable systems in terms of size, weight, and cost. Additionally, a suitable method is required to transport the harvested energy from the environment or body to wearable devices. This letter proposes a cable-type packaging that embeds a converter into the connection wire to simultaneously regulate the voltage and transport the energy. A distributed inductor is implemented by winding the conductor in a helix around a flexible magnetic-sheet core to increase the inductance. This packaging method can aid the design of wearable EH systems and significantly reduce the size of the system. A prototype was fabricated based on the proposed packaging and compared with other two converters based on traditional packaging in terms of size, weight, and efficiency. The experimental results verify that the proposed packaging can reduce the system size by 75% and system weight by 35% under the same efficiency condition. [ABSTRACT FROM AUTHOR]

High-voltage and high-power dc–dc conversion is key to dc transmission, distribution, and generation, which requires compact and efficient dc transformers with large step ratios. This paper introduces a dc–dc converter with the input-series–output-parallel arrangement of multiple high step ratio subconverter units. Each subconverter unit is an isolated modular dc–dc converter with a stack of half-bridge cells chopping the dc down to low voltage level. The transformer provides galvanic isolation and additional step ratio. The converter achieves a large step ratio due to the combination of the series-parallel configuration, the modular cells, and the isolation transformer. The proposed dc–dc converter is analyzed in a 30 kV–1 kV, 1-MW application to discuss the operation performance, tradeoffs, power efficiency, and selection of components. Finally, the converter is validated through a laboratory downscaled prototype. [ABSTRACT FROM AUTHOR]

Commercially available normally-off GaN power high-electron-mobility transistor (HEMT) devices have typically adopted a p-GaN gate structure. In the gate region, there exist a Schottky junction (between gate electrode and the p-GaN layer) and a p-GaN/AlGaN/GaN heterojunction. As the p-GaN layer is not directly shorted to the gate electrode and conducting channel, it can be considered as electrically “floating.” With drain voltage changing during a switching process, the variation of net charge in the floating p-GaN layer would cause instability in threshold voltage. Besides, because of the distinctive features of the p-GaN gate HEMT structure under certain gate/drain bias, gate-related junction capacitances would exhibit behavior different from those of a Si mosfet. Consequently, the switching transient performance of a GaN transistor with a p-GaN gate could be significantly influenced by the aforementioned factors. In this work, the threshold voltage instability associated with the drain-to-gate voltage stress is first analyzed. Despite the difficulty in directly performing capacitance measurements inside the device structure, a hybrid physical-behavior modeling method is proposed. The model is capable of extracting the capacitance bias relationships with regard to the gate region from static terminal measurements. In previous works, the advanced analytical model would make modest change on a Si mosfet's model. As a result, without fully considering the specific features of a GaN transistor with the p-GaN gate, the simulated waveforms would exhibit 20–50% discrepancy from the experiment. In contrast, the proposed switching transient analytical approach would exhibit improved accuracy (<10% disparity). Consequently, the switching transient performance of the GaN transistor with the p-GaN gate could be more accurately evaluated. [ABSTRACT FROM AUTHOR]