Search

The characteristics of Schottky tunneling barrier diodes and corresponding MOSFET with atomic layer deposited TiO2/Al2O3 stacked gate oxides were investigated. The Schottky barrier height is lowered from Schottky tunneling barrier. For Schottky tunneling barrier MOSFET with TiO2/Al2O3 gate oxides, good drain current-voltage and sub-threshold characteristics were obtained. This enhancement mode MOSFET has fairly good gate control and low gate leakage. The drain current is 18 µA/µm at VDS = 3 V, VGS = 2 V. [ABSTRACT FROM AUTHOR]

The performance of the sequential digital circuit (Speed, Power consumption etc.) depends upon the performance of flip-flop used in the design. ASIC design flows use characterized data of flip-flops for final signoff. Therefore it΄s critical to know precisely the accuracy of characterized data with respect to the actual behavior of flip-flops on silicon. An on-chip flip-flop characterization circuit (FCC) has been presented here which gives the accurate estimation of various parameters of flip-flop such as CP-Q Delay, Setup time, Hold time and Power consumption. The system consists of a digital controller and characterization circuit which are based upon configurable oscillator which could be programmed to oscillate in different configurations or could be operated in functional mode for functional verification. The delay values are calculated by processing the value of time period of oscillator in different modes. The system was fabricated in 40nm CMOS technology and the flip-flop parameters are extracted from it. [ABSTRACT FROM AUTHOR]

Bridging defects are responsible for a large percentage of failures in CMOS technologies and their impact in nanometer technologies with highly dense interconnect structures is expected to increase. In this chapter, a survey of the key developments in modeling bridging defects and their implications in test and diagnosis are presented. An overview of the historical developments of these models from the ˵wired AND/OR″ and ˵voting″ models to more realistic proposals taking into consideration the resistance values of the bridge are presented. The logic detectability of bridging defects considering the resistance of the bridge assuring its detectability is explored. The concept of Analogue Detectability Interval (ADI) as well as its applicability to increase the quality of the vectors detecting these defect classes is introduced. Quality of electronic circuits and systems requires the availability of effective diagnosis techniques. The basic concepts of logic as well as current-based (IDDQ) diagnostic strategies are included in this chapter. [ABSTRACT FROM AUTHOR]

Open defects are responsible for a significant number of failures affecting present CMOS technologies. Furthermore, they are becoming more common as technologies are scaled down due to changes in materials and fabrication steps of ICs manufacturing processes. In this chapter, open defects are classified according to their location and resistive nature. The behavior of such defects affecting interconnect lines and logic gates is reviewed. Test strategies to improve the detectability of open defects and diagnosis methodologies are also presented. [ABSTRACT FROM AUTHOR]

This paper evaluates the clock generation quality of different digital circuits associated with clock generation and distribution. Circuit΄s noise response, jitter, and uncertainty are evaluated for different noise sources and loading conditions. We present performance simulations for inverters and inverter chains implemented in different technologies from AMS and UMC foundries. We show that the device size-scaling trend is increasing the uncertainty associated with this circuits, decreasing their precision. The correlation between circuit΄s parameters and selected performance metrics is also highlighted. [ABSTRACT FROM AUTHOR]

The aim of the subretinal implant is to restore visual perception in blind patients suffering from retinitis pigmentosa (RP) and - at a later stage - age-related macular degeneration (AMD). Electrical stimulation of the remaining retinal neurons can restore meaningful visual perceptions [1, 2]. Our retina implant, consisting of a light sensitive CMOS chip (1,500 pixels) and 16 separate direct stimulation electrodes, is presently being tested successfully in a clinical pilot study with 12 patients. A detailed analysis of the data obtained sofar led to a redesign of the CMOS chip [4]. Results of the technical characteristics of this next generation retina chip are presented here. The chip was designed in cooperation with the Institute of Microelectronics at the University of Ulm. Tests in vitro show that the chip performs according to its specifications. Implants with an inductively coupled power supply equipped with the novel chip are in production and will soon be ready for extensive testing in vivo. [ABSTRACT FROM AUTHOR]

This paper presents a wide-band CMOS LC voltage controlled oscillator (VCO) based on a complementary cross-coupled architecture for multi-standard transceivers. Switched capacitors and varactors are used to accomplish frequency coarse tuning and fine tuning, respectively. A low on-state resistance technique is introduced to reduce the loss of the switched capacitors. The VCO achieves a 45% tuning range, from 3.18 to 5.02GHz, at 1.8V supply. The attained simulated phase noise is less than -107 dBc/Hz at 1MHz offset within the entire tuning range based on a TSMC 0.18-µm CMOS technology. [ABSTRACT FROM AUTHOR]

A wideband voltage-controlled oscillator (VCO) with a frequency range from 3GHz to 5GHz is presented. The VCO has two control inputs, one for band switching and one for continuous control of the output frequency. The VCO with a 4.4 tenability PMOS varactor was designed and fabricated in a TSMC 0.18-u m CMOS process. The phase noises at 1MHz offset are -124 dBc/Hz and -92 dBc/Hz for the oscillation frequency of 2.95 GHz and 5.03 GHz, respectively. Simulated data shows that the designed VCO is suitable for ultra-wideband system applications. [ABSTRACT FROM AUTHOR]

The traditional ring voltage-controlled oscillator (VCO) generally uses the method of controlling resistance to change the oscillation frequency. This paper describes a 2GHz fully differential ring voltage-controlled oscillator based on 0.18µm CMOS technology. The oscillation frequency is controlled through MOS capacitance in the output of each delay cell. This method has stabile output waveform and linear tuning characteristic. [ABSTRACT FROM AUTHOR]

A Design of A 1.9GHz downmixer based on TSMC 0.18um is presented, using Gilbert configuration. The conversion gain is about 12.8dB, the noise figure is about 13.6dB and IIP3 is about 0.068dBm with -25dBm LO input signal. The power supply is 3V and the design is based on TSMC 0.18um technology [ABSTRACT FROM AUTHOR]