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Our society is becoming increasingly dependent on embedded software, and its reliability becomes more and more important. Although we can utilize powerful scientific methods such as model checking techniques to develop reliable embedded software, it is expensive to apply these methods to consumer embedded software development. In this paper, we propose an application of model checking techniques for design verification in product line development (PLD). We introduce reusable verification models in which we define variation points, and we show how to define traceability among feature models, design models and verification models. The reuse of verification models in PLD not only enables the systematic design verification of each product but also reduces the cost of applying model checking techniques. [ABSTRACT FROM AUTHOR]

Modeling techniques play essential roles in software product line development (PLD), and various modeling techniques have been proposed so far. However, some of these techniques are not actually usable in the industries, due to the lack of scalability. Although modeling techniques are essentially for reducing scale and complexity, further development of techniques are indispensable to manage the scale and complexity we are confronting today. Especially, in PLD, the problem becomes more serious, because we have to model target domains, requirements, architectures, designs along with complicated variabilities and configurations. [ABSTRACT FROM AUTHOR]