56 results on '"Joan Cabestany"'
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2. Deep Learning for Detecting Freezing of Gait Episodes in Parkinson's Disease Based on Accelerometers.
3. Self-adaptive hardware architecture with parallel processing capabilities and dynamic reconfiguration.
4. Monitoring Motor Fluctuations in Parkinson's Disease Using a Waist-Worn Inertial Sensor.
5. A double closed loop to enhance the quality of life of Parkinson's Disease patients: REMPARK system.
6. Identification of Postural Transitions Using a Waist-Located Inertial Sensor.
7. Comparative and adaptation of step detection and step length estimators to a lateral belt worn accelerometer.
8. FATE: One step towards an automatic aging people fall detection service.
9. REMPARK: When AI and technology meet Parkinson Disease assessment.
10. Dyskinesia and motor state detection in Parkinson's Disease patients with a single movement sensor.
11. A System for Inference of Spatial Context of Parkinson's Disease Patients.
12. Description of a Fault Tolerance System Implemented in a Hardware Architecture with Self-adaptive Capabilities.
13. Time series analysis of inertial-body signals for the extraction of dynamic properties from human gait.
14. Implementation of a Dynamic Fault-Tolerance Scaling Technique on a Self-Adaptive Hardware Architecture.
15. User Daily Activity Classification from Accelerometry Using Feature Selection and SVM.
16. A Novel Hardware Architecture for Self-adaptive Systems.
17. Multichannel Blind Signal Separation in Semiconductor-Based GAS Sensor Arrays.
18. Interfacing with Patterned in Vitro Neural Networks by Means of Hybrid Glass-Elastomer Neurovectors: Progress on Neuron Placement, Neurite Outgrowth and Biopotential Measurements.
19. Virtual Labs for Neural Networks E-courses.
20. Comparison of neural algorithms for blind source separation in sensor array applications.
21. Large Margin Nearest Neighbor Classifiers.
22. An In-System Routing Strategy For Evolvable Hardware Programmable Platforms.
23. Mixed-signal VLSI for neural and fuzzy sequential processors.
24. Implementation of Virtual Circuits by Means of the FIPSOC Devices.
25. The Role of Dynamic Reconfiguration for Implementing Artificial Neural Networks Models in Programmable Hardware.
26. On-Line Gradient Learning Algorithms for K-Nearest Neighbor Classifiers.
27. A Bipartitioning Algorithm for Dynamic Reconfigurable Programmable Logic.
28. Realization of Self-Repairing and Evolvable Hardware Structures by Means of Implicit Self-Configuration.
29. Feasible Evolutionary and Self-Repairing Hardware by Means of the Dynamic Reconfiguration Capabilities of the FIPSOC Devices.
30. A new dynamic LVQ-based classifier and its application to handwritten character recognition.
31. Analog Sequential Architecture for Neuro-Fuzzy Models VLSI Implementation.
32. Using Classical and Evolutive Neural Models in Industrial Applications: A Case Study for an Automatic Coin Classifier.
33. Synthesis and Optimization of a Bit-Serial Pipeline Kernel Processor.
34. Improving the Performance of Piecewise Linear Separation Incremental Algorithms for Practical Hardware Implementations.
35. Practical Design Methodology for Commercial Automatic Coin Recognizers Based on Neural Decision Engines.
36. Human Activity and Motion Disorder Recognition: towards smarter Interactive Cognitive Environments.
37. A heterogeneous database for movement knowledge extraction in Parkinson's disease.
38. Digital Hardware Implementation of ROI Incremental Algorithms.
39. A Coprocessor Card for Fast Neural Network Emulation.
40. Optimiized Learning for Improving the Evolution of Piecewise Linear Separation Incremental Algorithms.
41. Region of Influence (ROI) Networks. Model and Implementation.
42. An Integrated Circuit for Artificial Neural Networks.
43. Derivation of a new criterion function based on an information measure for improving piecewise linear separation incremental algorithms.
44. A deterministic method for establishing the initial conditions in the RCE algorithm.
45. Improving piecewise linear separation incremental algorithms using complexity reduction methods.
46. Enhanced unit training for piecewise linear seperation incremental algorithms.
47. A new field programmable system-on-a-chip for mixed signal integration.
48. Advances in Computational Intelligence - 12th International Work-Conference on Artificial Neural Networks, IWANN 2013, Puerto de la Cruz, Tenerife, Spain, June 12-14, 2013, Proceedings, Part I
49. Advances in Computational Intelligence - 12th International Work-Conference on Artificial Neural Networks, IWANN 2013, Puerto de la Cruz, Tenerife, Spain, June 12-14, 2013, Proceedings, Part II
50. Advances in Computational Intelligence - 11th International Work-Conference on Artificial Neural Networks, IWANN 2011, Torremolinos-Málaga, Spain, June 8-10, 2011, Proceedings, Part I
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