83 results on '"Kim Chulwoo"'
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2. An Output-Boosted 3-ratio Switched-Capacitor DC-DC Converter with 0.5-to-1.8 V Output Voltage Range for Low-Power IoT Applications
3. A 97.9% Peak Efficiency 9 V Output Three-Switch Hybrid Buck–Boost Power Stage Using 5 V CMOS
4. A 266-3750 MHz Wide-Range Adaptive Phase-Rotator-Based All Digital DLL for LPDDR5 Controllers
5. Experimental Demonstration of RoFSO Transmission Combining WLAN Standard and WDM-FSO over 100m Distance
6. A 0.385-pJ/bit 10-Gb/s TIA-Terminated Di-Code Transceiver with Edge-Delayed Equalization, ECC, and Mismatch Calibration for HBM Interfaces
7. A 1-3.2 GHz 0.6 mW/GHz Duty-Cycle-Corrector Using Bangbang Duty-Cyle-Detector
8. A Power Management System Based on Adaptive Low-Dropout Voltage Regulator with Optimal Reference Pre-Compensation Technique
9. A Hybrid DC-DC Converter Capable of Supplying Heavy Load in Step-Up and Step-Down Mode
10. E-Beam detection of over-etch in semiconductor processing and how over-etch level is related to defect detection parameters
11. A 1 MS/s 9.15 ENOB Low-Power SAR ADC with Triple-Charge-Sharing Technique
12. Dual Refrigerant LNG Liquefaction Cycle for Offshore FLNG and Its Pilot Plant
13. Using e-Beam inspection and overlay as tool for identifying process weaknesses in semiconductor processing
14. A Bidirectional High-Voltage Dual-Input Buck Converter for Triboelectric Energy-Harvesting Interface Achieving 70.72% End-to-End Efficiency
15. GEOPHYSICAL SURVEYS IN SUPPORT OF THE GEOHAZARD EVALUATION FOR THE ATLANTIC SUNRISE PIPELINE
16. Optimized SMR Process with Advanced Vessel Economizer
17. 23.3 A 3-bit/2UI 27Gb/s PAM-3 Single-Ended Transceiver Using One-Tap DFE for Next-Generation Memory Interface
18. Physically Unclonable Function Using Ring Oscillator Collapse in 0.5 V Near-Threshold Voltage for Low-Power Internet of Things
19. Optimized Mixed Refrigerant System Using Advanced Vessel Economizer
20. A 4.5-to-16μW integrated triboelectric energy-harvesting system based on high-voltage dual-input buck converter with MPPT and 70V maximum input voltage
21. 12Gb/s over four balanced lines utilizing NRZ braid clock signaling with 100% data payload and spread transition scheme for 8K UHD intra-panel interface
22. 31% Reduction of power consumption using active inductor at TX and AC termination at RX for a low-power post-LPDDR4 interfaces
23. Edge pursuit comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC
24. A 42nJ/conversion on-demand state-of-charge indicator for miniature IoT Li-ion batteries
25. A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations
26. Transdermal delivery of macromolecule using sonophoresis with cavitation seed: In-vivo study
27. A 42nJ/conversion on-demand state-of-charge indicator for miniature IoT Li-ion batteries
28. 29.5 12Gb/s over four balanced lines utilizing NRZ braid clock signaling with 100% data payload and spread transition scheme for 8K UHD intra-panel interfaces
29. A digital low-dropout(DLDO) regulator with 14dB power supply rejection enhancement
30. Session 18 overview: High-bandwidth DRAM
31. Circuit design techniques for multimedia wireline communications
32. 17.6 1V 10Gb/s/pin single-ended transceiver with controllable active-inductor-based driver and adaptively calibrated cascade-DFE for post-LPDDR4 interfaces
33. F2: Memory trends: From big data to wearable devices
34. 23.1 A 0.15V-input energy-harvesting charge pump with switching body biasing and adaptive dead-time for efficiency improvement
35. 25.3 A 1.35V 5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty-cycle corrector
36. F6: Energy-efficient I/O design for next-generation systems
37. 23.7 Self-powered 30μW-to-10mW Piezoelectric energy-harvesting system with 9.09ms/V maximum power point tracking time
38. A digitally controlled DC-DC buck converter with bang-bang control
39. A single-inductor 8-channel output DC-DC boost converter with time-limited power distribution control and single shared hysteresis comparator
40. A DC-DC boost converter with variation tolerant MPPT technique and efficient ZCS circuit for thermoelectric energy harvesting applications
41. A low-voltage high-efficiency voltage doubler for thermoelectric energy harvesting
42. A cost-effective design of non-linear modulation profile for spread spectrum clock
43. A 5.4Gb/s adaptive equalizer with unit pulse charging technique in 0.13µm CMOS
44. A 283.2μW 800Mb/s/pin DLL-based data self-aligner for Through-Silicon Via (TSV) interface
45. A 0.076mm2 3.5GHz spread-spectrum clock generator with memoryless Newton-Raphson modulation profile in 0.13μm CMOS
46. A 1.6V 1.4Gb/s/pin consumer DRAM with self-dynamic voltage-scaling technique in 44nm CMOS technology
47. An on-chip soft-start technique of current-mode DC-DC converter for biomedical applications
48. An all digital time amplifier with interpolation scheme for low gain variation
49. A cost-effective design of spread spectrum clock generator
50. A 7.7mW/1.0ns/1.35V delay locked loop with racing mode and OA-DCC for DRAM interface
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