Search

Your search keyword '"Mitsuhashi, R."' showing total 47 results

Search Constraints

Start Over You searched for: Author "Mitsuhashi, R." Remove constraint Author: "Mitsuhashi, R." Publication Type Conference Materials Remove constraint Publication Type: Conference Materials
47 results on '"Mitsuhashi, R."'

Search Results

2. Gate Leakage Advantage of LaO Incorporation for Vt Tuning in High-k nMOSFETs over Metal Gate WF Control

Catalog

Books, media, physical & digital resources

5. Strain enhanced low-VT CMOS featuring La/Al-doped HfSiO/TaC and 10ps invertor delay

6. Low VT CMOS using doped Hf-based oxides, TaC-based Metals and Laser-only Anneal

7. Achieving 9ps unloaded ring oscillator delay in FuSI/HfSiON with 0.8 nm EOT

8. Strain enhanced FUSI/HfSiON Technology with optimized CMOS Process Window

9. Low Vt Ni-FUSI CMOS Technology using a DyO cap layer with either single or dual Ni-phases

10. Nitrogen Profile and Dielectric Cap Layer (Al2O3, Dy2O3, La2O3) Engineering on Hf-Silicate

11. A Dy2O3-capped HfO2 Dielectric and TaCx-based Metals Enabling Low-Vt Single-Metal-Single-Dielectric Gate Stack

12. Oxygen-Vacancy-Induced Vt shift in La-containing Devices

13. Achieving low VT Ni-FUSI CMOS via lanthanide incorporation in the gate stack

14. Ni-based FUSI gates: CMOS Integration for 45nm node and beyond

16. 65nm-node Low-Standby-Power FETs with HfAlOx Gate Dielectric

20. A HfAlOx Gate Dielectric FET Technology Compatible with a Conventional Poly-Si Gate CMOS Process

33. Ni-FUSI on high-k as a candidate for 65nm LSTP CMOS

34. Low Power CMOS Featuring Dual Work Function FUSI on HfSiON and 17ps Inverter Delay

40. CMOS integration of dual work function phase controlled Ni FUSI with simultaneous silicidation of NMOS (NiSi) and PMOS (Ni-rich silicide) gates on HfSiON.