35 results on '"Parvais, Bertrand"'
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2. A Composite AlGaN/cGaN Back Barrier for mm-Wave GaN-on-Si HEMTs
3. Cryo-Computing for Infrastructure Applications: A Technology-to-Microarchitecture Co-optimization Study
4. A 28nm 6.5-8.1GHz 1.16mW/qubit Cryo-CMOS System-an-Chip for Superconducting Qubit Readout
5. Channel Thickness Impact on the Small- and Large-Signal RF Performance of GaN HEMTs on Si with a cGaN Back-Barrier
6. Linearity Assessment of GaN HEMTs on Si using Nonlinear Characterisation
7. ESD Failures of GaN-on-Si D-Mode AlGaN/GaN MIS-HEMT and HEMT Devices for 5G Telecommunications
8. CMOS compatible GaN-on-Si HEMT technology for RF applications: analysis of substrate losses and non-linearities
9. Device Scaling roadmap and its implications for Logic and Analog platform
10. Technology Impact on the Low Frequency Noise of Si and Si/SiGe Superlattice Input-Output FinFETs
11. Materials and Defect Aspects of III-V and III-N Devices for High-Speed Analog/RF Applications
12. Evaluation of the impact of source/drain epi implementation on logic performance using combined process and circuit simulation
13. Design of a 28 GHz differential GaAs power amplifier with capacitive neutralization for 5G mmwave applications
14. A 23 GHz Low-Phase-Noise Transformer-Feedback VCO in 22nm FD-SOI with a FOMT of 191dBc/Hz
15. Trap-Aware Compact Modeling and Power-Performance Assessment of III-V Tunnel FET
16. Cost Effective FinFET Platform for Stand Alone DRAM 1Y and Beyond Memory Periphery
17. Characterization and modeling of N-channel bulk FinFETs from DC to high frequency
18. 60-GHz CMOS TX/RX chipset on organic packages with integrated phased-array antennas
19. A digital intensive circuit for low-frequency noise monitoring in 28nm CMOS
20. Smart-array for pipelined BTI characterization
21. Modeling FinFET metal gate stack resistance for 14nm node and beyond
22. Comparative study of a fully differential op amp in FinFET and planar technologies
23. 14.2 A 79GHz phase-modulated 4GHz-BW CW radar TX in 28nm CMOS
24. 21.4 A 42mW 230fs-jitter sub-sampling 60GHz PLL in 40nm CMOS
25. A 54–69.3 GHz dual-band VCO with differential hybrid coupler for quadrature generation
26. A mm-wave 40 nm CMOS subharmonically injection-locked QVCO with lock detection
27. CMOS low-power transceivers for 60GHz multi Gbit/s communications
28. A low-power radio chipset in 40nm LP CMOS with beamforming for 60GHz high-data-rate wireless communication
29. A four-path 60GHz phased-array receiver with injection-locked LO, hybrid beamforming and analog baseband section in 90nm CMOS
30. A low-power 57-to-66GHz transceiver in 40nm LP CMOS with −17dB EVM at 7Gb/s
31. Identifying the Bottlenecks to the RF Performance of FinFETs
32. Low-Cost CMOS-Based Receive Modules for 60 GHz Wireless Communication
33. FinFET RF receiver building blocks operating above 10 GHz
34. Analog and RF circuits in 45 nm CMOS and below: planar bulk versus FinFET
35. CMOS low-power transceivers for 60GHz multi Gbit/s communications.
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