139 results on '"Rossi, Davide"'
Search Results
2. PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge
3. A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks
4. Cyber Security aboard Micro Aerial Vehicles: An OpenTitan-based Visual Communication Use Case
5. TransLib: A Library to Explore Transprecision Floating-Point Arithmetic on Multi-Core IoT End-Nodes
6. HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC
7. 22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing
8. Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training
9. Kraken: A Direct Event/Frame-Based Multi-sensor Fusion SoC for Ultra-Efficient Visual Processing in Nano-UAVs
10. Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference
11. Geographic diversity in public code contributions
12. Worldwide gender differences in public code contributions
13. Worldwide Gender Differences in Public Code Contributions and how they have been affected by the COVID-19 pandemic
14. RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs
15. Hardware-In-The Loop Emulation for Agile Co-Design of Parallel Ultra-Low Power IoT Processors
16. GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors
17. A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode
18. End-to-end 100-TOPS/W Inference With Analog In-Memory Computing: Are We There Yet?
19. XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V based IoT End Nodes
20. Architecting more than Moore
21. 4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7ฮผW Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode
22. An Energy-Efficient Low-Voltage Swing Transceiver for mW-Range IoT End-Nodes
23. Making Smart Buildings and Personal Systems Cooperate via Knowledge Base Overlays
24. Neuro-PULP: A Paradigm Shift Towards Fully Programmable Platforms for Neural Interfaces
25. A Mixed-Precision RISC-V Processor for Extreme-Edge DNN Inference
26. Enabling mixed-precision quantized neural networks in extreme-edge devices
27. Session details: Theme: Software design and development: BPMM - Business process management & modeling track
28. Energy-Efficient Two-level Instruction Cache Design for an Ultra-Low-Power Multi-core Cluster
29. TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE
30. XpulpNN: Accelerating Quantized Neural Networks on RISC-V Processors Through ISA Extensions
31. Pushing On-chip Memories Beyond Reliability Boundaries in Micropower Machine Learning Applications
32. PULP-NN: A Computing Library for Quantized Neural Network inference at the edge on RISC-V Based Parallel Ultra Low Power Clusters
33. A PULP-based Parallel Power Controller for Future Exascale Systems
34. DORY: Lightweight memory hierarchy management for deep NN inference on IoT endnodes
35. An Explicitly Parallel Architecture for Packet Processing in Software Defined Networks
36. Resilient Reactive Systems Based on Runtime Semantic Models
37. Making Smart Buildings and Personal Systems Cooperate via Knowledge Base Overlays.
38. Context-aware Reactive Systems based on Runtime Semantic Models (S)
39. Reducing Crossbar Costs in the Match-Action Pipeline
40. Hardware-Accelerated Energy-Efficient Synchronization and Communication for Ultra-Low-Power Tightly Coupled Clusters
41. Design and Evaluation of SmallFloat SIMD extensions to the RISC-V ISA
42. Quentin: an Ultra-Low-Power PULPissimo SoC in 22nm FDX
43. Independent Body-Biasing of P-N Transistors in an 28nm UTBB FD-SOI ULP Near-Threshold Multi-Core Cluster
44. Low-latency Packet Parsing in Software Defined Networks
45. Mr. Wolf: A 1 GFLOP/s Energy-Proportional Parallel Ultra Low Power SoC for IOT Edge Processing
46. Abstract 796: The BTK inhibitor BGB-3111 is synergistic with other anti-lymphoma targeted agents
47. Hyperdrive: A Systolically Scalable Binary-Weight CNN Inference Engine for mW IoT End-Nodes
48. GAP-8: A RISC-V SoC for AI at the Edge of the IoT
49. Compressed Sensing Based Seizure Detection for an Ultra Low Power Multi-core Architecture
50. An Explicitly Parallel Architecture for Packet Parsing in Software Defined Networks
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.