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Single electron transistors (SET) have attracted significant attention as a potential building block for post CMOS nanoelectronic devices. However, lack of reproducible and parallel fabrication approach and room temperature operation are the two major bottlenecks for practical realization of SET based devices. In this thesis, I demonstrate large scale single electron transistors fabrication techniques using solution processed single wall carbon nanotubes (SWNTs) and studied their electron transport properties. The approach is based on the assembly of individual SWNTs via dielectrophoresis (DEP) at the selected position of the circuit and formation of tunnel barriers on SWNT. Two different techniques: i) metal-SWNT Schottky contact, and ii) mechanical templating of SWNTs were used for tunnel barrier creation. Low temperature (4.2K) transport measurement of 100 nm long metal-SWNT Schottky contact devices show that 93% of the devices with contact resistance (RT) > 100 K? show SET behavior. Majority (90%) of the devices with 100 K? < RT < 1 M?, show periodic, well-de?ned Coulomb diamonds with a charging energy ~ 15 meV, represents single electron tunnelling through a single quantum dot (QD), defined by the top contact. For high RT (> 1M?), devices show multiple QDs behaviors, while QD was not formed for low RT ( < 100 K?) devices. From the transport study of 50 SWNT devices, a total of 38 devices show SET behavior giving an yield of 76%. I also demonstrate room temperature operating SET by using mechanical template technique. In mechanical template method individual SWNT is placed on top of a Al/Al2O3 local gate which bends the SWNT at the edge and tunnel barriers are created. SET devices fabricated with a template width of ~20 nm shows room temperature operation with a charging energy of ~150 meV. I also discussed the detailed transport spectroscopy of the devices.

With ever miniaturisation of transistor dimensions, quantum effects are increasingly becoming the domineering mechanism for device operation. Though they follow different laws of physics in classical sense than the conventional CMOS transistors, these nanometer-scale devices such as the Single Electron Transistor (SET) have useful applications for example, acting as the front-end low noise amplifier for extremely weak signals. One such application of the SET that has attracted much research attention is its use in detecting quantum phenomena at deep cryogenic temperatures. The sensitivity of an SET can reach its theoretical limit and therefore holds immense potential as a readout device for future solid state quantum computers. It is however expected that the SET must also communicate with the classical electronics. In this thesis, CMOS microelectronics design for a one-shot readout of the SET is presented. The readout circuit, operating at 4K temperature and conforming to the micro-level voltage specification of the SET is capable of rapidly detecting a sub-nano ampere level change in the SET currents. Notwithstanding the lack of a reliable model capable of simulating the transistor behaviour at cryogenic temperature, this thesis presents the development of a high resolution readout circuitry with an emphasis on scalability and very low power consumption. The mismatch of electrical properties among identically designed components plays an important role in today's high performance integrated circuit design. The experimental results presented in this thesis expose the effect of low operating temperature on CMOS matching and provide interesting insights in the development of circuit designs for cryogenic applications. The functionality of the designed SET readout circuit is validated at extremely low operating temperature and it shows promising results achieving a nano-ampere level resolution with micro-seconds detection delay while consuming only tens of micro-watts of power; thus demonstrating an unprecedented level of proficiency compared to other works published in the relevant field of research.

The emergence of III-V semiconductor heterostructures has enabled the study of a broad range of two-dimensional phenomena. These heterostructures are the building blocks of high frequency field-effect transistors (FETs). GaN-based heterostructures will have great impact in FET applications as they have the highest carrier densities achievable. In this thesis we studied electron transport in AlGaN/GaN samples covering a broad range of carrier density, from 0.5×1012 cm^-2 to 1.0×1013 cm^-2. We found at carrier densities below 5.0×1012 cm^-2, electron scattering from threading dislocations were the dominant scattering mechanism. The electron mobilities can be greatly enhanced by reducing the density of threading dislocations based on novel patterned growth techniques. We extended our studies to even higher carrier densities using lattice matched In0.16Al0.84N/GaN heterostructures. In particular, we investigated the magnetotransport regime in the presence of two subbands by using gated Hall bar samples. In addition to scattering processes, we also studied the spin-orbit interaction and phase coherence in GaN 2DEG samples by performing weak antilocalization (WAL) measurements. The spin-splitting energies extracted from WAL were found to be much smaller than the previous reports based on Shubnikov-de Haas measurements. By studying the spin splitting energies as a function of Fermi wave-vector we obtained the linear and cubic spin-orbit parameters for GaN 2DEG system. Furthermore, we used the WAL feature as a thermometer for the electron system, which allowed us to study energy relaxation processes in GaN. In contrast to GaN heterostructures, we used GaAs/AlGaAs heterostructures to study two-dimensional electron transport at very low carrier densities. We focused on the deep insulation regime of integer quantum Hall liquids (IQHLs), a transport regime not accessible by ordinary transport measurements. We explored the charge dynamics in this regime by using single electron transistors (SET) in both unpatterned and antidot structures. SETs allowed us to monitor slow motion of charges in and out of the IQHLs. We found that, near zero temperature, IQHLs can be viewed as magnetic flux-to-charge transformers and confirmed our ideas by making a SET based magnetometer with an SET placed on an AlGaAs/GaAs heterostructure with 25 identical quantum wells.

In a modulation-doped AlGaAs/GaAs heterostructure, electrons in the two-dimensional electron gas (2DEG) are provided by ionization of Si dopants in the AlGaAs layer. To reduce the effect of Coulomb scattering between ionized dopants and electrons in the 2DEG, an undoped AlGaAs spacer is grown between the doped AlGaAs and the undoped GaAs layers, which reduces large-angle scattering, thus increasing the mobility and electron mean free path. In a traditional semiclassical picture of an open quantum dot, if the electron mean free path exceeds the dot width, transport becomes ballistic and the corresponding magneto-conductance fluctuations (MCF) are considered as a Fourier sum of periods arising from all possible Aharonov-Bohm loops that intercept the quantum point contacts and are formed by scattering from the dot walls alone. As a result, these devices, known as semiconductor billiards; were seen as ideal for studies of dynamical chaos in the quantum mechanical limit. However, modulation-doped devices are not without their problems. For example, it has recently been demonstrated that small-angle disorder scattering causes unpredictable changes in the device’s electronic properties each time it is cooled for use. This finding forces a careful reconsideration of our notions of ballistic transport in these devices. Another problem associated with modulation-doped devices is the temporal instability due to rapid switching of the dopants between ionized and de-ionized states, hindering the development of ultrasensitive quantum devices. This thesis reports the development of undoped quantum dots, where the ionized dopants are removed and the 2DEG is populated electrostatically by applying a positive bias to a degenerately doped cap. Our “induced” devices produce MCF that are reproducible with high fidelity after thermal cycling to 300 K. By performing a comparative analysis between nominally identical undoped and modulation-doped billiards, we conclude that small-angle scattering dominates transport in dots. Our work has important implications for studies of quantum chaos and ballistic transport. Additionally, measurements of our small undoped quantum dot operating in the Coulomb blockade regime showed features of excited state transport and spin-dependent transport blockade.

Strategies for the device integration and electrical characterization of individual colloidal semiconductor nanocrystals are presented. Results emphasize the insight gained by studying the electronic structure of individual nanocrystals as opposed to measurements of ensembles of particles. An analysis of a variety device geometries, material systems, and nanocrystal morphology and functionality shows that the method of electrical contact has a dominating role in the electrical behavior of the samples. Further, interactions with the electrode contact reflect the unique electronic and surface structure of the individual nanocrystals.In studies utilizing nanoscale lithography to directly deposit metal electrodes onto nanocrystals under vacuum, samples behave as single electron transistors (SET). Devices made from CdTe nanorods contacted by Pd display strong electron-electron correlations, which limit the flow of current to one electron at a time across the nanocrystal. Measurements also indicate that chemical reactions induced by the electrode metal cause diffusion of interface species and compositional modification of the nanoparticle. Interface chemical reactions may completely transform the nanocrystal under study, also altering the nanocrystal electronic structure.To avoid these complications, alternative strategies for device fabrication take advantage of the self-assembly of heterostructure nanoparticles. Synthetic methods for the direct solution-phase growth of Au electrodes on CdSe nanorod tips provide a 100,000-fold increase in the conductivity of single particles. Device response indicates ensemble electron physics and a Schottky barrier at the electrode contact, allowing quantitative determination of interface electronic structure.The methods of self-assembly are extended to a variety of heterostructure nanoparticles optimized for electronic and optoelectronic functionality. This work demonstrates the increasing sophistication of high-quality electrical devices achievable via self-assembly and verifies the process as an excellent route to the next generation of electronic and optoelectronic devices utilizing colloidal semiconductor nanocrystals.

CMOS Technology has advanced for decades under the rule of Moore's law. But all good things must come to an end. Researchers estimate that CMOS will reach a lower limit on feature size within the next 10 to 15 years. In order to assure further progress in the field, new computing architectures must be investigated. These nanoscale architectures are many and varied. It remains to be seen if any will become a legitimate successor to CMOS. Single electron tunneling is a process by which electrons can be trans- ported (tunnel) across a thin insulating surface. A conducting island sepa rated by a pair of quantum tunnel junctions creates a Single Electron Transistor (SET). SETs exhibit higher functionality than traditional MOSFETs, and function best at very small feature sizes, in the neighborhood of 1nm. Many circuits must be developed before SETs can be considered a viable contender to CMOS technology. One important circuit is the Digital to Analog Converter (DAC). DACs are present on many microprocessors and microcontrollers in use today and are necessary in many situations. While other SET circuits have been proposed, including ADCs, no DAC design exists in open literature. We propose three possible SET DAC designs and characterize them with an HSPICE SET simulation model. The first design is a charge scaling architecture similar to what is frequently used in CMOS. The second two designs are based on a current steering architecture, but are unique in their implementation with SETs.